| /src/sys/arch/arm/marvell/ |
| mv78xx0.c | 162 if (is->is_irq == MV78XX0_IRQ_TIMER0 ||
163 is->is_irq == MV78XX0_IRQ_TIMER1 ||
164 is->is_irq == MV78XX0_IRQ_TIMER2 ||
165 is->is_irq == MV78XX0_IRQ_TIMER3) {
167 mlmbim |= TIMER_IRQ2MLMBIMR(is->is_irq);
|
| armadaxp.c | 646 KASSERT(pic->pic_maxsources >= is->is_irq);
647 tmp = MPIC_READ(ARMADAXP_MLMB_MPIC_ISCR_BASE + is->is_irq * 4);
650 MPIC_WRITE(ARMADAXP_MLMB_MPIC_ISCR_BASE + is->is_irq * 4,
761 KASSERT(pic->pic_maxsources >= is->is_irq);
764 reg |= ARMADAXP_IRQ_ERROR_BIT(is->is_irq);
|
| mvsocgpp.c | 308 pin = pic->pic_irqbase + is->is_irq - gpp_irqbase;
|
| /src/sys/arch/arm/pic/ |
| pic.c | 257 atomic_or_32(&pic->pic_pending_irqs[is->is_irq >> 5],
258 __BIT(is->is_irq & 0x1f));
300 KASSERT(irq_base <= is->is_irq && is->is_irq < irq_base + 32);
381 is->is_pic->pic_name, is->is_irq, is->is_source,
386 pcpu->pcpu_evs[is->is_irq].ev_count++;
729 evcnt_attach_dynamic(&pcpu->pcpu_evs[is->is_irq], EVCNT_TYPE_INTR, NULL,
739 (*pic->pic_ops->pic_unblock_irqs)(pic, is->is_irq & ~0x1f,
740 __BIT(is->is_irq & 0x1f));
758 is->is_irq = irq
[all...] |
| picvar.h | 125 uint32_t is_irq; /* local to pic */ member in struct:intrsource
|
| /src/sys/arch/arm/cortex/ |
| gicv3.c | 174 const u_int group = is->is_irq / 32;
180 const u_int ipriority_shift = (is->is_irq & 0x3) * 8;
181 const u_int icfg_shift = (is->is_irq & 0xf) * 2;
190 icfg = gicr_read_4(sc, n, GICR_ICFGRn(is->is_irq / 16));
195 gicr_write_4(sc, n, GICR_ICFGRn(is->is_irq / 16), icfg);
197 ipriority = gicr_read_4(sc, n, GICR_IPRIORITYRn(is->is_irq / 4));
200 gicr_write_4(sc, n, GICR_IPRIORITYRn(is->is_irq / 4), ipriority);
212 gicd_write_8(sc, GICD_IROUTER(is->is_irq), irouter);
215 icfg = gicd_read_4(sc, GICD_ICFGRn(is->is_irq / 16));
220 gicd_write_4(sc, GICD_ICFGRn(is->is_irq / 16), icfg)
[all...] |
| gic.c | 417 const size_t group = is->is_irq / 32;
418 const u_int irq = is->is_irq & 31;
424 is->is_irq, group, sc->sc_gic_valid_lines[group],
428 "irq %u: type %u unsupported", is->is_irq, is->is_type);
430 const bus_size_t targets_reg = GICD_ITARGETSRn(is->is_irq / 4);
431 const bus_size_t cfg_reg = GICD_ICFGRn(is->is_irq / 16);
479 const bus_size_t priority_reg = GICD_IPRIORITYRn(is->is_irq / 4);
|
| /src/sys/arch/arm/imx/ |
| imxgpio.c | 149 uint32_t icr_reg = GPIO_ICR1 + ((is->is_irq & 0x10) >> 2);
151 uint32_t icr_shift = (is->is_irq & 0x0f) << 1;
179 KASSERT(is->is_irq < 32);
180 uint32_t irq_mask = __BIT(is->is_irq);
196 icr_shift = (is->is_irq & 0x0f) << 1;
197 icr_reg = GPIO_ICR1 + ((is->is_irq & 0x10) >> 2);
|
| imx31_gpio.c | 171 KASSERT(is->is_irq < 32);
172 uint32_t irq_mask = __BIT(is->is_irq);
189 icr_shift = (is->is_irq & 0x0f) << 1;
190 icr_reg = GPIO_ICR1 + ((is->is_irq & 0x10) >> 2);
|
| imx51_tzic.c | 218 KASSERT(is->is_irq < 128);
222 priority_shift = (is->is_irq % 4) * 8;
223 priority_offset = (is->is_irq / 4);
|
| imx31_icu.c | 131 KASSERT(is->is_irq < 64);
134 priority_reg = IMX31_NIPRIORITY0 - (is->is_irq >> 3);
135 priority_shift = (is->is_irq & 7) * 4;
|
| imx23_icoll.c | 255 ICOLL_SET_IRQ(sc, pic->pic_irqbase + is->is_irq);
257 ICOLL_CLR_IRQ(sc, pic->pic_irqbase + is->is_irq);
|
| /src/sys/arch/arm/apple/ |
| apple_intc.c | 145 AIC_WRITE(sc, AIC_AFFINITY(is->is_irq), __BIT(0));
146 AIC_WRITE(sc, AIC_MASK_CLR(is->is_irq),
147 AIC_MASK_BIT(is->is_irq));
346 apple_intc_mark_pending(pic, is->is_irq);
|
| /src/sys/arch/arm/gemini/ |
| gemini_icu.c | 195 const uint32_t irq_mask = __BIT(is->is_irq);
197 KASSERT(is->is_irq < 32);
|
| gemini_gpio.c | 167 KASSERT(is->is_irq < 32);
168 uint32_t irq_mask = __BIT(is->is_irq);
|
| /src/sys/arch/powerpc/booke/ |
| e500_intr.c | 90 uint8_t is_irq; member in struct:intr_source
100 .is_irq = -1, .is_ipl = IPL_NONE, .is_ist = IST_NONE, \
763 is->is_irq != irq ||
777 is->is_irq = irq;
867 bool ok = e500_intr_irq_info_get(curcpu(), is->is_irq, is->is_ipl,
1468 if (e500_intr_irq_info_get(ci, is->is_irq, is->is_ipl,
1509 if (!e500_intr_irq_info_get(ci, is->is_irq, is->is_ipl, is->is_ist,
1553 if (e500_intr_irq_info_get(ci, is->is_irq, is->is_ipl,
1599 if (e500_intr_irq_info_get(ci, is->is_irq, is->is_ipl, is->is_ist, &ii))
|
| /src/sys/arch/arm/nxp/ |
| imx7_gpc.c | 241 const u_int irq = is->is_irq;
|
| /src/sys/arch/arm/sunxi/ |
| sunxi_intc.c | 117 KASSERT(is->is_irq < INTC_MAX_SOURCES);
|
| /src/sys/arch/arm/ti/ |
| ti_omapintc.c | 175 KASSERT(is->is_irq < PICTOSOFTC(pic)->sc_pic.pic_maxsources);
|
| /src/sys/arch/arm/broadcom/ |
| bcm2835_intr.c | 505 KASSERT(is->is_irq < BCM2835_NIRQ);
806 KASSERT(is->is_irq >= 0);
807 KASSERT(is->is_irq < BCM2836_NIRQPERCPU);
|
