tegra_reg.h revision 1.24.2.2
1 1.24.2.2 jdolecek /* $NetBSD: tegra_reg.h,v 1.24.2.2 2017/12/03 11:35:54 jdolecek Exp $ */ 2 1.24.2.2 jdolecek 3 1.24.2.2 jdolecek /*- 4 1.24.2.2 jdolecek * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca> 5 1.24.2.2 jdolecek * All rights reserved. 6 1.24.2.2 jdolecek * 7 1.24.2.2 jdolecek * Redistribution and use in source and binary forms, with or without 8 1.24.2.2 jdolecek * modification, are permitted provided that the following conditions 9 1.24.2.2 jdolecek * are met: 10 1.24.2.2 jdolecek * 1. Redistributions of source code must retain the above copyright 11 1.24.2.2 jdolecek * notice, this list of conditions and the following disclaimer. 12 1.24.2.2 jdolecek * 2. Redistributions in binary form must reproduce the above copyright 13 1.24.2.2 jdolecek * notice, this list of conditions and the following disclaimer in the 14 1.24.2.2 jdolecek * documentation and/or other materials provided with the distribution. 15 1.24.2.2 jdolecek * 16 1.24.2.2 jdolecek * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.24.2.2 jdolecek * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.24.2.2 jdolecek * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.24.2.2 jdolecek * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.24.2.2 jdolecek * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.24.2.2 jdolecek * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.24.2.2 jdolecek * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.24.2.2 jdolecek * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.24.2.2 jdolecek * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.24.2.2 jdolecek * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.24.2.2 jdolecek * SUCH DAMAGE. 27 1.24.2.2 jdolecek */ 28 1.24.2.2 jdolecek 29 1.24.2.2 jdolecek #ifndef _ARM_TEGRA_REG_H 30 1.24.2.2 jdolecek #define _ARM_TEGRA_REG_H 31 1.24.2.2 jdolecek 32 1.24.2.2 jdolecek #define TEGRA_PCIE_OFFSET 0x01000000 33 1.24.2.2 jdolecek #define TEGRA_PCIE_SIZE 0x3f000000 34 1.24.2.2 jdolecek #define TEGRA_PCIE_RPCONF_BASE 0x01000000 35 1.24.2.2 jdolecek #define TEGRA_PCIE_RPCONF_SIZE 0x00002000 36 1.24.2.2 jdolecek #define TEGRA_PCIE_PADS_BASE 0x01003000 37 1.24.2.2 jdolecek #define TEGRA_PCIE_PADS_SIZE 0x00000800 38 1.24.2.2 jdolecek #define TEGRA_PCIE_AFI_BASE 0x01003800 39 1.24.2.2 jdolecek #define TEGRA_PCIE_AFI_SIZE 0x00000800 40 1.24.2.2 jdolecek #define TEGRA_PCIE_A1_BASE 0x01000000 41 1.24.2.2 jdolecek #define TEGRA_PCIE_A1_SIZE 0x01000000 42 1.24.2.2 jdolecek #define TEGRA_PCIE_A2_BASE 0x02000000 43 1.24.2.2 jdolecek #define TEGRA_PCIE_A2_SIZE 0x0e000000 44 1.24.2.2 jdolecek #define TEGRA_PCIE_A3_BASE 0x10000000 45 1.24.2.2 jdolecek #define TEGRA_PCIE_A3_SIZE 0x30000000 46 1.24.2.2 jdolecek 47 1.24.2.2 jdolecek #define TEGRA_PCIE_CONF_BASE 0x02000000 48 1.24.2.2 jdolecek #define TEGRA_PCIE_CONF_SIZE 0x01000000 49 1.24.2.2 jdolecek #define TEGRA_PCIE_IO_BASE 0x01800000 /* comment in tegra_pcie.c */ 50 1.24.2.2 jdolecek #define TEGRA_PCIE_IO_SIZE 0x00800000 51 1.24.2.2 jdolecek #define TEGRA_PCIE_MEM_BASE 0x03000000 52 1.24.2.2 jdolecek #define TEGRA_PCIE_MEM_SIZE 0x0d000000 53 1.24.2.2 jdolecek #define TEGRA_PCIE_EXTC_BASE 0x10000000 54 1.24.2.2 jdolecek #define TEGRA_PCIE_EXTC_SIZE 0x10000000 55 1.24.2.2 jdolecek #define TEGRA_PCIE_PMEM_BASE 0x20000000 56 1.24.2.2 jdolecek #define TEGRA_PCIE_PMEM_SIZE 0x20000000 57 1.24.2.2 jdolecek 58 1.24.2.2 jdolecek #define TEGRA_HOST1X_BASE 0x50000000 59 1.24.2.2 jdolecek #define TEGRA_HOST1X_SIZE 0x00034000 60 1.24.2.2 jdolecek #define TEGRA_GHOST_BASE 0x54000000 61 1.24.2.2 jdolecek #define TEGRA_GHOST_SIZE 0x01000000 62 1.24.2.2 jdolecek #define TEGRA_GPU_BASE 0x57000000 63 1.24.2.2 jdolecek #define TEGRA_GPU_SIZE 0x02000000 64 1.24.2.2 jdolecek #define TEGRA_PPSB_BASE 0x60000000 65 1.24.2.2 jdolecek #define TEGRA_PPSB_SIZE 0x01000000 66 1.24.2.2 jdolecek #define TEGRA_APB_BASE 0x70000000 67 1.24.2.2 jdolecek #define TEGRA_APB_SIZE 0x01000000 68 1.24.2.2 jdolecek #define TEGRA_AHB_A2_BASE 0x7c000000 69 1.24.2.2 jdolecek #define TEGRA_AHB_A2_SIZE 0x02000000 70 1.24.2.2 jdolecek 71 1.24.2.2 jdolecek #define TEGRA_HOST1X_VBASE 0xfaf00000 72 1.24.2.2 jdolecek #define TEGRA_PPSB_VBASE 0xfb000000 73 1.24.2.2 jdolecek #define TEGRA_APB_VBASE 0xfc000000 74 1.24.2.2 jdolecek #define TEGRA_AHB_A2_VBASE 0xfd000000 75 1.24.2.2 jdolecek 76 1.24.2.2 jdolecek /* APB */ 77 1.24.2.2 jdolecek #define TEGRA_MPIO_OFFSET 0x00000000 78 1.24.2.2 jdolecek #define TEGRA_MPIO_SIZE 0x4000 79 1.24.2.2 jdolecek #define TEGRA_UARTA_OFFSET 0x00006000 80 1.24.2.2 jdolecek #define TEGRA_UARTA_SIZE 0x40 81 1.24.2.2 jdolecek #define TEGRA_UARTB_OFFSET 0x00006040 82 1.24.2.2 jdolecek #define TEGRA_UARTB_SIZE 0x40 83 1.24.2.2 jdolecek #define TEGRA_UARTC_OFFSET 0x00006200 84 1.24.2.2 jdolecek #define TEGRA_UARTC_SIZE 0x100 85 1.24.2.2 jdolecek #define TEGRA_UARTD_OFFSET 0x00006300 86 1.24.2.2 jdolecek #define TEGRA_UARTD_SIZE 0x100 87 1.24.2.2 jdolecek #define TEGRA_I2C1_OFFSET 0x0000c000 88 1.24.2.2 jdolecek #define TEGRA_I2C1_SIZE 0x100 89 1.24.2.2 jdolecek #define TEGRA_I2C2_OFFSET 0x0000c400 90 1.24.2.2 jdolecek #define TEGRA_I2C2_SIZE 0x100 91 1.24.2.2 jdolecek #define TEGRA_I2C3_OFFSET 0x0000c500 92 1.24.2.2 jdolecek #define TEGRA_I2C3_SIZE 0x100 93 1.24.2.2 jdolecek #define TEGRA_I2C4_OFFSET 0x0000c700 94 1.24.2.2 jdolecek #define TEGRA_I2C4_SIZE 0x100 95 1.24.2.2 jdolecek #define TEGRA_I2C5_OFFSET 0x0000d000 96 1.24.2.2 jdolecek #define TEGRA_I2C5_SIZE 0x100 97 1.24.2.2 jdolecek #define TEGRA_I2C6_OFFSET 0x0000d100 98 1.24.2.2 jdolecek #define TEGRA_I2C6_SIZE 0x100 99 1.24.2.2 jdolecek #define TEGRA_RTC_OFFSET 0x0000e000 100 1.24.2.2 jdolecek #define TEGRA_RTC_SIZE 0x100 101 1.24.2.2 jdolecek #define TEGRA_KBC_OFFSET 0x0000e200 102 1.24.2.2 jdolecek #define TEGRA_KBC_SIZE 0x100 103 1.24.2.2 jdolecek #define TEGRA_PMC_OFFSET 0x0000e400 104 1.24.2.2 jdolecek #define TEGRA_PMC_SIZE 0x800 105 1.24.2.2 jdolecek #define TEGRA_FUSE_OFFSET 0x0000f800 106 1.24.2.2 jdolecek #define TEGRA_FUSE_SIZE 0x00000400 107 1.24.2.2 jdolecek #define TEGRA_CEC_OFFSET 0x00015000 108 1.24.2.2 jdolecek #define TEGRA_CEC_SIZE 0x1000 109 1.24.2.2 jdolecek #define TEGRA_MC_OFFSET 0x00019000 110 1.24.2.2 jdolecek #define TEGRA_MC_SIZE 0x1000 111 1.24.2.2 jdolecek #define TEGRA_SATA_OFFSET 0x00020000 112 1.24.2.2 jdolecek #define TEGRA_SATA_SIZE 0x10000 113 1.24.2.2 jdolecek #define TEGRA_HDA_OFFSET 0x00030000 114 1.24.2.2 jdolecek #define TEGRA_HDA_SIZE 0x10000 115 1.24.2.2 jdolecek #define TEGRA_XUSB_PADCTL_OFFSET 0x0009f000 116 1.24.2.2 jdolecek #define TEGRA_XUSB_PADCTL_SIZE 0x1000 117 1.24.2.2 jdolecek #define TEGRA_XUSB_HOST_OFFSET 0x00090000 118 1.24.2.2 jdolecek #define TEGRA_XUSB_HOST_SIZE 0xa000 119 1.24.2.2 jdolecek #define TEGRA_SDMMC1_OFFSET 0x000b0000 120 1.24.2.2 jdolecek #define TEGRA_SDMMC1_SIZE 0x200 121 1.24.2.2 jdolecek #define TEGRA_SDMMC2_OFFSET 0x000b0200 122 1.24.2.2 jdolecek #define TEGRA_SDMMC2_SIZE 0x200 123 1.24.2.2 jdolecek #define TEGRA_SDMMC3_OFFSET 0x000b0400 124 1.24.2.2 jdolecek #define TEGRA_SDMMC3_SIZE 0x200 125 1.24.2.2 jdolecek #define TEGRA_SDMMC4_OFFSET 0x000b0600 126 1.24.2.2 jdolecek #define TEGRA_SDMMC4_SIZE 0x200 127 1.24.2.2 jdolecek #define TEGRA_XUSB_DEV_OFFSET 0x000d0000 128 1.24.2.2 jdolecek #define TEGRA_XUSB_DEV_SIZE 0xa000 129 1.24.2.2 jdolecek #define TEGRA_SOC_THERM_OFFSET 0x000e2000 130 1.24.2.2 jdolecek #define TEGRA_SOC_THERM_SIZE 0x1000 131 1.24.2.2 jdolecek 132 1.24.2.2 jdolecek /* PPSB */ 133 1.24.2.2 jdolecek #define TEGRA_TIMER_OFFSET 0x00005000 134 1.24.2.2 jdolecek #define TEGRA_TIMER_SIZE 0x400 135 1.24.2.2 jdolecek #define TEGRA_CAR_OFFSET 0x00006000 136 1.24.2.2 jdolecek #define TEGRA_CAR_SIZE 0x1000 137 1.24.2.2 jdolecek #define TEGRA_GPIO_OFFSET 0x0000d000 138 1.24.2.2 jdolecek #define TEGRA_GPIO_SIZE 0x00000800 139 1.24.2.2 jdolecek #define TEGRA_EVP_OFFSET 0x0000f000 140 1.24.2.2 jdolecek #define TEGRA_EVP_SIZE 0x1000 141 1.24.2.2 jdolecek 142 1.24.2.2 jdolecek /* AHB_A2 */ 143 1.24.2.2 jdolecek #define TEGRA_USB1_OFFSET 0x01000000 144 1.24.2.2 jdolecek #define TEGRA_USB1_SIZE 0x1800 145 1.24.2.2 jdolecek #define TEGRA_USB2_OFFSET 0x01004000 146 1.24.2.2 jdolecek #define TEGRA_USB2_SIZE 0x1800 147 1.24.2.2 jdolecek #define TEGRA_USB3_OFFSET 0x01008000 148 1.24.2.2 jdolecek #define TEGRA_USB3_SIZE 0x1800 149 1.24.2.2 jdolecek 150 1.24.2.2 jdolecek /* Graphics Host (GHOST) */ 151 1.24.2.2 jdolecek #define TEGRA_DISPLAYA_OFFSET 0x00200000 152 1.24.2.2 jdolecek #define TEGRA_DISPLAYA_SIZE 0x00040000 153 1.24.2.2 jdolecek #define TEGRA_DISPLAYB_OFFSET 0x00240000 154 1.24.2.2 jdolecek #define TEGRA_DISPLAYB_SIZE 0x00040000 155 1.24.2.2 jdolecek #define TEGRA_HDMI_OFFSET 0x00280000 156 1.24.2.2 jdolecek #define TEGRA_HDMI_SIZE 0x00040000 157 1.24.2.2 jdolecek #define TEGRA_SOR_OFFSET 0x00540000 158 1.24.2.2 jdolecek #define TEGRA_SOR_SIZE 0x00040000 159 1.24.2.2 jdolecek #define TEGRA_DPAUX_OFFSET 0x005c0000 160 1.24.2.2 jdolecek #define TEGRA_DPAUX_SIZE 0x00040000 161 1.24.2.2 jdolecek 162 1.24.2.2 jdolecek #endif /* _ARM_TEGRA_REG_H */ 163
Indexes created Sun Oct 26 18:09:56 GMT 2025