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History log of /src/sys/arch/arm/nvidia/tegra_reg.h
RevisionDateAuthorComments
 1.25  01-Apr-2018  ryo Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
 1.24  21-Jul-2017  jmcneill branches: 1.24.2; 1.24.4;
Add support for NVIDIA Tegra X1.
 1.23  30-May-2017  jmcneill Fix VERBOSE_INIT_ARM build with TEGRA kernel.
 1.22  21-Apr-2017  jmcneill Get the physical memory layout from the /memory node instead of reading
from the memory controller registers.
 1.21  26-Mar-2016  skrll branches: 1.21.2;
Restore HOST1X and AHB_A2 to pmap_devmap to give pmap less work to do
 1.20  21-Nov-2015  jmcneill Add SOC_THERM temperature sensor driver:

# envstat -d tegrasoctherm0
Current CritMax WarnMax WarnMin CritMin Unit
CPU0: 27.500 degC
CPU1: 27.500 degC
CPU2: 29.500 degC
CPU3: 29.000 degC
MEM0: 26.500 degC
MEM1: 27.000 degC
GPU: 27.000 degC
PLLX: 28.000 degC
 1.19  21-Nov-2015  jmcneill Add FUSE driver, use it to determine maximum CPU frequency for the board.
Retire CPUFREQ_BOOT option and always use highest available CPU frequency.
 1.18  19-Nov-2015  jmcneill Remove HOST1X and AHB_A2 from pmap_devmap
 1.17  14-Nov-2015  jakllsch Jetson TK1 u-boot sets up PCI IO space in an impossible-to-use
configuration. As we're already allocating resources on the PCI
bus, set up our own mapping of PCI address spaces into the ARM
address space. We rely on a potential overlap of address space
windows to allow us to use the same bus_space_tag for PCI Memory
and IO spaces.

The PCI attachment of the onboard re(4) uses PCI IO space in
preference to PCI Memory space for register accessses. As IO space
was impossible to use, we had to avoid IO space. This is now no
longer the case, so set up and enable IO space for PCI devices.

Also, map ROM BARs.
 1.16  14-Nov-2015  jakllsch Correct TEGRA_PCIE_A[123] window definitions. Replace existing
usages thereof (and related bus space handles, etc.) with more
appropriate names.
 1.15  14-Nov-2015  jakllsch Increment TEGRA_PCIE_SIZE

It's a size, not a last-valid-offset.
 1.14  17-Oct-2015  jmcneill add GPU, SOR, and DPAUX offsets
 1.13  01-Aug-2015  jmcneill Add driver for Tegra HDMI CEC controller.
 1.12  30-May-2015  jmcneill Tegra K1 Watchdog support.
 1.11  18-May-2015  jmcneill Power-on Host1x subsystem
 1.10  17-May-2015  jmcneill add graphics host offsets
 1.9  10-May-2015  jmcneill Tegra I2C driver
 1.8  07-May-2015  jmcneill add Tegra MPIO / Pinmux driver
 1.7  03-May-2015  jmcneill UART clock source is PLLP. Set com type to COM_TYPE_TEGRA.
 1.6  03-May-2015  jmcneill Add Tegra K1 PCIE support.
 1.5  02-May-2015  jmcneill add GPIO support
 1.4  28-Apr-2015  jmcneill Add a basic driver for the Clock and Reset controller, use it to determine
CPU frequency.
 1.3  26-Apr-2015  jmcneill add Tegra124 MP support
 1.2  26-Apr-2015  jmcneill add AHB_A2 to devmap, print SCTLR value in initarm
 1.1  29-Mar-2015  jmcneill branches: 1.1.2;
NVIDIA Tegra K1 support, work in progress.
 1.1.2.7  28-Aug-2017  skrll Sync with HEAD
 1.1.2.6  22-Apr-2016  skrll Sync with HEAD
 1.1.2.5  27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.4  22-Sep-2015  skrll Sync with HEAD
 1.1.2.3  06-Jun-2015  skrll Sync with HEAD
 1.1.2.2  06-Apr-2015  skrll Sync with HEAD
 1.1.2.1  29-Mar-2015  skrll file tegra_reg.h was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.21.2.1  26-Apr-2017  pgoyette Sync with HEAD
 1.24.4.1  07-Apr-2018  pgoyette Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
 1.24.2.2  03-Dec-2017  jdolecek update from HEAD
 1.24.2.1  21-Jul-2017  jdolecek file tegra_reg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000

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