1 /* $NetBSD: obs600_machdep.c,v 1.17 2022/01/15 10:55:06 msaitoh Exp $ */ 2 /* Original: md_machdep.c,v 1.3 2005/01/24 18:47:37 shige Exp $ */ 3 4 /* 5 * Copyright 2001, 2002 Wasabi Systems, Inc. 6 * All rights reserved. 7 * 8 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed for the NetBSD Project by 21 * Wasabi Systems, Inc. 22 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 23 * or promote products derived from this software without specific prior 24 * written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 41 * Copyright (C) 1995, 1996 TooLs GmbH. 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by TooLs GmbH. 55 * 4. The name of TooLs GmbH may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 60 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 61 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 62 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 63 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 64 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 65 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 66 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 67 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 #include <sys/cdefs.h> 71 __KERNEL_RCSID(0, "$NetBSD: obs600_machdep.c,v 1.17 2022/01/15 10:55:06 msaitoh Exp $"); 72 73 #include "opt_ddb.h" 74 75 #include <sys/param.h> 76 #include <sys/bus.h> 77 #include <sys/device.h> 78 #include <sys/errno.h> 79 #include <sys/kernel.h> 80 #include <sys/module.h> 81 #include <sys/reboot.h> 82 #include <sys/systm.h> 83 84 #include <machine/obs600.h> 85 86 #include <powerpc/spr.h> 87 #include <powerpc/ibm4xx/spr.h> 88 89 #include <powerpc/ibm4xx/amcc405ex.h> 90 #include <powerpc/ibm4xx/cpu.h> 91 #include <powerpc/ibm4xx/dcr4xx.h> 92 #include <powerpc/ibm4xx/tlb.h> 93 94 #include <powerpc/ibm4xx/dev/gpiicreg.h> 95 #include <powerpc/ibm4xx/dev/opbvar.h> 96 97 #include "com.h" 98 #if (NCOM > 0) 99 #include <sys/termios.h> 100 #include <powerpc/ibm4xx/dev/comopbvar.h> 101 #include <dev/ic/comreg.h> 102 103 #ifndef CONADDR 104 #define CONADDR AMCC405EX_UART0_BASE 105 #endif 106 #ifndef CONSPEED 107 #define CONSPEED B115200 108 #endif 109 #ifndef CONMODE 110 /* 8N1 */ 111 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) 112 #endif 113 #endif /* NCOM */ 114 115 /* 116 * XXXX: 117 * It is very troublesome though we can calculate from various registers. X-< 118 */ 119 #define OBS600_CPU_FREQ (600 * 1000 * 1000) 120 #define OBS600_MEM_SIZE (1 * 1024 * 1024 * 1024) 121 122 #define TLB_PG_SIZE (16 * 1024 * 1024) 123 124 void initppc(vaddr_t, vaddr_t, int, char *[], char *); 125 static int read_eeprom(int, char *); 126 127 128 void 129 initppc(vaddr_t startkernel, vaddr_t endkernel, int argc, char *argv[], 130 char *argstr) 131 { 132 vaddr_t va; 133 u_int memsize; 134 135 memsize = OBS600_MEM_SIZE; 136 137 /* Linear map kernel memory */ 138 for (va = 0; va < endkernel; va += TLB_PG_SIZE) 139 ppc4xx_tlb_reserve(va, va, TLB_PG_SIZE, TLB_EX); 140 141 /* 142 * Map console and I2C after RAM. (see pmap_tlbmiss()) 143 * All peripherals mapped on a page. 144 */ 145 ppc4xx_tlb_reserve(AMCC405EX_OPB_BASE, roundup(memsize, TLB_PG_SIZE), 146 TLB_PG_SIZE, TLB_I | TLB_G); 147 148 /* Initialize AMCC 405EX CPU */ 149 ibm40x_memsize_init(memsize, startkernel); 150 ibm4xx_init(startkernel, endkernel, pic_ext_intr); 151 152 #ifdef DDB 153 if (boothowto & RB_KDB) 154 Debugger(); 155 #endif 156 } 157 158 void 159 consinit(void) 160 { 161 162 #if (NCOM > 0) 163 com_opb_cnattach(OBS600_COM_FREQ, CONADDR, CONSPEED, CONMODE); 164 #endif /* NCOM */ 165 } 166 167 /* 168 * Machine dependent startup code. 169 */ 170 void 171 cpu_startup(void) 172 { 173 prop_number_t pn; 174 prop_data_t pd; 175 u_char *macaddr, *macaddr1; 176 static u_char buf[16]; /* MAC address x2 buffer */ 177 178 /* 179 * cpu common startup 180 */ 181 ibm4xx_cpu_startup("OpenBlockS600 AMCC PowerPC 405EX Board"); 182 183 /* 184 * Set up the board properties database. 185 */ 186 board_info_init(); 187 188 pn = prop_number_create_integer(OBS600_CPU_FREQ); 189 KASSERT(pn != NULL); 190 if (prop_dictionary_set(board_properties, "processor-frequency", pn) == 191 false) 192 panic("setting processor-frequency"); 193 prop_object_release(pn); 194 195 pn = prop_number_create_integer(OBS600_MEM_SIZE); 196 KASSERT(pn != NULL); 197 if (prop_dictionary_set(board_properties, "mem-size", pn) == false) 198 panic("setting mem-size"); 199 prop_object_release(pn); 200 201 calc_delayconst(); /* required by read_eeprom() */ 202 203 #define ETHER_ADDR_LEN 6 204 205 read_eeprom(sizeof(buf), buf); 206 macaddr = &buf[0]; 207 macaddr1 = &buf[8]; 208 209 pd = prop_data_create_data_nocopy(macaddr, ETHER_ADDR_LEN); 210 KASSERT(pd != NULL); 211 if (prop_dictionary_set(board_properties, "emac0-mac-addr", pd) == 212 false) 213 panic("setting emac0-mac-addr"); 214 prop_object_release(pd); 215 pd = prop_data_create_data_nocopy(macaddr1, ETHER_ADDR_LEN); 216 KASSERT(pd != NULL); 217 if (prop_dictionary_set(board_properties, "emac1-mac-addr", pd) == 218 false) 219 panic("setting emac1-mac-addr"); 220 prop_object_release(pd); 221 222 /* emac0 connects to phy 2 and emac1 to phy 3 via RGMII. */ 223 pn = prop_number_create_integer(2); 224 KASSERT(pn != NULL); 225 if (prop_dictionary_set(board_properties, "emac0-mii-phy", pn) == false) 226 panic("setting emac0-mii-phy"); 227 prop_object_release(pn); 228 pn = prop_number_create_integer(3); 229 KASSERT(pn != NULL); 230 if (prop_dictionary_set(board_properties, "emac1-mii-phy", pn) == false) 231 panic("setting emac1-mii-phy"); 232 prop_object_release(pn); 233 234 /* 235 * Now that we have VM, malloc()s are OK in bus_space. 236 */ 237 bus_space_mallocok(); 238 239 /* 240 * no fake mapiodev 241 */ 242 fake_mapiodev = 0; 243 244 splraise(-1); 245 } 246 247 /* 248 * Read EEPROM via I2C. We don't use bus_space(9) here. This is MD-part and, 249 * don't support bus_space_unmap() to a space on reserved space? X-< 250 * 251 * XXXX: Also this function assume already initialized for I2C... 252 */ 253 static int 254 read_eeprom(int len, char *buf) 255 { 256 volatile uint8_t *iic0; 257 #define IIC0_READ(r) (*(iic0 + (r))) 258 #define IIC0_WRITE(r, v) (*(iic0 + (r)) = (v)) 259 uint8_t sts; 260 int cnt, i = 0; 261 262 #define I2C_EEPROM_ADDR 0x52 263 264 if ((iic0 = ppc4xx_tlb_mapiodev(AMCC405EX_IIC0_BASE, IIC_NREG)) == NULL) 265 return ENOMEM; /* ??? */ 266 267 /* Clear Stop Complete Bit */ 268 IIC0_WRITE(IIC_STS, IIC_STS_SCMP); 269 /* Check init */ 270 do { 271 /* Get status */ 272 sts = IIC0_READ(IIC_STS); 273 } while ((sts & IIC_STS_PT)); 274 275 IIC0_WRITE(IIC_MDCNTL, 276 IIC0_READ(IIC_MDCNTL) | IIC_MDCNTL_FMDB | IIC_MDCNTL_FSDB); 277 278 /* 7-bit addressing */ 279 IIC0_WRITE(IIC_HMADR, 0); 280 IIC0_WRITE(IIC_LMADR, I2C_EEPROM_ADDR << 1); 281 282 IIC0_WRITE(IIC_MDBUF, 0); 283 IIC0_WRITE(IIC_CNTL, IIC_CNTL_PT); 284 do { 285 /* Get status */ 286 sts = IIC0_READ(IIC_STS); 287 } while ((sts & IIC_STS_PT) && !(sts & IIC_STS_ERR)); 288 289 cnt = 0; 290 while (cnt < len) { 291 /* always read 4byte */ 292 IIC0_WRITE(IIC_CNTL, 293 IIC_CNTL_PT | 294 IIC_CNTL_RW | 295 ((cnt == 0) ? IIC_CNTL_RPST : 0) | 296 IIC_CNTL_TCT); 297 do { 298 /* Get status */ 299 sts = IIC0_READ(IIC_STS); 300 } while ((sts & IIC_STS_PT) && !(sts & IIC_STS_ERR)); 301 302 if ((sts & IIC_STS_PT) || (sts & IIC_STS_ERR)) 303 break; 304 if (sts & IIC_STS_MDBS) { 305 delay(1); 306 /* read 4byte */ 307 for (i = 0; i < 4 && cnt < len; i++, cnt++) 308 buf[cnt] = IIC0_READ(IIC_MDBUF); 309 } 310 } 311 for ( ; i < 4; i++) 312 (void) IIC0_READ(IIC_MDBUF); 313 314 return (cnt == len) ? 0 : EINVAL; 315 } 316
Indexes created Fri Sep 26 08:10:20 GMT 2025