README.models revision 1.3
1 # $NetBSD: README.models,v 1.3 2016/06/18 12:53:21 maya Exp $ 2 3 MIPS models and architecture levels 4 ----------------------------------- 5 6 Since this is a complex and confusing topic and there's a shortage of 7 information (especially, a shortage of reliable information), I'm 8 creating this document as a reference for people doing MIPS stuff on 9 NetBSD (and elsewhere). 10 11 Citations appear in []. With luck all important facts have citations. 12 13 14 ------------------------------------------------------------ 15 1. Architecture levels. 16 17 These architecture levels exist: 18 19 32-bit 64-bit 20 21 MIPS-I 22 MIPS-II 23 MIPS-III 24 MIPS-IV 25 MIPS-V 26 MIPS32 MIPS64 27 MIPS32r2 MIPS64r2 28 MIPS32r3 MIPS64r3 29 MIPS32r4 MIPS64r4 30 MIPS32r5 MIPS64r5 31 MIPS32r6 MIPS64r6 32 33 Note that while MIPS32 is a 32-bit subset of MIPS64, each 34 corresponding pair of MIPS32rN and MIPS64rN are comparable in age and 35 properties. Later revisions (further down the list) are mostly supersets 36 of earlier revisions, although some exceptions exist. 37 38 39 ------------------------------------------------------------ 40 2. CPU models. 41 42 For vintage MIPS these are the standard models as of fall 1996 [idt96 43 A-198] and the corresponding architecture levels. (There were many 44 additional models put out by licensees or by the MIPS company itself, 45 which have model numbers with fewer zeros.) 46 47 R2000 MIPS-I (32-bit) [idt96 1-5] 48 R3000 MIPS-I (32-bit) [idt96 1-5] 49 R4000 MIPS-III (64-bit) [idt96 A-197] 50 R4200 MIPS-III (64-bit) [idt96 A-197] 51 R4300 MIPS-III (64-bit) [idt96 A-197] 52 R4400 MIPS-III (64-bit) [idt96 A-197] 53 R4600 MIPS-III (64-bit) [idt96 A-197] 54 R5000 MIPS-IV (64-bit) [idt96 1-5] 55 R6000 MIPS-II ?? 56 R8000 MIPS-IV (64-bit) [idt96 1-5] 57 R10000 MIPS-IV (64-bit) [idt96 1-5] 58 R1x000 MIPS-IV (64-bit) 59 60 For later models than this I currently have no information. 61 62 63 ------------------------------------------------------------ 64 3. CPU models present in various systems. 65 66 These are the CPU models found in various systems NetBSD does and 67 doesn't support. This table also notes endianness; MIPS chips are 68 bi-endian but are wired up one way or the other on motherboards. 69 70 algor (little-endian [buildsh]) 71 Algorithmics P-4000i ?? 72 Algorithmics P-4032 ?? 73 Algorithmics P-5064 ?? 74 Algorithmics P-6032 ?? 75 arc (little-endian [buildsh]) 76 Acer PICA ?? 77 MIPS Magnum 4000 ?? 78 NEC Image RISCstation ?? 79 NEC Express RISCserver ?? 80 NEC RISCserver 2200 ?? 81 NEC RISCstation 2200 ?? 82 NEC RISCstation 2250 ?? 83 NEC Express5800/230 R4400 PCI presumably R4400 (MIPS-III) 84 NEC Express5800/240 R4400 EISA presumably R4400 (MIPS-III) 85 DeskStation Tyne ?? 86 cobalt (little-endian [buildsh]) 87 Qube ... ?? ?? 88 RaQ ... ?? ?? 89 emips (big-endian [buildsh]) 90 ... ?? ?? 91 (see http://research.microsoft.com/en-us/projects/emips/ ) 92 evbmips 93 Loongson 2F ( gdium, lemote etc. ) more or less LE MIPS-III with 94 some extensions 95 xburst ( as in, jz4780, found on CI20 ) LE MIPS32R2 with extensions 96 ... ?? ?? (various-endian) 97 ews4800mips (big-endian [buildsh]) 98 EWS4800/350 ?? 99 EWS4800/350F ?? 100 EWS4800/360AD ?? 101 EWS4800/360ADII ?? 102 EWS4800/360SX ?? 103 EWS4800/360EX ?? 104 EWS4800/360 ?? 105 ... ?? ?? 106 hpcmips (big-endian [buildsh]) 107 see http://wiki.netbsd.org/ports/hpcmips/processor_comparison/ 108 mipsco (big-endian [buildsh]) 109 Mips Magnum 3000 Workstation ?? 110 Mips 3230 Server ?? 111 Bull DPX/Prostation M-20 ?? 112 newsmips (big-endian [buildsh]) 113 NWS-3470D R3000 (MIPS-I) [portpage] 114 NWS-3410 R3000 (MIPS-I) [portpage] 115 NWS-3460 R3000 (MIPS-I) [portpage] 116 NWS-3710 R3000 (MIPS-I) [portpage] 117 NWS-3720 R3000 (MIPS-I) [portpage] 118 NWS-3800 series ?? 119 NWS-4000 series R4600 (MIPS-III) [portpage] 120 NWS-5000 R4[04]00 (MIPS-III) [portpage] 121 playstation2 (little-endian [buildsh]) 122 playstation2 R5900 123 (almost all of MIPS-III + movn/movz) [linux-mips wiki R5900] 124 pmax (little-endian [buildsh]) 125 DECstation/system 2100 and 3100 R2000 (MIPS-I) [portpage] 126 DECsystem 5100 R3000 (MIPS-I) [portpage] 127 Personal DECstation 5000/20, /25, /33 R3000 (MIPS-I) [portpage] 128 Personal DECstation 5000/50 R4000 (MIPS-III) [portpage] 129 DECstation/system 5000/120, /125, /133 R3000 (MIPS-I) [portpage] 130 DECstation/system 5000/150 R4000 (MIPS-III) [portpage] 131 DECstation/system 5000/200 R3000 (MIPS-I) [portpage] 132 DECstation/system 5000/240 R3000 (MIPS-I) [portpage] 133 DECstation/system 5000/260 R4400 (MIPS-III) [portpage] 134 DECsystem 5900 R3000 (MIPS-I) [portpage] 135 DECsystem 5900-260 R4400 (MIPS-III) [portpage] 136 DECsystem 5500 R3000 (MIPS-I) [portpage] 137 sbmips 138 BCM91250A (Swarm) evaluation board Broadcomm BCM1250 [portpage] 139 sgimips (big-endian [buildsh]) 140 4D/20 ?? 141 4D/25 ?? 142 Indigo R3000 (MIPS-I) [portpage] 143 Indigo (R4x00) R4?00 (MIPS-III) [portpage] 144 4D/30 ?? 145 4D/35 ?? 146 Indigo2 (R4x00) R4?00 (MIPS-III) [portpage] 147 Challenge M ?? 148 Indy (R4x00) R4?00 (MIPS-III) [portpage] 149 Indy (R5000) R5000 (MIPS-IV) [portpage] 150 Challenge S (R4x00) R4?00 (MIPS-III) [portpage] 151 Challenge S (R5000) R5000 (MIPS-IV) [portpage] 152 R10000 Power Indigo2 R10000 (MIPS-IV) [portpage] 153 Octane R1x000 (MIPS-IV) [portpage] 154 O2 (R5000) R5000 (MIPS-IV) [portpage] 155 O2 (RM5200) RM5200 (MIPS-IV) [portpage] 156 O2 (R7000) R7000 (MIPS-IV) [portpage] 157 O2 (R10000) R10000 (MIPS-IV) [portpage] 158 O2 (R12000) R12000 (MIPS-IV) [portpage] 159 O2 (R14000) R14000 (MIPS-IV) [portpage] 160 Fuel R1x000 (MIPS-IV) [portpage] 161 Tezro R1x000 (MIPS-IV) [portpage] 162 ... ?? 163 164 165 ------------------------------------------------------------ 166 4. FPU properties 167 168 TBD... this is complex and messy (XXX / ??) 169 170 171 ------------------------------------------------------------ 172 5. Exception handling properties 173 174 TBD... (XXX / ??) 175 176 177 ------------------------------------------------------------ 178 6. MMU properties 179 180 TBD... (XXX / ??) 181 182 183 ------------------------------------------------------------ 184 7. Cache properties 185 186 TBD... (XXX / ??) 187 188 189 ------------------------------------------------------------ 190 8. Instruction ordering properties and hazards 191 192 TBD... (XXX / ??) 193 194 In the absence of the SYNC instruction before MIPS-II [idt96 A-172, 195 mips32insn 215], apparently on a R3000 you can force pending memory 196 writes to complete by doing an uncached read. [idt96 11-13] 197 198 Apparently also on some models but not others the state of the write 199 buffer is wired to the coprocessor 0 condition bit and you can also do 200 this by using the otherwise useless bc0f instruction (branch on 201 coprocessor 0 false) to loop. [no citation, I found this in passing 202 the other day with Google while looking for something else] 203 204 205 ------------------------------------------------------------ 206 9. Pipeline hazards 207 208 TBD... (XXX / ??) 209 210 On MIPS-I a load instruction requires an explicit one-cycle wait 211 before using the result. This restriction was lifted in MIPS-II, 212 with the addition of an interlock in the pipeline. [idt96 A-2] 213 214 A multiply should not be started within two cycles of a MFHI or MFLO 215 instruction, as an interrupt that requires restarting the MFHI or MFLO 216 might (will) get the result from the subsequent multiply. At least on 217 MIPS-I. [idt96 2-4] I guess this is true for divides as well. 218 219 220 ------------------------------------------------------------ 221 10. Coprocessor 0 hazards 222 223 TBD... (XXX / ??) 224 225 226 ---------------------------------------------------------------------- 227 11. Deprecated/removed material. 228 229 When the exception handling model was changed for MIPS-III 230 (introducing the ERET instruction) the RFE instruction supporting the 231 old model was removed. [idt96 A-134] 232 233 Coprocessor 3 (that is, the ability to have a third coprocessor, which 234 had never been used for anything) was removed in MIPS-III [idt96 A-197]. 235 236 The branch likely instructions (e.g. BEQL) were added in MIPS-II 237 [mips32insn 56] and deprecated not long after, at least by MIPS32 238 [mips32insn 57] and were removed in release MIPS32 Release 6 239 [mips32newinsn2a 71]. 240 241 SSNOP as a special NOP was deprecated in MIPS32/64 Release 6 242 [mips32newinsn2a 375] and sequences using ssnop should include the 243 new EHB [mips32newinsn2a 174] ... and possibly SYNC/SYNCI ??? 244 [mips32newinsn2a 394-401] 245 246 ... ?? 247 248 ------------------------------------------------------------ 249 12. Conditional compilation in NetBSD 250 251 TBD... (XXX / ??) 252 253 254 ------------------------------------------------------------ 255 References: 256 257 [buildsh] The MACHINE/MACHINE_ARCH architecture table in NetBSD 258 build.sh. 259 260 [idt96] "IDT MIPS Microprocessor Family Software Reference Manual", 261 Integrated Device Technology, Version 2.0, dated October 1996. 262 263 [linux-mips wiki] https://www.linux-mips.org/wiki/ 264 265 [mips32intro] "MIPS32(TM) Architecture For Programmers Volume I: 266 Introduction to the MIPS32(TM) Architecture", MIPS 267 Technologies, Document Number MD00082, Revision 0.95, dated 268 March 2001. This was apparently an external review version or 269 something and has been available on the Internet; the final 270 version, and later revisions, never were. (AFAIK) 271 272 [mips32insn] "MIPS32(TM) Architecture For Programmers Volume II: The 273 MIPS32(TM) Instruction Set", MIPS Technologies, Document Number 274 MD00086, Revision 0.95, March 12, 2001. Ditto. 275 276 [mips32newinsn2a] "MIPS32(R) Architecture For Programmers Volume II-A: 277 The MIPS32(R) Instruction Set Manual", Imagination, Document 278 Number MD00086, Revision 6.02, dated December 10, 2014. 279 280 [mips32priv] "MIPS32(TM) Architecture For Programmers Volume III: The 281 MIPS32(TM) Privileged Resource Architecture", Document Number 282 MD00090, Revision 0.95, dated March 2001. Ditto. 283 284 [portpage] The port page for this NetBSD port on wiki.netbsd.org, or a 285 subpage. Ideally these references should be replaced something less self-referential. 286
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