ahci.c revision 1.12.6.13 1 1.12.6.13 skrll /* $NetBSD: ahci.c,v 1.12.6.13 2015/10/11 09:17:50 skrll Exp $ */
2 1.1 dyoung
3 1.1 dyoung /*-
4 1.1 dyoung * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
5 1.1 dyoung * All rights reserved.
6 1.1 dyoung *
7 1.1 dyoung * Redistribution and use in source and binary forms, with or
8 1.1 dyoung * without modification, are permitted provided that the following
9 1.1 dyoung * conditions are met:
10 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
11 1.1 dyoung * notice, this list of conditions and the following disclaimer.
12 1.1 dyoung * 2. Redistributions in binary form must reproduce the above
13 1.1 dyoung * copyright notice, this list of conditions and the following
14 1.1 dyoung * disclaimer in the documentation and/or other materials provided
15 1.1 dyoung * with the distribution.
16 1.1 dyoung * 3. The names of the authors may not be used to endorse or promote
17 1.1 dyoung * products derived from this software without specific prior
18 1.1 dyoung * written permission.
19 1.1 dyoung *
20 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
21 1.1 dyoung * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 1.1 dyoung * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
23 1.1 dyoung * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS
24 1.1 dyoung * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
25 1.1 dyoung * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 1.1 dyoung * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
27 1.1 dyoung * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 dyoung * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
29 1.1 dyoung * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 1.1 dyoung * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31 1.1 dyoung * OF SUCH DAMAGE.
32 1.1 dyoung */
33 1.1 dyoung /*
34 1.1 dyoung * Copyright (c) 2001 The NetBSD Foundation, Inc.
35 1.1 dyoung * All rights reserved.
36 1.1 dyoung *
37 1.1 dyoung * This code is derived from software contributed to The NetBSD Foundation
38 1.1 dyoung * by Tetsuya Isaki.
39 1.1 dyoung *
40 1.1 dyoung * Redistribution and use in source and binary forms, with or without
41 1.1 dyoung * modification, are permitted provided that the following conditions
42 1.1 dyoung * are met:
43 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
44 1.1 dyoung * notice, this list of conditions and the following disclaimer.
45 1.1 dyoung * 2. Redistributions in binary form must reproduce the above copyright
46 1.1 dyoung * notice, this list of conditions and the following disclaimer in the
47 1.1 dyoung * documentation and/or other materials provided with the distribution.
48 1.1 dyoung *
49 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
50 1.1 dyoung * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
51 1.1 dyoung * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
52 1.1 dyoung * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
53 1.1 dyoung * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
54 1.1 dyoung * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
55 1.1 dyoung * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
56 1.1 dyoung * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
57 1.1 dyoung * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
58 1.1 dyoung * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
59 1.1 dyoung * POSSIBILITY OF SUCH DAMAGE.
60 1.1 dyoung */
61 1.1 dyoung
62 1.1 dyoung /*
63 1.1 dyoung * !! HIGHLY EXPERIMENTAL CODE !!
64 1.1 dyoung */
65 1.1 dyoung
66 1.1 dyoung #include <sys/cdefs.h>
67 1.12.6.13 skrll __KERNEL_RCSID(0, "$NetBSD: ahci.c,v 1.12.6.13 2015/10/11 09:17:50 skrll Exp $");
68 1.1 dyoung
69 1.1 dyoung #include <sys/param.h>
70 1.1 dyoung #include <sys/systm.h>
71 1.1 dyoung #include <sys/kernel.h>
72 1.1 dyoung #include <sys/proc.h>
73 1.1 dyoung #include <sys/device.h>
74 1.12.6.8 skrll #include <sys/kmem.h>
75 1.1 dyoung
76 1.7 dyoung #include <sys/bus.h>
77 1.1 dyoung #include <machine/cpu.h>
78 1.1 dyoung
79 1.1 dyoung #include <dev/usb/usb.h>
80 1.1 dyoung #include <dev/usb/usbdi.h>
81 1.1 dyoung #include <dev/usb/usbdivar.h>
82 1.1 dyoung #include <dev/usb/usb_mem.h>
83 1.1 dyoung #include <dev/usb/usbdevs.h>
84 1.12.6.10 skrll #include <dev/usb/usbroothub.h>
85 1.1 dyoung
86 1.1 dyoung #include <mips/adm5120/include/adm5120reg.h>
87 1.1 dyoung #include <mips/adm5120/include/adm5120var.h>
88 1.1 dyoung #include <mips/adm5120/include/adm5120_obiovar.h>
89 1.1 dyoung
90 1.1 dyoung #include <mips/adm5120/dev/ahcireg.h>
91 1.1 dyoung #include <mips/adm5120/dev/ahcivar.h>
92 1.1 dyoung
93 1.12.6.12 skrll static usbd_status ahci_open(struct usbd_pipe *);
94 1.1 dyoung static void ahci_softintr(void *);
95 1.1 dyoung static void ahci_poll(struct usbd_bus *);
96 1.1 dyoung static void ahci_poll_hub(void *);
97 1.1 dyoung static void ahci_poll_device(void *arg);
98 1.12.6.13 skrll static struct usbd_xfer *
99 1.12.6.13 skrll ahci_allocx(struct usbd_bus *, unsigned int);
100 1.12.6.12 skrll static void ahci_freex(struct usbd_bus *, struct usbd_xfer *);
101 1.1 dyoung
102 1.12 skrll static void ahci_get_lock(struct usbd_bus *, kmutex_t **);
103 1.12.6.10 skrll static int ahci_roothub_ctrl(struct usbd_bus *, usb_device_request_t *,
104 1.12.6.10 skrll void *, int);
105 1.1 dyoung
106 1.12.6.12 skrll static usbd_status ahci_root_intr_transfer(struct usbd_xfer *);
107 1.12.6.12 skrll static usbd_status ahci_root_intr_start(struct usbd_xfer *);
108 1.12.6.12 skrll static void ahci_root_intr_abort(struct usbd_xfer *);
109 1.12.6.12 skrll static void ahci_root_intr_close(struct usbd_pipe *);
110 1.12.6.12 skrll static void ahci_root_intr_done(struct usbd_xfer *);
111 1.12.6.12 skrll
112 1.12.6.12 skrll static usbd_status ahci_device_ctrl_transfer(struct usbd_xfer *);
113 1.12.6.12 skrll static usbd_status ahci_device_ctrl_start(struct usbd_xfer *);
114 1.12.6.12 skrll static void ahci_device_ctrl_abort(struct usbd_xfer *);
115 1.12.6.12 skrll static void ahci_device_ctrl_close(struct usbd_pipe *);
116 1.12.6.12 skrll static void ahci_device_ctrl_done(struct usbd_xfer *);
117 1.12.6.12 skrll
118 1.12.6.12 skrll static usbd_status ahci_device_intr_transfer(struct usbd_xfer *);
119 1.12.6.12 skrll static usbd_status ahci_device_intr_start(struct usbd_xfer *);
120 1.12.6.12 skrll static void ahci_device_intr_abort(struct usbd_xfer *);
121 1.12.6.12 skrll static void ahci_device_intr_close(struct usbd_pipe *);
122 1.12.6.12 skrll static void ahci_device_intr_done(struct usbd_xfer *);
123 1.12.6.12 skrll
124 1.12.6.12 skrll static usbd_status ahci_device_isoc_transfer(struct usbd_xfer *);
125 1.12.6.12 skrll static usbd_status ahci_device_isoc_start(struct usbd_xfer *);
126 1.12.6.12 skrll static void ahci_device_isoc_abort(struct usbd_xfer *);
127 1.12.6.12 skrll static void ahci_device_isoc_close(struct usbd_pipe *);
128 1.12.6.12 skrll static void ahci_device_isoc_done(struct usbd_xfer *);
129 1.12.6.12 skrll
130 1.12.6.12 skrll static usbd_status ahci_device_bulk_transfer(struct usbd_xfer *);
131 1.12.6.12 skrll static usbd_status ahci_device_bulk_start(struct usbd_xfer *);
132 1.12.6.12 skrll static void ahci_device_bulk_abort(struct usbd_xfer *);
133 1.12.6.12 skrll static void ahci_device_bulk_close(struct usbd_pipe *);
134 1.12.6.12 skrll static void ahci_device_bulk_done(struct usbd_xfer *);
135 1.1 dyoung
136 1.1 dyoung static int ahci_transaction(struct ahci_softc *,
137 1.12.6.12 skrll struct usbd_pipe *, uint8_t, int, u_char *, uint8_t);
138 1.12.6.12 skrll static void ahci_noop(struct usbd_pipe *);
139 1.12.6.12 skrll static void ahci_abort_xfer(struct usbd_xfer *, usbd_status);
140 1.12.6.12 skrll static void ahci_device_clear_toggle(struct usbd_pipe *);
141 1.1 dyoung
142 1.1 dyoung extern int usbdebug;
143 1.1 dyoung extern int uhubdebug;
144 1.1 dyoung extern int umassdebug;
145 1.1 dyoung int ahci_dummy;
146 1.1 dyoung
147 1.1 dyoung #define AHCI_DEBUG
148 1.1 dyoung
149 1.1 dyoung #ifdef AHCI_DEBUG
150 1.1 dyoung #define D_TRACE (0x0001) /* function trace */
151 1.1 dyoung #define D_MSG (0x0002) /* debug messages */
152 1.1 dyoung #define D_XFER (0x0004) /* transfer messages (noisy!) */
153 1.1 dyoung #define D_MEM (0x0008) /* memory allocation */
154 1.1 dyoung
155 1.1 dyoung int ahci_debug = 0;
156 1.1 dyoung #define DPRINTF(z,x) if((ahci_debug&(z))!=0)printf x
157 1.1 dyoung void print_req(usb_device_request_t *);
158 1.1 dyoung void print_req_hub(usb_device_request_t *);
159 1.1 dyoung void print_dumpreg(struct ahci_softc *);
160 1.12.6.12 skrll void print_xfer(struct usbd_xfer *);
161 1.1 dyoung #else
162 1.1 dyoung #define DPRINTF(z,x)
163 1.1 dyoung #endif
164 1.1 dyoung
165 1.1 dyoung
166 1.1 dyoung struct usbd_bus_methods ahci_bus_methods = {
167 1.12.6.3 skrll .ubm_open = ahci_open,
168 1.12.6.3 skrll .ubm_softint = ahci_softintr,
169 1.12.6.3 skrll .ubm_dopoll = ahci_poll,
170 1.12.6.3 skrll .ubm_allocx = ahci_allocx,
171 1.12.6.3 skrll .ubm_freex = ahci_freex,
172 1.12.6.3 skrll .ubm_getlock = ahci_get_lock,
173 1.12.6.10 skrll .ubm_rhctrl = ahci_roothub_ctrl,
174 1.1 dyoung };
175 1.1 dyoung
176 1.1 dyoung struct usbd_pipe_methods ahci_root_intr_methods = {
177 1.12.6.3 skrll .upm_transfer = ahci_root_intr_transfer,
178 1.12.6.3 skrll .upm_start = ahci_root_intr_start,
179 1.12.6.3 skrll .upm_abort = ahci_root_intr_abort,
180 1.12.6.3 skrll .upm_close = ahci_root_intr_close,
181 1.12.6.3 skrll .upm_cleartoggle = ahci_noop,
182 1.12.6.3 skrll .upm_done = ahci_root_intr_done,
183 1.1 dyoung };
184 1.1 dyoung
185 1.1 dyoung struct usbd_pipe_methods ahci_device_ctrl_methods = {
186 1.12.6.3 skrll .upm_transfer = ahci_device_ctrl_transfer,
187 1.12.6.3 skrll .upm_start = ahci_device_ctrl_start,
188 1.12.6.3 skrll .upm_abort = ahci_device_ctrl_abort,
189 1.12.6.3 skrll .upm_close = ahci_device_ctrl_close,
190 1.12.6.3 skrll .upm_cleartoggle = ahci_noop,
191 1.12.6.3 skrll .upm_done = ahci_device_ctrl_done,
192 1.1 dyoung };
193 1.1 dyoung
194 1.1 dyoung struct usbd_pipe_methods ahci_device_intr_methods = {
195 1.12.6.3 skrll .upm_transfer = ahci_device_intr_transfer,
196 1.12.6.3 skrll .upm_start = ahci_device_intr_start,
197 1.12.6.3 skrll .upm_abort = ahci_device_intr_abort,
198 1.12.6.3 skrll .upm_close = ahci_device_intr_close,
199 1.12.6.3 skrll .upm_cleartoggle = ahci_device_clear_toggle,
200 1.12.6.3 skrll .upm_done = ahci_device_intr_done,
201 1.1 dyoung };
202 1.1 dyoung
203 1.1 dyoung struct usbd_pipe_methods ahci_device_isoc_methods = {
204 1.12.6.3 skrll .upm_transfer = ahci_device_isoc_transfer,
205 1.12.6.3 skrll .upm_start = ahci_device_isoc_start,
206 1.12.6.3 skrll .upm_abort = ahci_device_isoc_abort,
207 1.12.6.3 skrll .upm_close = ahci_device_isoc_close,
208 1.12.6.3 skrll .upm_cleartoggle = ahci_noop,
209 1.12.6.3 skrll .upm_done = ahci_device_isoc_done,
210 1.1 dyoung };
211 1.1 dyoung
212 1.1 dyoung struct usbd_pipe_methods ahci_device_bulk_methods = {
213 1.12.6.3 skrll .upm_transfer = ahci_device_bulk_transfer,
214 1.12.6.3 skrll .upm_start = ahci_device_bulk_start,
215 1.12.6.3 skrll .upm_abort = ahci_device_bulk_abort,
216 1.12.6.3 skrll .upm_close = ahci_device_bulk_close,
217 1.12.6.3 skrll .upm_cleartoggle = ahci_device_clear_toggle,
218 1.12.6.3 skrll .upm_done = ahci_device_bulk_done,
219 1.1 dyoung };
220 1.1 dyoung
221 1.1 dyoung struct ahci_pipe {
222 1.1 dyoung struct usbd_pipe pipe;
223 1.12.6.1 skrll uint32_t toggle;
224 1.1 dyoung };
225 1.1 dyoung
226 1.9 chs static int ahci_match(device_t, cfdata_t, void *);
227 1.4 dyoung static void ahci_attach(device_t, device_t, void *);
228 1.1 dyoung
229 1.9 chs CFATTACH_DECL_NEW(ahci, sizeof(struct ahci_softc),
230 1.1 dyoung ahci_match, ahci_attach, NULL, NULL);
231 1.1 dyoung
232 1.1 dyoung static int
233 1.4 dyoung ahci_match(device_t parent, struct cfdata *cf, void *aux)
234 1.1 dyoung {
235 1.1 dyoung struct obio_attach_args *aa = aux;
236 1.1 dyoung
237 1.1 dyoung if (strcmp(aa->oba_name, cf->cf_name) == 0)
238 1.12.6.11 skrll return 1;
239 1.1 dyoung
240 1.12.6.11 skrll return 0;
241 1.1 dyoung }
242 1.1 dyoung
243 1.1 dyoung #define REG_READ(o) bus_space_read_4(sc->sc_st, sc->sc_ioh, (o))
244 1.1 dyoung #define REG_WRITE(o,v) bus_space_write_4(sc->sc_st, sc->sc_ioh, (o),(v))
245 1.1 dyoung
246 1.1 dyoung /*
247 1.1 dyoung * Attach SL11H/SL811HS. Return 0 if success.
248 1.1 dyoung */
249 1.1 dyoung void
250 1.4 dyoung ahci_attach(device_t parent, device_t self, void *aux)
251 1.1 dyoung {
252 1.1 dyoung struct obio_attach_args *aa = aux;
253 1.4 dyoung struct ahci_softc *sc = device_private(self);
254 1.1 dyoung
255 1.1 dyoung printf("\n");
256 1.1 dyoung sc->sc_dmat = aa->oba_dt;
257 1.1 dyoung sc->sc_st = aa->oba_st;
258 1.1 dyoung
259 1.1 dyoung /* Initialize sc */
260 1.12.6.5 skrll sc->sc_bus.ub_revision = USBREV_1_1;
261 1.12.6.5 skrll sc->sc_bus.ub_methods = &ahci_bus_methods;
262 1.12.6.5 skrll sc->sc_bus.ub_pipesize = sizeof(struct ahci_pipe);
263 1.12.6.5 skrll sc->sc_bus.ub_dmatag = sc->sc_dmat;
264 1.12.6.5 skrll sc->sc_bus.ub_usedma = true;
265 1.1 dyoung
266 1.1 dyoung /* Map the device. */
267 1.1 dyoung if (bus_space_map(sc->sc_st, aa->oba_addr,
268 1.1 dyoung 512, 0, &sc->sc_ioh) != 0) {
269 1.4 dyoung aprint_error_dev(self, "unable to map device\n");
270 1.1 dyoung return;
271 1.1 dyoung }
272 1.1 dyoung
273 1.1 dyoung /* Hook up the interrupt handler. */
274 1.1 dyoung sc->sc_ih = adm5120_intr_establish(aa->oba_irq, INTR_IRQ, ahci_intr, sc);
275 1.1 dyoung
276 1.1 dyoung if (sc->sc_ih == NULL) {
277 1.4 dyoung aprint_error_dev(self,
278 1.4 dyoung "unable to register interrupt handler\n");
279 1.1 dyoung return;
280 1.1 dyoung }
281 1.1 dyoung
282 1.1 dyoung SIMPLEQ_INIT(&sc->sc_free_xfers);
283 1.1 dyoung
284 1.6 dyoung callout_init(&sc->sc_poll_handle, 0);
285 1.1 dyoung
286 1.12 skrll mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
287 1.12 skrll mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED /* XXXNH */);
288 1.12 skrll
289 1.1 dyoung REG_WRITE(ADMHCD_REG_INTENABLE, 0); /* disable interrupts */
290 1.1 dyoung REG_WRITE(ADMHCD_REG_CONTROL, ADMHCD_SW_RESET); /* reset */
291 1.1 dyoung delay_ms(10);
292 1.12.6.2 skrll while (REG_READ(ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET)
293 1.12.6.2 skrll delay_ms(1);
294 1.1 dyoung
295 1.1 dyoung REG_WRITE(ADMHCD_REG_CONTROL, ADMHCD_HOST_EN);
296 1.12.6.2 skrll REG_WRITE(ADMHCD_REG_HOSTHEAD, 0x00000000);
297 1.12.6.2 skrll REG_WRITE(ADMHCD_REG_FMINTERVAL, 0x20002edf);
298 1.12.6.2 skrll REG_WRITE(ADMHCD_REG_LSTHRESH, 0x628);
299 1.12.6.2 skrll REG_WRITE(ADMHCD_REG_RHDESCR, ADMHCD_NPS | ADMHCD_LPSC);
300 1.12.6.2 skrll REG_WRITE(ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
301 1.1 dyoung
302 1.1 dyoung REG_WRITE(ADMHCD_REG_INTENABLE, 0); /* XXX: enable interrupts */
303 1.1 dyoung
304 1.1 dyoung #ifdef USB_DEBUG
305 1.1 dyoung /* usbdebug = 0x7f;
306 1.1 dyoung uhubdebug = 0x7f;
307 1.1 dyoung umassdebug = 0xffffffff; */
308 1.1 dyoung #endif
309 1.1 dyoung
310 1.1 dyoung /* Attach USB devices */
311 1.1 dyoung sc->sc_child = config_found(self, &sc->sc_bus, usbctlprint);
312 1.1 dyoung
313 1.1 dyoung }
314 1.1 dyoung
315 1.1 dyoung int
316 1.1 dyoung ahci_intr(void *arg)
317 1.1 dyoung {
318 1.1 dyoung #if 0
319 1.1 dyoung struct ahci_softc *sc = arg;
320 1.12.6.1 skrll uint8_t r;
321 1.1 dyoung #ifdef AHCI_DEBUG
322 1.1 dyoung char bitbuf[256];
323 1.1 dyoung #endif
324 1.1 dyoung
325 1.1 dyoung r = sl11read(sc, SL11_ISR);
326 1.1 dyoung
327 1.1 dyoung sl11write(sc, SL11_ISR, SL11_ISR_DATA | SL11_ISR_SOFTIMER);
328 1.1 dyoung
329 1.1 dyoung if ((r & SL11_ISR_RESET)) {
330 1.1 dyoung sc->sc_flags |= AHCDF_RESET;
331 1.1 dyoung sl11write(sc, SL11_ISR, SL11_ISR_RESET);
332 1.1 dyoung }
333 1.1 dyoung if ((r & SL11_ISR_INSERT)) {
334 1.1 dyoung sc->sc_flags |= AHCDF_INSERT;
335 1.1 dyoung sl11write(sc, SL11_ISR, SL11_ISR_INSERT);
336 1.1 dyoung }
337 1.1 dyoung
338 1.1 dyoung #ifdef AHCI_DEBUG
339 1.5 christos snprintb(bitbuf, sizeof(bitbuf),
340 1.5 christos ((sl11read(sc, SL11_CTRL) & SL11_CTRL_SUSPEND)
341 1.5 christos ? "\20\x8""D+\7RESUME\6INSERT\5SOF\4res\3""BABBLE\2USBB\1USBA"
342 1.5 christos : "\20\x8""D+\7RESET\6INSERT\5SOF\4res\3""BABBLE\2USBB\1USBA"),
343 1.5 christos r);
344 1.11 skrll
345 1.1 dyoung DPRINTF(D_XFER, ("I=%s ", bitbuf));
346 1.1 dyoung #endif /* AHCI_DEBUG */
347 1.1 dyoung #endif
348 1.1 dyoung
349 1.1 dyoung return 0;
350 1.1 dyoung }
351 1.1 dyoung
352 1.1 dyoung usbd_status
353 1.12.6.12 skrll ahci_open(struct usbd_pipe *pipe)
354 1.1 dyoung {
355 1.12.6.12 skrll struct usbd_device *dev = pipe->up_dev;
356 1.1 dyoung struct ahci_pipe *apipe = (struct ahci_pipe *)pipe;
357 1.12.6.5 skrll usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
358 1.12.6.10 skrll uint8_t rhaddr = dev->ud_bus->ub_rhaddr;
359 1.1 dyoung
360 1.1 dyoung DPRINTF(D_TRACE, ("ahci_open(addr=%d,ep=%d,scaddr=%d)",
361 1.12.6.10 skrll dev->ud_addr, ed->bEndpointAddress, rhaddr));
362 1.1 dyoung
363 1.1 dyoung apipe->toggle=0;
364 1.1 dyoung
365 1.12.6.10 skrll if (dev->ud_addr == rhaddr) {
366 1.1 dyoung switch (ed->bEndpointAddress) {
367 1.1 dyoung case USB_CONTROL_ENDPOINT:
368 1.12.6.10 skrll pipe->up_methods = &roothub_ctrl_methods;
369 1.1 dyoung break;
370 1.12.6.10 skrll case UE_DIR_IN | USBROOTHUB_INTR_ENDPT:
371 1.12.6.5 skrll pipe->up_methods = &ahci_root_intr_methods;
372 1.1 dyoung break;
373 1.1 dyoung default:
374 1.1 dyoung printf("open:endpointErr!\n");
375 1.1 dyoung return USBD_INVAL;
376 1.1 dyoung }
377 1.1 dyoung } else {
378 1.1 dyoung switch (ed->bmAttributes & UE_XFERTYPE) {
379 1.1 dyoung case UE_CONTROL:
380 1.1 dyoung DPRINTF(D_MSG, ("control "));
381 1.12.6.5 skrll pipe->up_methods = &ahci_device_ctrl_methods;
382 1.1 dyoung break;
383 1.1 dyoung case UE_INTERRUPT:
384 1.1 dyoung DPRINTF(D_MSG, ("interrupt "));
385 1.12.6.5 skrll pipe->up_methods = &ahci_device_intr_methods;
386 1.1 dyoung break;
387 1.1 dyoung case UE_ISOCHRONOUS:
388 1.1 dyoung DPRINTF(D_MSG, ("isochronous "));
389 1.12.6.5 skrll pipe->up_methods = &ahci_device_isoc_methods;
390 1.1 dyoung break;
391 1.1 dyoung case UE_BULK:
392 1.1 dyoung DPRINTF(D_MSG, ("bluk "));
393 1.12.6.5 skrll pipe->up_methods = &ahci_device_bulk_methods;
394 1.1 dyoung break;
395 1.1 dyoung }
396 1.1 dyoung }
397 1.1 dyoung return USBD_NORMAL_COMPLETION;
398 1.1 dyoung }
399 1.1 dyoung
400 1.1 dyoung void
401 1.1 dyoung ahci_softintr(void *arg)
402 1.1 dyoung {
403 1.2 perry DPRINTF(D_TRACE, ("%s()", __func__));
404 1.1 dyoung }
405 1.1 dyoung
406 1.1 dyoung void
407 1.1 dyoung ahci_poll(struct usbd_bus *bus)
408 1.1 dyoung {
409 1.2 perry DPRINTF(D_TRACE, ("%s()", __func__));
410 1.1 dyoung }
411 1.1 dyoung
412 1.1 dyoung /*
413 1.1 dyoung * Emulation of interrupt transfer for status change endpoint
414 1.1 dyoung * of root hub.
415 1.1 dyoung */
416 1.1 dyoung void
417 1.1 dyoung ahci_poll_hub(void *arg)
418 1.1 dyoung {
419 1.12.6.12 skrll struct usbd_xfer *xfer = arg;
420 1.12.6.12 skrll struct usbd_pipe *pipe = xfer->ux_pipe;
421 1.12.6.5 skrll struct ahci_softc *sc = (struct ahci_softc *)pipe->up_dev->ud_bus;
422 1.1 dyoung u_char *p;
423 1.1 dyoung static int p0_state=0;
424 1.1 dyoung static int p1_state=0;
425 1.1 dyoung
426 1.6 dyoung callout_reset(&sc->sc_poll_handle, sc->sc_interval, ahci_poll_hub, xfer);
427 1.1 dyoung
428 1.1 dyoung /* USB spec 11.13.3 (p.260) */
429 1.12.6.5 skrll p = KERNADDR(&xfer->ux_dmabuf, 0);
430 1.1 dyoung p[0] = 0;
431 1.1 dyoung if ((REG_READ(ADMHCD_REG_PORTSTATUS0) & ADMHCD_CCS) != p0_state) {
432 1.1 dyoung p[0] = 2;
433 1.1 dyoung DPRINTF(D_TRACE, ("!"));
434 1.1 dyoung p0_state=(REG_READ(ADMHCD_REG_PORTSTATUS0) & ADMHCD_CCS);
435 1.1 dyoung };
436 1.1 dyoung if ((REG_READ(ADMHCD_REG_PORTSTATUS1) & ADMHCD_CCS) != p1_state) {
437 1.1 dyoung p[0] = 2;
438 1.1 dyoung DPRINTF(D_TRACE, ("@"));
439 1.1 dyoung p1_state=(REG_READ(ADMHCD_REG_PORTSTATUS1) & ADMHCD_CCS);
440 1.1 dyoung };
441 1.1 dyoung
442 1.1 dyoung /* no change, return NAK */
443 1.1 dyoung if (p[0] == 0)
444 1.1 dyoung return;
445 1.1 dyoung
446 1.12.6.5 skrll xfer->ux_actlen = 1;
447 1.12.6.5 skrll xfer->ux_status = USBD_NORMAL_COMPLETION;
448 1.12 skrll mutex_enter(&sc->sc_lock);
449 1.1 dyoung usb_transfer_complete(xfer);
450 1.12 skrll mutex_exit(&sc->sc_lock);
451 1.1 dyoung }
452 1.1 dyoung
453 1.12.6.12 skrll struct usbd_xfer *
454 1.12.6.13 skrll ahci_allocx(struct usbd_bus *bus, unsigned int nframes)
455 1.1 dyoung {
456 1.1 dyoung struct ahci_softc *sc = (struct ahci_softc *)bus;
457 1.12.6.12 skrll struct usbd_xfer *xfer;
458 1.1 dyoung
459 1.1 dyoung DPRINTF(D_MEM, ("SLallocx"));
460 1.1 dyoung
461 1.1 dyoung xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
462 1.1 dyoung if (xfer) {
463 1.12.6.5 skrll SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, ux_next);
464 1.1 dyoung #ifdef DIAGNOSTIC
465 1.12.6.5 skrll if (xfer->ux_state != XFER_FREE) {
466 1.1 dyoung printf("ahci_allocx: xfer=%p not free, 0x%08x\n",
467 1.12.6.5 skrll xfer, xfer->ux_state);
468 1.1 dyoung }
469 1.1 dyoung #endif
470 1.1 dyoung } else {
471 1.12.6.8 skrll xfer = kmem_alloc(sizeof(*xfer), KM_SLEEP);
472 1.1 dyoung }
473 1.1 dyoung
474 1.1 dyoung if (xfer) {
475 1.1 dyoung memset(xfer, 0, sizeof(*xfer));
476 1.1 dyoung #ifdef DIAGNOSTIC
477 1.12.6.5 skrll xfer->ux_state = XFER_BUSY;
478 1.1 dyoung #endif
479 1.1 dyoung }
480 1.1 dyoung
481 1.1 dyoung return xfer;
482 1.1 dyoung }
483 1.1 dyoung
484 1.1 dyoung void
485 1.12.6.12 skrll ahci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer)
486 1.1 dyoung {
487 1.1 dyoung struct ahci_softc *sc = (struct ahci_softc *)bus;
488 1.1 dyoung
489 1.1 dyoung DPRINTF(D_MEM, ("SLfreex"));
490 1.1 dyoung
491 1.1 dyoung #ifdef DIAGNOSTIC
492 1.12.6.5 skrll if (xfer->ux_state != XFER_BUSY) {
493 1.1 dyoung printf("ahci_freex: xfer=%p not busy, 0x%08x\n",
494 1.12.6.5 skrll xfer, xfer->ux_state);
495 1.1 dyoung return;
496 1.1 dyoung }
497 1.12.6.5 skrll xfer->ux_state = XFER_FREE;
498 1.1 dyoung #endif
499 1.12.6.5 skrll SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, ux_next);
500 1.1 dyoung }
501 1.1 dyoung
502 1.12 skrll static void
503 1.12 skrll ahci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
504 1.12 skrll {
505 1.12.6.5 skrll struct ahci_softc *sc = bus->ub_hcpriv;
506 1.12 skrll
507 1.12 skrll *lock = &sc->sc_lock;
508 1.12 skrll }
509 1.12 skrll
510 1.1 dyoung void
511 1.12.6.12 skrll ahci_noop(struct usbd_pipe *pipe)
512 1.1 dyoung {
513 1.2 perry DPRINTF(D_TRACE, ("%s()", __func__));
514 1.1 dyoung }
515 1.1 dyoung
516 1.1 dyoung /*
517 1.1 dyoung * Data structures and routines to emulate the root hub.
518 1.1 dyoung */
519 1.1 dyoung
520 1.1 dyoung static int
521 1.12.6.10 skrll ahci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req,
522 1.12.6.10 skrll void *buf, int buflen)
523 1.1 dyoung {
524 1.12.6.10 skrll struct ahci_softc *sc = bus->ub_hcpriv;
525 1.12.6.10 skrll uint16_t len, value, index;
526 1.1 dyoung usb_port_status_t ps;
527 1.12.6.10 skrll int totlen = 0;
528 1.12.6.10 skrll int status;
529 1.1 dyoung
530 1.1 dyoung DPRINTF(D_TRACE, ("SLRCstart "));
531 1.1 dyoung
532 1.1 dyoung len = UGETW(req->wLength);
533 1.1 dyoung value = UGETW(req->wValue);
534 1.1 dyoung index = UGETW(req->wIndex);
535 1.1 dyoung
536 1.1 dyoung #define C(x,y) ((x) | ((y) << 8))
537 1.1 dyoung switch (C(req->bRequest, req->bmRequestType)) {
538 1.1 dyoung case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
539 1.12.6.10 skrll switch (value) {
540 1.12.6.10 skrll case C(0, UDESC_DEVICE): {
541 1.12.6.10 skrll usb_device_descriptor_t devd;
542 1.12.6.10 skrll
543 1.1 dyoung DPRINTF(D_MSG, ("UDESC_DEVICE "));
544 1.12.6.10 skrll totlen = min(buflen, sizeof(devd));
545 1.12.6.10 skrll memcpy(&devd, buf, totlen);
546 1.12.6.10 skrll USETW(devd.idVendor, USB_VENDOR_SCANLOGIC);
547 1.12.6.10 skrll memcpy(buf, &devd, totlen);
548 1.12.6.10 skrll break;
549 1.12.6.10 skrll }
550 1.12.6.10 skrll #define sd ((usb_string_descriptor_t *)buf)
551 1.12.6.10 skrll case C(1, UDESC_STRING):
552 1.12.6.10 skrll /* Vendor */
553 1.12.6.10 skrll totlen = usb_makestrdesc(sd, len, "ADMTek");
554 1.12.6.10 skrll break;
555 1.12.6.10 skrll case C(2, UDESC_STRING):
556 1.12.6.10 skrll /* Product */
557 1.12.6.10 skrll totlen = usb_makestrdesc(sd, len, "ADM5120 root hub");
558 1.1 dyoung break;
559 1.1 dyoung default:
560 1.1 dyoung printf("unknownGetDescriptor=%x", value);
561 1.12.6.10 skrll /* default from usbroothub */
562 1.12.6.10 skrll return buflen;
563 1.1 dyoung }
564 1.1 dyoung break;
565 1.1 dyoung /*
566 1.1 dyoung * Hub specific requests
567 1.1 dyoung */
568 1.1 dyoung case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
569 1.1 dyoung /* Clear Hub Feature, 11.16.2.1, not supported */
570 1.1 dyoung DPRINTF(D_MSG, ("ClearHubFeature not supported\n"));
571 1.1 dyoung break;
572 1.1 dyoung case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
573 1.1 dyoung
574 1.1 dyoung #define WPS(x) REG_WRITE(ADMHCD_REG_PORTSTATUS0+(index-1)*4, (x))
575 1.1 dyoung /* Clear Port Feature, 11.16.2.2 */
576 1.1 dyoung if (index != 1 && index != 2 ) {
577 1.12.6.10 skrll return -1;
578 1.1 dyoung }
579 1.1 dyoung switch (value) {
580 1.1 dyoung case UHF_PORT_POWER:
581 1.1 dyoung DPRINTF(D_MSG, ("POWER_OFF "));
582 1.1 dyoung WPS(ADMHCD_LSDA);
583 1.1 dyoung break;
584 1.1 dyoung case UHF_PORT_SUSPEND:
585 1.1 dyoung DPRINTF(D_MSG, ("SUSPEND "));
586 1.1 dyoung WPS(ADMHCD_POCI);
587 1.1 dyoung break;
588 1.1 dyoung case UHF_PORT_ENABLE:
589 1.1 dyoung DPRINTF(D_MSG, ("ENABLE "));
590 1.1 dyoung WPS(ADMHCD_CCS);
591 1.1 dyoung break;
592 1.1 dyoung case UHF_C_PORT_CONNECTION:
593 1.1 dyoung WPS(ADMHCD_CSC);
594 1.1 dyoung break;
595 1.1 dyoung case UHF_C_PORT_RESET:
596 1.1 dyoung WPS(ADMHCD_PRSC);
597 1.1 dyoung break;
598 1.1 dyoung case UHF_C_PORT_SUSPEND:
599 1.1 dyoung WPS(ADMHCD_PSSC);
600 1.1 dyoung break;
601 1.1 dyoung case UHF_C_PORT_ENABLE:
602 1.1 dyoung WPS(ADMHCD_PESC);
603 1.1 dyoung break;
604 1.1 dyoung case UHF_C_PORT_OVER_CURRENT:
605 1.1 dyoung WPS(ADMHCD_OCIC);
606 1.1 dyoung break;
607 1.1 dyoung default:
608 1.1 dyoung printf("ClrPortFeatERR:value=0x%x ", value);
609 1.12.6.10 skrll return -1;
610 1.1 dyoung }
611 1.1 dyoung //DPRINTF(D_XFER, ("CH=%04x ", sc->sc_change));
612 1.1 dyoung #undef WPS
613 1.1 dyoung break;
614 1.1 dyoung case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
615 1.1 dyoung /* Get Bus State, 11.16.2.3, not supported */
616 1.1 dyoung /* shall return a STALL... */
617 1.1 dyoung break;
618 1.1 dyoung case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
619 1.1 dyoung /* Get Hub Descriptor, 11.16.2.4 */
620 1.1 dyoung DPRINTF(D_MSG, ("UR_GET_DESCRIPTOR RCD"));
621 1.1 dyoung if ((value&0xff) != 0) {
622 1.12.6.10 skrll return -1;
623 1.1 dyoung }
624 1.12.6.10 skrll usb_hub_descriptor_t hubd;
625 1.12.6.10 skrll
626 1.12.6.10 skrll totlen = min(buflen, sizeof(hubd));
627 1.12.6.10 skrll memcpy(&hubd, buf, totlen);
628 1.12.6.10 skrll hubd.bNbrPorts = 2;
629 1.12.6.10 skrll USETW(hubd.wHubCharacteristics, 0);
630 1.12.6.10 skrll hubd.bPwrOn2PwrGood = 0;
631 1.12.6.10 skrll memcpy(buf, &hubd, totlen);
632 1.1 dyoung break;
633 1.1 dyoung case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
634 1.1 dyoung /* Get Hub Status, 11.16.2.5 */
635 1.1 dyoung DPRINTF(D_MSG, ("UR_GET_STATUS RCD"));
636 1.1 dyoung if (len != 4) {
637 1.12.6.10 skrll return -1;
638 1.1 dyoung }
639 1.1 dyoung memset(buf, 0, len);
640 1.1 dyoung totlen = len;
641 1.1 dyoung break;
642 1.1 dyoung case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
643 1.1 dyoung /* Get Port Status, 11.16.2.6 */
644 1.1 dyoung if ((index != 1 && index != 2) || len != 4) {
645 1.1 dyoung printf("index=%d,len=%d ", index, len);
646 1.12.6.10 skrll return -1;
647 1.1 dyoung }
648 1.1 dyoung status = REG_READ(ADMHCD_REG_PORTSTATUS0+(index-1)*4);
649 1.1 dyoung DPRINTF(D_MSG, ("UR_GET_STATUS RCO=%x ", status));
650 1.1 dyoung
651 1.1 dyoung //DPRINTF(D_XFER, ("ST=%04x,CH=%04x ", status, sc->sc_change));
652 1.1 dyoung USETW(ps.wPortStatus, status & (UPS_CURRENT_CONNECT_STATUS|UPS_PORT_ENABLED|UPS_SUSPEND|UPS_OVERCURRENT_INDICATOR|UPS_RESET|UPS_PORT_POWER|UPS_LOW_SPEED));
653 1.1 dyoung USETW(ps.wPortChange, (status>>16) & (UPS_C_CONNECT_STATUS|UPS_C_PORT_ENABLED|UPS_C_SUSPEND|UPS_C_OVERCURRENT_INDICATOR|UPS_C_PORT_RESET));
654 1.12.6.10 skrll totlen = min(len, sizeof(ps));
655 1.12.6.10 skrll memcpy(buf, &ps, totlen);
656 1.1 dyoung break;
657 1.1 dyoung case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
658 1.1 dyoung /* Set Hub Descriptor, 11.16.2.7, not supported */
659 1.1 dyoung /* STALL ? */
660 1.12.6.10 skrll return -1;
661 1.1 dyoung case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
662 1.1 dyoung /* Set Hub Feature, 11.16.2.8, not supported */
663 1.1 dyoung break;
664 1.1 dyoung case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
665 1.1 dyoung #define WPS(x) REG_WRITE(ADMHCD_REG_PORTSTATUS0+(index-1)*4, (x))
666 1.1 dyoung /* Set Port Feature, 11.16.2.9 */
667 1.1 dyoung if ((index != 1) && (index !=2)) {
668 1.1 dyoung printf("index=%d ", index);
669 1.12.6.10 skrll return -1;
670 1.1 dyoung }
671 1.1 dyoung switch (value) {
672 1.1 dyoung case UHF_PORT_RESET:
673 1.1 dyoung DPRINTF(D_MSG, ("PORT_RESET "));
674 1.1 dyoung WPS(ADMHCD_PRS);
675 1.1 dyoung break;
676 1.1 dyoung case UHF_PORT_POWER:
677 1.1 dyoung DPRINTF(D_MSG, ("PORT_POWER "));
678 1.1 dyoung WPS(ADMHCD_PPS);
679 1.1 dyoung break;
680 1.1 dyoung case UHF_PORT_ENABLE:
681 1.1 dyoung DPRINTF(D_MSG, ("PORT_ENABLE "));
682 1.1 dyoung WPS(ADMHCD_PES);
683 1.1 dyoung break;
684 1.1 dyoung default:
685 1.1 dyoung printf("SetPortFeatERR=0x%x ", value);
686 1.12.6.10 skrll return -1;
687 1.1 dyoung }
688 1.1 dyoung #undef WPS
689 1.1 dyoung break;
690 1.1 dyoung default:
691 1.1 dyoung DPRINTF(D_MSG, ("ioerr(UR=%02x,UT=%02x) ",
692 1.1 dyoung req->bRequest, req->bmRequestType));
693 1.12.6.10 skrll /* default from usbroothub */
694 1.12.6.10 skrll return buflen;
695 1.1 dyoung }
696 1.1 dyoung
697 1.12.6.10 skrll return totlen;
698 1.1 dyoung }
699 1.1 dyoung
700 1.1 dyoung static usbd_status
701 1.12.6.12 skrll ahci_root_intr_transfer(struct usbd_xfer *xfer)
702 1.1 dyoung {
703 1.12.6.5 skrll struct ahci_softc *sc = (struct ahci_softc *)xfer->ux_pipe->up_dev->ud_bus;
704 1.1 dyoung usbd_status error;
705 1.1 dyoung
706 1.1 dyoung DPRINTF(D_TRACE, ("SLRItransfer "));
707 1.1 dyoung
708 1.1 dyoung /* Insert last in queue */
709 1.12 skrll mutex_enter(&sc->sc_lock);
710 1.1 dyoung error = usb_insert_transfer(xfer);
711 1.12 skrll mutex_exit(&sc->sc_lock);
712 1.1 dyoung if (error)
713 1.1 dyoung return error;
714 1.1 dyoung
715 1.1 dyoung /*
716 1.1 dyoung * Pipe isn't running (otherwise error would be USBD_INPROG),
717 1.1 dyoung * start first.
718 1.1 dyoung */
719 1.12.6.5 skrll return ahci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
720 1.1 dyoung }
721 1.1 dyoung
722 1.1 dyoung static usbd_status
723 1.12.6.12 skrll ahci_root_intr_start(struct usbd_xfer *xfer)
724 1.1 dyoung {
725 1.12.6.12 skrll struct usbd_pipe *pipe = xfer->ux_pipe;
726 1.12.6.5 skrll struct ahci_softc *sc = (struct ahci_softc *)pipe->up_dev->ud_bus;
727 1.1 dyoung
728 1.1 dyoung DPRINTF(D_TRACE, ("SLRIstart "));
729 1.1 dyoung
730 1.12.6.5 skrll sc->sc_interval = MS_TO_TICKS(xfer->ux_pipe->up_endpoint->ue_edesc->bInterval);
731 1.6 dyoung callout_reset(&sc->sc_poll_handle, sc->sc_interval, ahci_poll_hub, xfer);
732 1.1 dyoung sc->sc_intr_xfer = xfer;
733 1.1 dyoung return USBD_IN_PROGRESS;
734 1.1 dyoung }
735 1.1 dyoung
736 1.1 dyoung static void
737 1.12.6.12 skrll ahci_root_intr_abort(struct usbd_xfer *xfer)
738 1.1 dyoung {
739 1.1 dyoung DPRINTF(D_TRACE, ("SLRIabort "));
740 1.1 dyoung }
741 1.1 dyoung
742 1.1 dyoung static void
743 1.12.6.12 skrll ahci_root_intr_close(struct usbd_pipe *pipe)
744 1.1 dyoung {
745 1.12.6.5 skrll struct ahci_softc *sc = (struct ahci_softc *)pipe->up_dev->ud_bus;
746 1.1 dyoung
747 1.1 dyoung DPRINTF(D_TRACE, ("SLRIclose "));
748 1.1 dyoung
749 1.6 dyoung callout_stop(&sc->sc_poll_handle);
750 1.1 dyoung sc->sc_intr_xfer = NULL;
751 1.1 dyoung }
752 1.1 dyoung
753 1.1 dyoung static void
754 1.12.6.12 skrll ahci_root_intr_done(struct usbd_xfer *xfer)
755 1.1 dyoung {
756 1.1 dyoung //DPRINTF(D_XFER, ("RIdn "));
757 1.1 dyoung }
758 1.1 dyoung
759 1.1 dyoung static usbd_status
760 1.12.6.12 skrll ahci_device_ctrl_transfer(struct usbd_xfer *xfer)
761 1.1 dyoung {
762 1.12.6.5 skrll struct ahci_softc *sc = (struct ahci_softc *)xfer->ux_pipe->up_dev->ud_bus;
763 1.1 dyoung usbd_status error;
764 1.1 dyoung
765 1.1 dyoung DPRINTF(D_TRACE, ("C"));
766 1.1 dyoung
767 1.12 skrll mutex_enter(&sc->sc_lock);
768 1.1 dyoung error = usb_insert_transfer(xfer);
769 1.12 skrll mutex_exit(&sc->sc_lock);
770 1.1 dyoung if (error)
771 1.1 dyoung return error;
772 1.1 dyoung
773 1.12.6.5 skrll return ahci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
774 1.1 dyoung }
775 1.1 dyoung
776 1.1 dyoung static usbd_status
777 1.12.6.12 skrll ahci_device_ctrl_start(struct usbd_xfer *xfer)
778 1.1 dyoung {
779 1.1 dyoung usbd_status status = USBD_NORMAL_COMPLETION;
780 1.1 dyoung int s, err;
781 1.1 dyoung static struct admhcd_ed ep_v __attribute__((aligned(16))), *ep;
782 1.1 dyoung static struct admhcd_td td_v[4] __attribute__((aligned(16))), *td, *td1, *td2, *td3;
783 1.1 dyoung static usb_dma_t reqdma;
784 1.12.6.12 skrll struct usbd_pipe *pipe = xfer->ux_pipe;
785 1.12.6.5 skrll usb_device_request_t *req = &xfer->ux_request;
786 1.12.6.5 skrll struct ahci_softc *sc = (struct ahci_softc *)pipe->up_dev->ud_bus;
787 1.1 dyoung int len, isread;
788 1.11 skrll
789 1.1 dyoung
790 1.1 dyoung #if 0
791 1.12.6.5 skrll struct ahci_pipe *apipe = (struct ahci_pipe *)xfer->ux_pipe;
792 1.1 dyoung #endif
793 1.12 skrll mutex_enter(&sc->sc_lock);
794 1.1 dyoung /* printf("ctrl_start>>>\n"); */
795 1.1 dyoung
796 1.1 dyoung #ifdef DIAGNOSTIC
797 1.12.6.5 skrll if (!(xfer->ux_rqflags & URQ_REQUEST)) {
798 1.12.6.2 skrll /* XXX panic */
799 1.12.6.2 skrll printf("ahci_device_ctrl_transfer: not a request\n");
800 1.12.6.11 skrll return USBD_INVAL;
801 1.12.6.2 skrll }
802 1.1 dyoung #endif
803 1.1 dyoung
804 1.12.6.1 skrll #define KSEG1ADDR(x) (0xa0000000 | (((uint32_t)x) & 0x1fffffff))
805 1.1 dyoung DPRINTF(D_TRACE, ("st "));
806 1.1 dyoung if (!ep) {
807 1.12.6.2 skrll ep = (struct admhcd_ed *)KSEG1ADDR(&ep_v);
808 1.11 skrll td = (struct admhcd_td *)KSEG1ADDR(&td_v[0]);
809 1.11 skrll td1 = (struct admhcd_td *)KSEG1ADDR(&td_v[1]);
810 1.11 skrll td2 = (struct admhcd_td *)KSEG1ADDR(&td_v[2]);
811 1.11 skrll td3 = (struct admhcd_td *)KSEG1ADDR(&td_v[3]);
812 1.1 dyoung err = usb_allocmem(&sc->sc_bus,
813 1.1 dyoung sizeof(usb_device_request_t),
814 1.1 dyoung 0, &reqdma);
815 1.1 dyoung if (err)
816 1.12.6.11 skrll return USBD_NOMEM;
817 1.1 dyoung
818 1.1 dyoung /* printf("ep: %p\n",ep); */
819 1.1 dyoung };
820 1.1 dyoung
821 1.12.6.5 skrll ep->control = pipe->up_dev->ud_addr | \
822 1.12.6.5 skrll ((pipe->up_dev->ud_speed==USB_SPEED_FULL)?ADMHCD_ED_SPEED:0) | \
823 1.12.6.5 skrll ((UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize))<<ADMHCD_ED_MAXSHIFT);
824 1.1 dyoung memcpy(KERNADDR(&reqdma, 0), req, sizeof *req);
825 1.1 dyoung /* printf("status: %x\n",REG_READ(ADMHCD_REG_PORTSTATUS0));
826 1.1 dyoung printf("ep_control: %x\n",ep->control);
827 1.12.6.5 skrll printf("speed: %x\n",pipe->up_dev->ud_speed);
828 1.1 dyoung printf("req: %p\n",req);
829 1.12.6.5 skrll printf("dmabuf: %p\n",xfer->ux_dmabuf.block); */
830 1.1 dyoung
831 1.1 dyoung isread = req->bmRequestType & UT_READ;
832 1.1 dyoung len = UGETW(req->wLength);
833 1.1 dyoung
834 1.12.6.2 skrll ep->next = ep;
835 1.1 dyoung
836 1.12.6.2 skrll td->buffer = DMAADDR(&reqdma,0) | 0xa0000000;
837 1.12.6.2 skrll td->buflen=sizeof(*req);
838 1.12.6.2 skrll td->control=ADMHCD_TD_SETUP | ADMHCD_TD_DATA0 | ADMHCD_TD_OWN;
839 1.1 dyoung
840 1.1 dyoung if (len) {
841 1.1 dyoung td->next = td1;
842 1.1 dyoung
843 1.12.6.5 skrll td1->buffer = DMAADDR(&xfer->ux_dmabuf,0) | 0xa0000000;
844 1.1 dyoung td1->buflen = len;
845 1.1 dyoung td1->next = td2;
846 1.1 dyoung td1->control= (isread?ADMHCD_TD_IN:ADMHCD_TD_OUT) | ADMHCD_TD_DATA1 | ADMHCD_TD_R | ADMHCD_TD_OWN;
847 1.12.6.2 skrll } else {
848 1.12.6.2 skrll td1->control = 0;
849 1.12.6.2 skrll td->next = td2;
850 1.12.6.2 skrll };
851 1.1 dyoung
852 1.1 dyoung td2->buffer = 0;
853 1.1 dyoung td2->buflen= 0;
854 1.1 dyoung td2->next = td3;
855 1.1 dyoung td2->control = (isread?ADMHCD_TD_OUT:ADMHCD_TD_IN) | ADMHCD_TD_DATA1 | ADMHCD_TD_OWN;
856 1.1 dyoung
857 1.1 dyoung td3->buffer = 0;
858 1.1 dyoung td3->buflen= 0;
859 1.1 dyoung td3->next = 0;
860 1.1 dyoung td3->control = 0;
861 1.1 dyoung
862 1.1 dyoung ep->head = td;
863 1.1 dyoung ep->tail = td3;
864 1.1 dyoung /*
865 1.1 dyoung printf("ep: %p\n",ep);
866 1.1 dyoung printf("ep->next: %p\n",ep->next);
867 1.1 dyoung printf("ep->head: %p\n",ep->head);
868 1.1 dyoung printf("ep->tail: %p\n",ep->tail);
869 1.1 dyoung printf("td: %p\n",td);
870 1.1 dyoung printf("td->next: %p\n",td->next);
871 1.1 dyoung printf("td->buffer: %x\n",td->buffer);
872 1.1 dyoung printf("td->buflen: %x\n",td->buflen);
873 1.1 dyoung printf("td1: %p\n",td1);
874 1.1 dyoung printf("td1->next: %p\n",td1->next);
875 1.1 dyoung printf("td2: %p\n",td2);
876 1.1 dyoung printf("td2->next: %p\n",td2->next);
877 1.1 dyoung printf("td3: %p\n",td3);
878 1.1 dyoung printf("td3->next: %p\n",td3->next);
879 1.1 dyoung */
880 1.1 dyoung
881 1.12.6.2 skrll REG_WRITE(ADMHCD_REG_HOSTHEAD, (uint32_t)ep);
882 1.12.6.2 skrll REG_WRITE(ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP | ADMHCD_DMA_EN);
883 1.1 dyoung /* printf("1: %x %x %x %x\n", ep->control, td->control, td1->control, td2->control); */
884 1.12.6.2 skrll s=100;
885 1.12.6.2 skrll while (s--) {
886 1.12.6.2 skrll delay_ms(10);
887 1.1 dyoung /* printf("%x %x %x %x\n", ep->control, td->control, td1->control, td2->control);*/
888 1.1 dyoung status = USBD_TIMEOUT;
889 1.12.6.2 skrll if (td->control & ADMHCD_TD_OWN) continue;
890 1.1 dyoung
891 1.12.6.2 skrll err = (td->control & ADMHCD_TD_ERRMASK)>>ADMHCD_TD_ERRSHIFT;
892 1.12.6.2 skrll if (err) {
893 1.1 dyoung status = USBD_IOERROR;
894 1.12.6.2 skrll break;
895 1.12.6.2 skrll };
896 1.1 dyoung
897 1.1 dyoung status = USBD_TIMEOUT;
898 1.12.6.2 skrll if (td1->control & ADMHCD_TD_OWN) continue;
899 1.12.6.2 skrll err = (td1->control & ADMHCD_TD_ERRMASK)>>ADMHCD_TD_ERRSHIFT;
900 1.12.6.2 skrll if (err) {
901 1.1 dyoung status = USBD_IOERROR;
902 1.12.6.2 skrll break;
903 1.12.6.2 skrll };
904 1.1 dyoung
905 1.1 dyoung status = USBD_TIMEOUT;
906 1.12.6.2 skrll if (td2->control & ADMHCD_TD_OWN) continue;
907 1.12.6.2 skrll err = (td2->control & ADMHCD_TD_ERRMASK)>>ADMHCD_TD_ERRSHIFT;
908 1.12.6.2 skrll if (err) {
909 1.1 dyoung status = USBD_IOERROR;
910 1.12.6.2 skrll };
911 1.1 dyoung status = USBD_NORMAL_COMPLETION;
912 1.12.6.2 skrll break;
913 1.1 dyoung
914 1.1 dyoung };
915 1.12.6.2 skrll REG_WRITE(ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
916 1.1 dyoung
917 1.12.6.5 skrll xfer->ux_actlen = len;
918 1.12.6.5 skrll xfer->ux_status = status;
919 1.1 dyoung
920 1.1 dyoung /* printf("ctrl_start<<<\n"); */
921 1.1 dyoung
922 1.1 dyoung usb_transfer_complete(xfer);
923 1.12 skrll mutex_exit(&sc->sc_lock);
924 1.12 skrll return USBD_NORMAL_COMPLETION;
925 1.1 dyoung }
926 1.1 dyoung
927 1.1 dyoung static void
928 1.12.6.12 skrll ahci_device_ctrl_abort(struct usbd_xfer *xfer)
929 1.1 dyoung {
930 1.1 dyoung DPRINTF(D_TRACE, ("Cab "));
931 1.1 dyoung ahci_abort_xfer(xfer, USBD_CANCELLED);
932 1.1 dyoung }
933 1.1 dyoung
934 1.1 dyoung static void
935 1.12.6.12 skrll ahci_device_ctrl_close(struct usbd_pipe *pipe)
936 1.1 dyoung {
937 1.1 dyoung DPRINTF(D_TRACE, ("Ccl "));
938 1.1 dyoung }
939 1.1 dyoung
940 1.1 dyoung static void
941 1.12.6.12 skrll ahci_device_ctrl_done(struct usbd_xfer *xfer)
942 1.1 dyoung {
943 1.1 dyoung DPRINTF(D_TRACE, ("Cdn "));
944 1.1 dyoung }
945 1.1 dyoung
946 1.1 dyoung static usbd_status
947 1.12.6.12 skrll ahci_device_intr_transfer(struct usbd_xfer *xfer)
948 1.1 dyoung {
949 1.12.6.5 skrll struct ahci_softc *sc = (struct ahci_softc *)xfer->ux_pipe->up_dev->ud_bus;
950 1.1 dyoung usbd_status error;
951 1.1 dyoung
952 1.1 dyoung DPRINTF(D_TRACE, ("INTRtrans "));
953 1.1 dyoung
954 1.12 skrll mutex_enter(&sc->sc_lock);
955 1.1 dyoung error = usb_insert_transfer(xfer);
956 1.12 skrll mutex_exit(&sc->sc_lock);
957 1.1 dyoung if (error)
958 1.1 dyoung return error;
959 1.1 dyoung
960 1.12.6.5 skrll return ahci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
961 1.1 dyoung }
962 1.1 dyoung
963 1.1 dyoung static usbd_status
964 1.12.6.12 skrll ahci_device_intr_start(struct usbd_xfer *xfer)
965 1.1 dyoung {
966 1.12.6.12 skrll struct usbd_pipe *pipe = xfer->ux_pipe;
967 1.1 dyoung struct ahci_xfer *sx;
968 1.1 dyoung
969 1.1 dyoung DPRINTF(D_TRACE, ("INTRstart "));
970 1.1 dyoung
971 1.12.6.8 skrll sx = kmem_intr_alloc(sizeof(*sx), KM_NOSLEEP);
972 1.1 dyoung if (sx == NULL)
973 1.1 dyoung goto reterr;
974 1.1 dyoung memset(sx, 0, sizeof(*sx));
975 1.1 dyoung sx->sx_xfer = xfer;
976 1.12.6.5 skrll xfer->ux_hcpriv = sx;
977 1.1 dyoung
978 1.1 dyoung /* initialize callout */
979 1.6 dyoung callout_init(&sx->sx_callout_t, 0);
980 1.11 skrll callout_reset(&sx->sx_callout_t,
981 1.12.6.5 skrll MS_TO_TICKS(pipe->up_endpoint->ue_edesc->bInterval),
982 1.1 dyoung ahci_poll_device, sx);
983 1.1 dyoung
984 1.1 dyoung /* ACK */
985 1.1 dyoung return USBD_IN_PROGRESS;
986 1.1 dyoung
987 1.1 dyoung reterr:
988 1.1 dyoung return USBD_IOERROR;
989 1.1 dyoung }
990 1.1 dyoung
991 1.1 dyoung static void
992 1.1 dyoung ahci_poll_device(void *arg)
993 1.1 dyoung {
994 1.1 dyoung struct ahci_xfer *sx = (struct ahci_xfer *)arg;
995 1.12.6.12 skrll struct usbd_xfer *xfer = sx->sx_xfer;
996 1.12.6.12 skrll struct usbd_pipe *pipe = xfer->ux_pipe;
997 1.12.6.5 skrll struct ahci_softc *sc = (struct ahci_softc *)pipe->up_dev->ud_bus;
998 1.1 dyoung void *buf;
999 1.1 dyoung int pid;
1000 1.1 dyoung int r;
1001 1.1 dyoung
1002 1.1 dyoung DPRINTF(D_TRACE, ("pldev"));
1003 1.1 dyoung
1004 1.6 dyoung callout_reset(&sx->sx_callout_t,
1005 1.12.6.5 skrll MS_TO_TICKS(pipe->up_endpoint->ue_edesc->bInterval),
1006 1.1 dyoung ahci_poll_device, sx);
1007 1.1 dyoung
1008 1.1 dyoung /* interrupt transfer */
1009 1.12.6.5 skrll pid = (UE_GET_DIR(pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN)
1010 1.1 dyoung ? ADMHCD_TD_IN : ADMHCD_TD_OUT;
1011 1.12.6.5 skrll buf = KERNADDR(&xfer->ux_dmabuf, 0);
1012 1.1 dyoung
1013 1.12.6.5 skrll r = ahci_transaction(sc, pipe, pid, xfer->ux_length, buf, 0/*toggle*/);
1014 1.1 dyoung if (r < 0) {
1015 1.2 perry DPRINTF(D_MSG, ("%s error", __func__));
1016 1.1 dyoung return;
1017 1.1 dyoung }
1018 1.1 dyoung /* no change, return NAK */
1019 1.1 dyoung if (r == 0)
1020 1.1 dyoung return;
1021 1.1 dyoung
1022 1.12.6.5 skrll xfer->ux_status = USBD_NORMAL_COMPLETION;
1023 1.12 skrll mutex_enter(&sc->sc_lock);
1024 1.1 dyoung usb_transfer_complete(xfer);
1025 1.12 skrll mutex_exit(&sc->sc_lock);
1026 1.1 dyoung }
1027 1.1 dyoung
1028 1.1 dyoung static void
1029 1.12.6.12 skrll ahci_device_intr_abort(struct usbd_xfer *xfer)
1030 1.1 dyoung {
1031 1.1 dyoung struct ahci_xfer *sx;
1032 1.1 dyoung
1033 1.1 dyoung DPRINTF(D_TRACE, ("INTRabort "));
1034 1.1 dyoung
1035 1.12.6.5 skrll sx = xfer->ux_hcpriv;
1036 1.1 dyoung if (sx) {
1037 1.6 dyoung callout_stop(&sx->sx_callout_t);
1038 1.12.6.8 skrll kmem_intr_free(sx, sizeof(*sx));
1039 1.12.6.5 skrll xfer->ux_hcpriv = NULL;
1040 1.1 dyoung } else {
1041 1.2 perry printf("%s: sx == NULL!\n", __func__);
1042 1.1 dyoung }
1043 1.1 dyoung ahci_abort_xfer(xfer, USBD_CANCELLED);
1044 1.1 dyoung }
1045 1.1 dyoung
1046 1.1 dyoung static void
1047 1.12.6.12 skrll ahci_device_intr_close(struct usbd_pipe *pipe)
1048 1.1 dyoung {
1049 1.1 dyoung DPRINTF(D_TRACE, ("INTRclose "));
1050 1.1 dyoung }
1051 1.1 dyoung
1052 1.1 dyoung static void
1053 1.12.6.12 skrll ahci_device_intr_done(struct usbd_xfer *xfer)
1054 1.1 dyoung {
1055 1.1 dyoung DPRINTF(D_TRACE, ("INTRdone "));
1056 1.1 dyoung }
1057 1.1 dyoung
1058 1.1 dyoung static usbd_status
1059 1.12.6.12 skrll ahci_device_isoc_transfer(struct usbd_xfer *xfer)
1060 1.1 dyoung {
1061 1.1 dyoung DPRINTF(D_TRACE, ("S"));
1062 1.1 dyoung return USBD_NORMAL_COMPLETION;
1063 1.1 dyoung }
1064 1.1 dyoung
1065 1.1 dyoung static usbd_status
1066 1.12.6.12 skrll ahci_device_isoc_start(struct usbd_xfer *xfer)
1067 1.1 dyoung {
1068 1.1 dyoung DPRINTF(D_TRACE, ("st "));
1069 1.1 dyoung return USBD_NORMAL_COMPLETION;
1070 1.1 dyoung }
1071 1.1 dyoung
1072 1.1 dyoung static void
1073 1.12.6.12 skrll ahci_device_isoc_abort(struct usbd_xfer *xfer)
1074 1.1 dyoung {
1075 1.1 dyoung DPRINTF(D_TRACE, ("Sab "));
1076 1.1 dyoung }
1077 1.1 dyoung
1078 1.1 dyoung static void
1079 1.12.6.12 skrll ahci_device_isoc_close(struct usbd_pipe *pipe)
1080 1.1 dyoung {
1081 1.1 dyoung DPRINTF(D_TRACE, ("Scl "));
1082 1.1 dyoung }
1083 1.1 dyoung
1084 1.1 dyoung static void
1085 1.12.6.12 skrll ahci_device_isoc_done(struct usbd_xfer *xfer)
1086 1.1 dyoung {
1087 1.1 dyoung DPRINTF(D_TRACE, ("Sdn "));
1088 1.1 dyoung }
1089 1.1 dyoung
1090 1.1 dyoung static usbd_status
1091 1.12.6.12 skrll ahci_device_bulk_transfer(struct usbd_xfer *xfer)
1092 1.1 dyoung {
1093 1.12.6.5 skrll struct ahci_softc *sc = (struct ahci_softc *)xfer->ux_pipe->up_dev->ud_bus;
1094 1.1 dyoung usbd_status error;
1095 1.1 dyoung
1096 1.1 dyoung DPRINTF(D_TRACE, ("B"));
1097 1.1 dyoung
1098 1.12 skrll mutex_enter(&sc->sc_lock);
1099 1.1 dyoung error = usb_insert_transfer(xfer);
1100 1.12 skrll mutex_exit(&sc->sc_lock);
1101 1.1 dyoung if (error)
1102 1.1 dyoung return error;
1103 1.1 dyoung
1104 1.12.6.5 skrll return ahci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
1105 1.1 dyoung }
1106 1.1 dyoung
1107 1.1 dyoung static usbd_status
1108 1.12.6.12 skrll ahci_device_bulk_start(struct usbd_xfer *xfer)
1109 1.1 dyoung {
1110 1.1 dyoung #define NBULK_TDS 32
1111 1.1 dyoung static volatile int level = 0;
1112 1.1 dyoung usbd_status status = USBD_NORMAL_COMPLETION;
1113 1.1 dyoung int s, err;
1114 1.1 dyoung static struct admhcd_ed ep_v __attribute__((aligned(16))), *ep;
1115 1.1 dyoung static struct admhcd_td td_v[NBULK_TDS] __attribute__((aligned(16))), *td[NBULK_TDS];
1116 1.12.6.12 skrll struct usbd_pipe *pipe = xfer->ux_pipe;
1117 1.12.6.5 skrll struct ahci_softc *sc = (struct ahci_softc *)pipe->up_dev->ud_bus;
1118 1.1 dyoung int endpt, i, len, tlen, segs, offset, isread, toggle, short_ok;
1119 1.12.6.5 skrll struct ahci_pipe *apipe = (struct ahci_pipe *)xfer->ux_pipe;
1120 1.1 dyoung
1121 1.12.6.1 skrll #define KSEG1ADDR(x) (0xa0000000 | (((uint32_t)x) & 0x1fffffff))
1122 1.1 dyoung DPRINTF(D_TRACE, ("st "));
1123 1.1 dyoung
1124 1.1 dyoung #ifdef DIAGNOSTIC
1125 1.12.6.5 skrll if (xfer->ux_rqflags & URQ_REQUEST) {
1126 1.1 dyoung /* XXX panic */
1127 1.1 dyoung printf("ohci_device_bulk_start: a request\n");
1128 1.12.6.11 skrll return USBD_INVAL;
1129 1.1 dyoung }
1130 1.1 dyoung #endif
1131 1.1 dyoung
1132 1.12 skrll mutex_enter(&sc->sc_lock);
1133 1.1 dyoung level++;
1134 1.1 dyoung /* printf("bulk_start>>>\n"); */
1135 1.1 dyoung
1136 1.1 dyoung if (!ep) {
1137 1.12.6.2 skrll ep = (struct admhcd_ed *)KSEG1ADDR(&ep_v);
1138 1.1 dyoung for (i=0; i<NBULK_TDS; i++) {
1139 1.11 skrll td[i] = (struct admhcd_td *)KSEG1ADDR(&td_v[i]);
1140 1.1 dyoung };
1141 1.1 dyoung /* printf("ep: %p\n",ep);*/
1142 1.1 dyoung };
1143 1.1 dyoung if (apipe->toggle == 0) {
1144 1.1 dyoung toggle = ADMHCD_TD_DATA0;
1145 1.1 dyoung } else {
1146 1.1 dyoung toggle = apipe->toggle;
1147 1.1 dyoung };
1148 1.1 dyoung
1149 1.12.6.5 skrll endpt = pipe->up_endpoint->ue_edesc->bEndpointAddress;
1150 1.12.6.5 skrll ep->control = pipe->up_dev->ud_addr | ((endpt & 0xf) << ADMHCD_ED_EPSHIFT)|\
1151 1.12.6.5 skrll ((pipe->up_dev->ud_speed==USB_SPEED_FULL)?ADMHCD_ED_SPEED:0) | \
1152 1.12.6.5 skrll ((UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize))<<ADMHCD_ED_MAXSHIFT);
1153 1.1 dyoung
1154 1.12.6.5 skrll short_ok = xfer->ux_flags & USBD_SHORT_XFER_OK?ADMHCD_TD_R:0;
1155 1.1 dyoung /* printf("level: %d\n",level);
1156 1.1 dyoung printf("short_xfer: %x\n",short_ok);
1157 1.1 dyoung printf("ep_control: %x\n",ep->control);
1158 1.12.6.5 skrll printf("speed: %x\n",pipe->up_dev->ud_speed);
1159 1.12.6.5 skrll printf("dmabuf: %p\n",xfer->ux_dmabuf.block); */
1160 1.1 dyoung
1161 1.12.6.2 skrll isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1162 1.12.6.5 skrll len = xfer->ux_length;
1163 1.1 dyoung
1164 1.12.6.2 skrll ep->next = ep;
1165 1.1 dyoung
1166 1.1 dyoung i = 0;
1167 1.1 dyoung offset = 0;
1168 1.1 dyoung while ((len>0) || (i==0)) {
1169 1.1 dyoung tlen = min(len,4096);
1170 1.12.6.5 skrll td[i]->buffer = DMAADDR(&xfer->ux_dmabuf,offset) | 0xa0000000;
1171 1.1 dyoung td[i]->buflen=tlen;
1172 1.1 dyoung td[i]->control=(isread?ADMHCD_TD_IN:ADMHCD_TD_OUT) | toggle | ADMHCD_TD_OWN | short_ok;
1173 1.1 dyoung td[i]->len=tlen;
1174 1.1 dyoung toggle = ADMHCD_TD_TOGGLE;
1175 1.1 dyoung len -= tlen;
1176 1.1 dyoung offset += tlen;
1177 1.1 dyoung td[i]->next = td[i+1];
1178 1.1 dyoung i++;
1179 1.1 dyoung };
1180 1.1 dyoung
1181 1.1 dyoung td[i]->buffer = 0;
1182 1.1 dyoung td[i]->buflen = 0;
1183 1.1 dyoung td[i]->control = 0;
1184 1.1 dyoung td[i]->next = 0;
1185 1.1 dyoung
1186 1.1 dyoung ep->head = td[0];
1187 1.1 dyoung ep->tail = td[i];
1188 1.1 dyoung segs = i;
1189 1.1 dyoung len = 0;
1190 1.1 dyoung
1191 1.1 dyoung /* printf("segs: %d\n",segs);
1192 1.1 dyoung printf("ep: %p\n",ep);
1193 1.1 dyoung printf("ep->control: %x\n",ep->control);
1194 1.1 dyoung printf("ep->next: %p\n",ep->next);
1195 1.1 dyoung printf("ep->head: %p\n",ep->head);
1196 1.1 dyoung printf("ep->tail: %p\n",ep->tail);
1197 1.1 dyoung for (i=0; i<segs; i++) {
1198 1.1 dyoung printf("td[%d]: %p\n",i,td[i]);
1199 1.1 dyoung printf("td[%d]->control: %x\n",i,td[i]->control);
1200 1.1 dyoung printf("td[%d]->next: %p\n",i,td[i]->next);
1201 1.1 dyoung printf("td[%d]->buffer: %x\n",i,td[i]->buffer);
1202 1.1 dyoung printf("td[%d]->buflen: %x\n",i,td[i]->buflen);
1203 1.1 dyoung }; */
1204 1.1 dyoung
1205 1.12.6.2 skrll REG_WRITE(ADMHCD_REG_HOSTHEAD, (uint32_t)ep);
1206 1.12.6.2 skrll REG_WRITE(ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP | ADMHCD_DMA_EN);
1207 1.1 dyoung i = 0;
1208 1.1 dyoung /* printf("1: %x %d %x %x\n", ep->control, i, td[i]->control, td[i]->buflen); */
1209 1.12.6.2 skrll s=100;
1210 1.1 dyoung err = 0;
1211 1.12.6.2 skrll while (s--) {
1212 1.1 dyoung /* printf("%x %d %x %x\n", ep->control, i, td[i]->control, td[i]->buflen); */
1213 1.1 dyoung status = USBD_TIMEOUT;
1214 1.12.6.2 skrll if (td[i]->control & ADMHCD_TD_OWN) {
1215 1.1 dyoung delay_ms(3);
1216 1.1 dyoung continue;
1217 1.1 dyoung };
1218 1.1 dyoung
1219 1.1 dyoung len += td[i]->len - td[i]->buflen;
1220 1.1 dyoung
1221 1.12.6.2 skrll err = (td[i]->control & ADMHCD_TD_ERRMASK)>>ADMHCD_TD_ERRSHIFT;
1222 1.12.6.2 skrll if (err) {
1223 1.1 dyoung status = USBD_IOERROR;
1224 1.12.6.2 skrll break;
1225 1.12.6.2 skrll };
1226 1.11 skrll
1227 1.1 dyoung i++;
1228 1.1 dyoung if (i==segs) {
1229 1.1 dyoung status = USBD_NORMAL_COMPLETION;
1230 1.1 dyoung break;
1231 1.1 dyoung };
1232 1.1 dyoung
1233 1.1 dyoung };
1234 1.12.6.2 skrll REG_WRITE(ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
1235 1.1 dyoung
1236 1.12.6.1 skrll apipe->toggle = ((uint32_t)ep->head & 2)?ADMHCD_TD_DATA1:ADMHCD_TD_DATA0;
1237 1.1 dyoung /* printf("bulk_transfer_done: status: %x, err: %x, len: %x, toggle: %x\n", status,err,len,apipe->toggle); */
1238 1.1 dyoung
1239 1.1 dyoung if (short_ok && (err == 0x9 || err == 0xd)) {
1240 1.1 dyoung /* printf("bulk_transfer_done: short_transfer fix\n"); */
1241 1.1 dyoung status = USBD_NORMAL_COMPLETION;
1242 1.1 dyoung };
1243 1.12.6.5 skrll xfer->ux_actlen = len;
1244 1.12.6.5 skrll xfer->ux_status = status;
1245 1.1 dyoung
1246 1.1 dyoung level--;
1247 1.1 dyoung /* printf("bulk_start<<<\n"); */
1248 1.1 dyoung
1249 1.1 dyoung usb_transfer_complete(xfer);
1250 1.12 skrll mutex_exit(&sc->sc_lock);
1251 1.12 skrll
1252 1.12 skrll return USBD_NORMAL_COMPLETION;
1253 1.1 dyoung }
1254 1.1 dyoung
1255 1.1 dyoung static void
1256 1.12.6.12 skrll ahci_device_bulk_abort(struct usbd_xfer *xfer)
1257 1.1 dyoung {
1258 1.1 dyoung DPRINTF(D_TRACE, ("Bab "));
1259 1.1 dyoung ahci_abort_xfer(xfer, USBD_CANCELLED);
1260 1.1 dyoung }
1261 1.1 dyoung
1262 1.1 dyoung static void
1263 1.12.6.12 skrll ahci_device_bulk_close(struct usbd_pipe *pipe)
1264 1.1 dyoung {
1265 1.1 dyoung DPRINTF(D_TRACE, ("Bcl "));
1266 1.1 dyoung }
1267 1.1 dyoung
1268 1.1 dyoung static void
1269 1.12.6.12 skrll ahci_device_bulk_done(struct usbd_xfer *xfer)
1270 1.1 dyoung {
1271 1.1 dyoung DPRINTF(D_TRACE, ("Bdn "));
1272 1.1 dyoung }
1273 1.1 dyoung
1274 1.1 dyoung #define DATA0_RD (0x03)
1275 1.1 dyoung #define DATA0_WR (0x07)
1276 1.1 dyoung #define AHCI_TIMEOUT (5000)
1277 1.1 dyoung
1278 1.1 dyoung /*
1279 1.1 dyoung * Do a transaction.
1280 1.1 dyoung * return 1 if ACK, 0 if NAK, -1 if error.
1281 1.1 dyoung */
1282 1.1 dyoung static int
1283 1.12.6.12 skrll ahci_transaction(struct ahci_softc *sc, struct usbd_pipe *pipe,
1284 1.12.6.1 skrll uint8_t pid, int len, u_char *buf, uint8_t toggle)
1285 1.1 dyoung {
1286 1.1 dyoung return -1;
1287 1.1 dyoung #if 0
1288 1.1 dyoung #ifdef AHCI_DEBUG
1289 1.1 dyoung char str[64];
1290 1.1 dyoung int i;
1291 1.1 dyoung #endif
1292 1.1 dyoung int timeout;
1293 1.1 dyoung int ls_via_hub = 0;
1294 1.1 dyoung int pl;
1295 1.12.6.1 skrll uint8_t isr;
1296 1.12.6.1 skrll uint8_t result = 0;
1297 1.12.6.5 skrll uint8_t devaddr = pipe->up_dev->ud_addr;
1298 1.12.6.5 skrll uint8_t endpointaddr = pipe->up_endpoint->ue_edesc->bEndpointAddress;
1299 1.12.6.1 skrll uint8_t endpoint;
1300 1.12.6.1 skrll uint8_t cmd = DATA0_RD;
1301 1.1 dyoung
1302 1.1 dyoung endpoint = UE_GET_ADDR(endpointaddr);
1303 1.1 dyoung DPRINTF(D_XFER, ("\n(%x,%d%s%d,%d) ",
1304 1.1 dyoung pid, len, (pid == SL11_PID_IN) ? "<-" : "->", devaddr, endpoint));
1305 1.1 dyoung
1306 1.1 dyoung /* Set registers */
1307 1.1 dyoung sl11write(sc, SL11_E0ADDR, 0x40);
1308 1.1 dyoung sl11write(sc, SL11_E0LEN, len);
1309 1.1 dyoung sl11write(sc, SL11_E0PID, (pid << 4) + endpoint);
1310 1.1 dyoung sl11write(sc, SL11_E0DEV, devaddr);
1311 1.1 dyoung
1312 1.1 dyoung /* Set buffer unless PID_IN */
1313 1.1 dyoung if (pid != SL11_PID_IN) {
1314 1.1 dyoung if (len > 0)
1315 1.1 dyoung sl11write_region(sc, 0x40, buf, len);
1316 1.1 dyoung cmd = DATA0_WR;
1317 1.1 dyoung }
1318 1.1 dyoung
1319 1.1 dyoung /* timing ? */
1320 1.1 dyoung pl = (len >> 3) + 3;
1321 1.1 dyoung
1322 1.1 dyoung /* Low speed device via HUB */
1323 1.1 dyoung /* XXX does not work... */
1324 1.12.6.5 skrll if ((sc->sc_fullspeed) && pipe->up_dev->ud_speed == USB_SPEED_LOW) {
1325 1.1 dyoung pl = len + 16;
1326 1.1 dyoung cmd |= SL11_EPCTRL_PREAMBLE;
1327 1.1 dyoung
1328 1.1 dyoung /*
1329 1.1 dyoung * SL811HS/T rev 1.2 has a bug, when it got PID_IN
1330 1.1 dyoung * from LowSpeed device via HUB.
1331 1.1 dyoung */
1332 1.1 dyoung if (sc->sc_sltype == SLTYPE_SL811HS_R12 && pid == SL11_PID_IN) {
1333 1.1 dyoung ls_via_hub = 1;
1334 1.1 dyoung DPRINTF(D_MSG, ("LSvH "));
1335 1.1 dyoung }
1336 1.1 dyoung }
1337 1.1 dyoung
1338 1.1 dyoung /* timing ? */
1339 1.12.6.1 skrll if (sl11read(sc, SL811_CSOF) <= (uint8_t)pl)
1340 1.1 dyoung cmd |= SL11_EPCTRL_SOF;
1341 1.1 dyoung
1342 1.1 dyoung /* Transfer */
1343 1.1 dyoung sl11write(sc, SL11_ISR, 0xff);
1344 1.1 dyoung sl11write(sc, SL11_E0CTRL, cmd | toggle);
1345 1.1 dyoung
1346 1.1 dyoung /* Polling */
1347 1.1 dyoung for (timeout = AHCI_TIMEOUT; timeout; timeout--) {
1348 1.1 dyoung isr = sl11read(sc, SL11_ISR);
1349 1.1 dyoung if ((isr & SL11_ISR_USBA))
1350 1.1 dyoung break;
1351 1.1 dyoung }
1352 1.1 dyoung
1353 1.1 dyoung /* Check result status */
1354 1.1 dyoung result = sl11read(sc, SL11_E0STAT);
1355 1.1 dyoung if (!(result & SL11_EPSTAT_NAK) && ls_via_hub) {
1356 1.1 dyoung /* Resend PID_IN within 20usec */
1357 1.1 dyoung sl11write(sc, SL11_ISR, 0xff);
1358 1.1 dyoung sl11write(sc, SL11_E0CTRL, SL11_EPCTRL_ARM);
1359 1.1 dyoung }
1360 1.1 dyoung
1361 1.1 dyoung sl11write(sc, SL11_ISR, 0xff);
1362 1.1 dyoung
1363 1.1 dyoung DPRINTF(D_XFER, ("t=%d i=%x ", AHCI_TIMEOUT - timeout, isr));
1364 1.1 dyoung #if AHCI_DEBUG
1365 1.5 christos snprintb(str, sizeof(str),
1366 1.5 christos "\20\x8STALL\7NAK\6OV\5SETUP\4DATA1\3TIMEOUT\2ERR\1ACK", result);
1367 1.1 dyoung DPRINTF(D_XFER, ("STAT=%s ", str));
1368 1.1 dyoung #endif
1369 1.1 dyoung
1370 1.1 dyoung if ((result & SL11_EPSTAT_ERROR))
1371 1.1 dyoung return -1;
1372 1.1 dyoung
1373 1.1 dyoung if ((result & SL11_EPSTAT_NAK))
1374 1.1 dyoung return 0;
1375 1.1 dyoung
1376 1.1 dyoung /* Read buffer if PID_IN */
1377 1.1 dyoung if (pid == SL11_PID_IN && len > 0) {
1378 1.1 dyoung sl11read_region(sc, buf, 0x40, len);
1379 1.1 dyoung #if AHCI_DEBUG
1380 1.1 dyoung for (i = 0; i < len; i++)
1381 1.1 dyoung DPRINTF(D_XFER, ("%02X ", buf[i]));
1382 1.1 dyoung #endif
1383 1.1 dyoung }
1384 1.1 dyoung
1385 1.1 dyoung return 1;
1386 1.1 dyoung #endif
1387 1.1 dyoung }
1388 1.1 dyoung
1389 1.1 dyoung void
1390 1.12.6.12 skrll ahci_abort_xfer(struct usbd_xfer *xfer, usbd_status status)
1391 1.1 dyoung {
1392 1.12.6.5 skrll xfer->ux_status = status;
1393 1.1 dyoung usb_transfer_complete(xfer);
1394 1.1 dyoung }
1395 1.1 dyoung
1396 1.1 dyoung void
1397 1.12.6.12 skrll ahci_device_clear_toggle(struct usbd_pipe *pipe)
1398 1.1 dyoung {
1399 1.12.6.2 skrll struct ahci_pipe *apipe = (struct ahci_pipe *)pipe;
1400 1.1 dyoung apipe->toggle = 0;
1401 1.1 dyoung }
1402 1.1 dyoung
1403 1.1 dyoung #ifdef AHCI_DEBUG
1404 1.1 dyoung void
1405 1.1 dyoung print_req(usb_device_request_t *r)
1406 1.1 dyoung {
1407 1.1 dyoung const char *xmes[]={
1408 1.1 dyoung "GETSTAT",
1409 1.1 dyoung "CLRFEAT",
1410 1.1 dyoung "res",
1411 1.1 dyoung "SETFEAT",
1412 1.1 dyoung "res",
1413 1.1 dyoung "SETADDR",
1414 1.1 dyoung "GETDESC",
1415 1.1 dyoung "SETDESC",
1416 1.1 dyoung "GETCONF",
1417 1.1 dyoung "SETCONF",
1418 1.1 dyoung "GETIN/F",
1419 1.1 dyoung "SETIN/F",
1420 1.1 dyoung "SYNC_FR"
1421 1.1 dyoung };
1422 1.1 dyoung int req, type, value, index, len;
1423 1.1 dyoung
1424 1.1 dyoung req = r->bRequest;
1425 1.1 dyoung type = r->bmRequestType;
1426 1.1 dyoung value = UGETW(r->wValue);
1427 1.1 dyoung index = UGETW(r->wIndex);
1428 1.1 dyoung len = UGETW(r->wLength);
1429 1.1 dyoung
1430 1.1 dyoung printf("%x,%s,v=%d,i=%d,l=%d ",
1431 1.1 dyoung type, xmes[req], value, index, len);
1432 1.1 dyoung }
1433 1.1 dyoung
1434 1.1 dyoung void
1435 1.1 dyoung print_req_hub(usb_device_request_t *r)
1436 1.1 dyoung {
1437 1.1 dyoung struct {
1438 1.1 dyoung int req;
1439 1.1 dyoung int type;
1440 1.1 dyoung const char *str;
1441 1.1 dyoung } conf[] = {
1442 1.1 dyoung { 1, 0x20, "ClrHubFeat" },
1443 1.1 dyoung { 1, 0x23, "ClrPortFeat" },
1444 1.1 dyoung { 2, 0xa3, "GetBusState" },
1445 1.1 dyoung { 6, 0xa0, "GetHubDesc" },
1446 1.1 dyoung { 0, 0xa0, "GetHubStat" },
1447 1.1 dyoung { 0, 0xa3, "GetPortStat" },
1448 1.1 dyoung { 7, 0x20, "SetHubDesc" },
1449 1.1 dyoung { 3, 0x20, "SetHubFeat" },
1450 1.1 dyoung { 3, 0x23, "SetPortFeat" },
1451 1.1 dyoung {-1, 0, NULL},
1452 1.1 dyoung };
1453 1.1 dyoung int i;
1454 1.1 dyoung int value, index, len;
1455 1.1 dyoung
1456 1.1 dyoung value = UGETW(r->wValue);
1457 1.1 dyoung index = UGETW(r->wIndex);
1458 1.1 dyoung len = UGETW(r->wLength);
1459 1.1 dyoung for (i = 0; ; i++) {
1460 1.1 dyoung if (conf[i].req == -1 )
1461 1.1 dyoung return print_req(r);
1462 1.1 dyoung if (r->bmRequestType == conf[i].type && r->bRequest == conf[i].req) {
1463 1.1 dyoung printf("%s", conf[i].str);
1464 1.1 dyoung break;
1465 1.1 dyoung }
1466 1.1 dyoung }
1467 1.1 dyoung printf(",v=%d,i=%d,l=%d ", value, index, len);
1468 1.1 dyoung }
1469 1.1 dyoung
1470 1.1 dyoung void
1471 1.1 dyoung print_dumpreg(struct ahci_softc *sc)
1472 1.1 dyoung {
1473 1.1 dyoung #if 0
1474 1.1 dyoung printf("00=%02x,01=%02x,02=%02x,03=%02x,04=%02x,"
1475 1.1 dyoung "08=%02x,09=%02x,0A=%02x,0B=%02x,0C=%02x,",
1476 1.1 dyoung sl11read(sc, 0), sl11read(sc, 1),
1477 1.1 dyoung sl11read(sc, 2), sl11read(sc, 3),
1478 1.1 dyoung sl11read(sc, 4), sl11read(sc, 8),
1479 1.1 dyoung sl11read(sc, 9), sl11read(sc, 10),
1480 1.1 dyoung sl11read(sc, 11), sl11read(sc, 12)
1481 1.1 dyoung );
1482 1.1 dyoung printf("CR1=%02x,IER=%02x,0D=%02x,0E=%02x,0F=%02x ",
1483 1.1 dyoung sl11read(sc, 5), sl11read(sc, 6),
1484 1.1 dyoung sl11read(sc, 13), sl11read(sc, 14), sl11read(sc, 15)
1485 1.1 dyoung );
1486 1.1 dyoung #endif
1487 1.1 dyoung }
1488 1.1 dyoung
1489 1.1 dyoung void
1490 1.12.6.12 skrll print_xfer(struct usbd_xfer *xfer)
1491 1.1 dyoung {
1492 1.1 dyoung printf("xfer: length=%d, actlen=%d, flags=%x, timeout=%d,",
1493 1.12.6.5 skrll xfer->ux_length, xfer->ux_actlen, xfer->ux_flags, xfer->ux_timeout);
1494 1.1 dyoung printf("request{ ");
1495 1.12.6.5 skrll print_req_hub(&xfer->ux_request);
1496 1.1 dyoung printf("} ");
1497 1.1 dyoung }
1498 1.1 dyoung #endif /* AHCI_DEBUG */
1499