octeon_pci.c revision 1.2.2.2
1 1.2.2.2 skrll /* $NetBSD: octeon_pci.c,v 1.2.2.2 2015/06/06 14:40:01 skrll Exp $ */ 2 1.2.2.2 skrll 3 1.2.2.2 skrll /* 4 1.2.2.2 skrll * Copyright (c) 2007, 2008 Internet Initiative Japan, Inc. 5 1.2.2.2 skrll * All rights reserved. 6 1.2.2.2 skrll * 7 1.2.2.2 skrll * Redistribution and use in source and binary forms, with or without 8 1.2.2.2 skrll * modification, are permitted provided that the following conditions 9 1.2.2.2 skrll * are met: 10 1.2.2.2 skrll * 1. Redistributions of source code must retain the above copyright 11 1.2.2.2 skrll * notice, this list of conditions and the following disclaimer. 12 1.2.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 13 1.2.2.2 skrll * notice, this list of conditions and the following disclaimer in the 14 1.2.2.2 skrll * documentation and/or other materials provided with the distribution. 15 1.2.2.2 skrll * 16 1.2.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 1.2.2.2 skrll * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 1.2.2.2 skrll * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 1.2.2.2 skrll * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 1.2.2.2 skrll * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 1.2.2.2 skrll * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 1.2.2.2 skrll * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 1.2.2.2 skrll * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 1.2.2.2 skrll * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.2.2.2 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.2.2.2 skrll * SUCH DAMAGE. 27 1.2.2.2 skrll */ 28 1.2.2.2 skrll 29 1.2.2.2 skrll #include <sys/cdefs.h> 30 1.2.2.2 skrll __KERNEL_RCSID(0, "$NetBSD: octeon_pci.c,v 1.2.2.2 2015/06/06 14:40:01 skrll Exp $"); 31 1.2.2.2 skrll 32 1.2.2.2 skrll #include "opt_octeon.h" 33 1.2.2.2 skrll 34 1.2.2.2 skrll #include <sys/param.h> 35 1.2.2.2 skrll #include <sys/systm.h> 36 1.2.2.2 skrll #include <sys/types.h> 37 1.2.2.2 skrll #include <sys/device.h> 38 1.2.2.2 skrll 39 1.2.2.2 skrll #include <sys/bus.h> 40 1.2.2.2 skrll 41 1.2.2.2 skrll #include <mips/cavium/octeonvar.h> 42 1.2.2.2 skrll #include <mips/cavium/dev/octeon_ciureg.h> 43 1.2.2.2 skrll #include <mips/cavium/dev/octeon_npireg.h> 44 1.2.2.2 skrll 45 1.2.2.2 skrll /* 46 1.2.2.2 skrll * In OCTEON, some infrequent, error interrupts (RML) are handled with PCI 47 1.2.2.2 skrll * interrupt. Hence, here. 48 1.2.2.2 skrll */ 49 1.2.2.2 skrll 50 1.2.2.2 skrll void octeon_pci_bootstrap(struct octeon_config *); 51 1.2.2.2 skrll static void octeon_pci_init(void); 52 1.2.2.2 skrll 53 1.2.2.2 skrll #ifdef OCTEON_ETH_DEBUG 54 1.2.2.2 skrll static int octeon_pci_intr_rml(void *); 55 1.2.2.2 skrll static void *octeon_pci_intr_rml_ih; 56 1.2.2.2 skrll #endif 57 1.2.2.2 skrll 58 1.2.2.2 skrll void 59 1.2.2.2 skrll octeon_pci_bootstrap(struct octeon_config *mcp) 60 1.2.2.2 skrll { 61 1.2.2.2 skrll octeon_pci_init(); 62 1.2.2.2 skrll } 63 1.2.2.2 skrll 64 1.2.2.2 skrll static void 65 1.2.2.2 skrll octeon_pci_init(void) 66 1.2.2.2 skrll { 67 1.2.2.2 skrll #ifdef OCTEON_ETH_DEBUG 68 1.2.2.2 skrll octeon_pci_intr_rml_ih = octeon_intr_establish( 69 1.2.2.2 skrll ffs64(CIU_INTX_SUM0_RML) - 1, IPL_NET, octeon_pci_intr_rml, NULL); 70 1.2.2.2 skrll #endif 71 1.2.2.2 skrll } 72 1.2.2.2 skrll 73 1.2.2.2 skrll #ifdef OCTEON_ETH_DEBUG 74 1.2.2.2 skrll int octeon_pci_intr_rml_verbose; 75 1.2.2.2 skrll 76 1.2.2.2 skrll void octeon_gmx_intr_rml_gmx0(void *); 77 1.2.2.2 skrll void octeon_gmx_intr_rml_gmx1(void *); 78 1.2.2.2 skrll void octeon_asx_intr_rml(void *); 79 1.2.2.2 skrll void octeon_ipd_intr_rml(void *); 80 1.2.2.2 skrll void octeon_pip_intr_rml(void *); 81 1.2.2.2 skrll void octeon_pow_intr_rml(void *); 82 1.2.2.2 skrll void octeon_pko_intr_rml(void *); 83 1.2.2.2 skrll void octeon_fpa_intr_rml(void *); 84 1.2.2.2 skrll 85 1.2.2.2 skrll static int 86 1.2.2.2 skrll octeon_pci_intr_rml(void *arg) 87 1.2.2.2 skrll { 88 1.2.2.2 skrll uint64_t block; 89 1.2.2.2 skrll 90 1.2.2.2 skrll block = octeon_read_csr(NPI_RSL_INT_BLOCKS); 91 1.2.2.2 skrll if (octeon_pci_intr_rml_verbose) 92 1.2.2.2 skrll printf("%s: block=0x%016" PRIx64 "\n", __func__, block); 93 1.2.2.2 skrll if (ISSET(block, NPI_RSL_INT_BLOCKS_GMX0)) 94 1.2.2.2 skrll octeon_gmx_intr_rml_gmx0(arg); 95 1.2.2.2 skrll #ifdef notyet 96 1.2.2.2 skrll if (ISSET(block, NPI_RSL_INT_BLOCKS_GMX1)) 97 1.2.2.2 skrll octeon_gmx_intr_rml_gmx1(arg); 98 1.2.2.2 skrll #endif 99 1.2.2.2 skrll if (ISSET(block, NPI_RSL_INT_BLOCKS_ASX0)) 100 1.2.2.2 skrll octeon_asx_intr_rml(arg); 101 1.2.2.2 skrll if (ISSET(block, NPI_RSL_INT_BLOCKS_IPD)) 102 1.2.2.2 skrll octeon_ipd_intr_rml(arg); 103 1.2.2.2 skrll if (ISSET(block, NPI_RSL_INT_BLOCKS_PIP)) 104 1.2.2.2 skrll octeon_pip_intr_rml(arg); 105 1.2.2.2 skrll if (ISSET(block, NPI_RSL_INT_BLOCKS_POW)) 106 1.2.2.2 skrll octeon_pow_intr_rml(arg); 107 1.2.2.2 skrll if (ISSET(block, NPI_RSL_INT_BLOCKS_PKO)) 108 1.2.2.2 skrll octeon_pko_intr_rml(arg); 109 1.2.2.2 skrll if (ISSET(block, NPI_RSL_INT_BLOCKS_FPA)) 110 1.2.2.2 skrll octeon_fpa_intr_rml(arg); 111 1.2.2.2 skrll return 1; 112 1.2.2.2 skrll } 113 1.2.2.2 skrll #endif 114
Indexes created Tue Sep 30 20:09:53 GMT 2025