asm.h revision 1.40.38.13
1 /* $NetBSD: asm.h,v 1.40.38.13 2010/12/24 07:16:50 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93 35 */ 36 37 /* 38 * machAsmDefs.h -- 39 * 40 * Macros used when writing assembler programs. 41 * 42 * Copyright (C) 1989 Digital Equipment Corporation. 43 * Permission to use, copy, modify, and distribute this software and 44 * its documentation for any purpose and without fee is hereby granted, 45 * provided that the above copyright notice appears in all copies. 46 * Digital Equipment Corporation makes no representations about the 47 * suitability of this software for any purpose. It is provided "as is" 48 * without express or implied warranty. 49 * 50 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h, 51 * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) 52 */ 53 54 #ifndef _MIPS_ASM_H 55 #define _MIPS_ASM_H 56 57 #include <machine/cdefs.h> /* for API selection */ 58 #include <mips/regdef.h> 59 60 /* 61 * Define -pg profile entry code. 62 * Must always be noreorder, must never use a macro instruction 63 * Final addiu to t9 must always equal the size of this _KERN_MCOUNT 64 */ 65 #define _KERN_MCOUNT \ 66 .set push; \ 67 .set noreorder; \ 68 .set noat; \ 69 subu sp,sp,16; \ 70 sw t9,12(sp); \ 71 move AT,ra; \ 72 lui t9,%hi(_mcount); \ 73 addiu t9,t9,%lo(_mcount); \ 74 jalr t9; \ 75 nop; \ 76 lw t9,4(sp); \ 77 addiu sp,sp,8; \ 78 addiu t9,t9,40; \ 79 .set pop; 80 81 #ifdef GPROF 82 #define MCOUNT _KERN_MCOUNT 83 #else 84 #define MCOUNT 85 #endif 86 87 #ifdef __NO_LEADING_UNDERSCORES__ 88 # define _C_LABEL(x) x 89 #else 90 # ifdef __STDC__ 91 # define _C_LABEL(x) _ ## x 92 # else 93 # define _C_LABEL(x) _/**/x 94 # endif 95 #endif 96 97 #ifdef USE_AENT 98 #define AENT(x) \ 99 .aent x, 0 100 #else 101 #define AENT(x) 102 #endif 103 104 /* 105 * WEAK_ALIAS: create a weak alias. 106 */ 107 #define WEAK_ALIAS(alias,sym) \ 108 .weak alias; \ 109 alias = sym 110 /* 111 * STRONG_ALIAS: create a strong alias. 112 */ 113 #define STRONG_ALIAS(alias,sym) \ 114 .globl alias; \ 115 alias = sym 116 117 /* 118 * WARN_REFERENCES: create a warning if the specified symbol is referenced. 119 */ 120 #ifdef __STDC__ 121 #define WARN_REFERENCES(_sym,_msg) \ 122 .section .gnu.warning. ## _sym ; .ascii _msg ; .text 123 #else 124 #define WARN_REFERENCES(_sym,_msg) \ 125 .section .gnu.warning./**/_sym ; .ascii _msg ; .text 126 #endif /* __STDC__ */ 127 128 /* 129 * LEAF 130 * A leaf routine does 131 * - call no other function, 132 * - never use any register that callee-saved (S0-S8), and 133 * - not use any local stack storage. 134 */ 135 #define LEAF(x) \ 136 .globl _C_LABEL(x); \ 137 .ent _C_LABEL(x), 0; \ 138 _C_LABEL(x): ; \ 139 .frame sp, 0, ra; \ 140 MCOUNT 141 142 /* 143 * LEAF_NOPROFILE 144 * No profilable leaf routine. 145 */ 146 #define LEAF_NOPROFILE(x) \ 147 .globl _C_LABEL(x); \ 148 .ent _C_LABEL(x), 0; \ 149 _C_LABEL(x): ; \ 150 .frame sp, 0, ra 151 152 /* 153 * STATIC_LEAF 154 * Declare a local leaf function. 155 */ 156 #define STATIC_LEAF(x) \ 157 .ent _C_LABEL(x), 0; \ 158 _C_LABEL(x): ; \ 159 .frame sp, 0, ra; \ 160 MCOUNT 161 162 /* 163 * XLEAF 164 * declare alternate entry to leaf routine 165 */ 166 #define XLEAF(x) \ 167 .globl _C_LABEL(x); \ 168 AENT (_C_LABEL(x)); \ 169 _C_LABEL(x): 170 171 /* 172 * STATIC_XLEAF 173 * declare alternate entry to a static leaf routine 174 */ 175 #define STATIC_XLEAF(x) \ 176 AENT (_C_LABEL(x)); \ 177 _C_LABEL(x): 178 179 /* 180 * NESTED 181 * A function calls other functions and needs 182 * therefore stack space to save/restore registers. 183 */ 184 #define NESTED(x, fsize, retpc) \ 185 .globl _C_LABEL(x); \ 186 .ent _C_LABEL(x), 0; \ 187 _C_LABEL(x): ; \ 188 .frame sp, fsize, retpc; \ 189 MCOUNT 190 191 /* 192 * NESTED_NOPROFILE(x) 193 * No profilable nested routine. 194 */ 195 #define NESTED_NOPROFILE(x, fsize, retpc) \ 196 .globl _C_LABEL(x); \ 197 .ent _C_LABEL(x), 0; \ 198 _C_LABEL(x): ; \ 199 .frame sp, fsize, retpc 200 201 /* 202 * XNESTED 203 * declare alternate entry point to nested routine. 204 */ 205 #define XNESTED(x) \ 206 .globl _C_LABEL(x); \ 207 AENT (_C_LABEL(x)); \ 208 _C_LABEL(x): 209 210 /* 211 * END 212 * Mark end of a procedure. 213 */ 214 #define END(x) \ 215 .end _C_LABEL(x); \ 216 .size _C_LABEL(x), . - _C_LABEL(x) 217 218 /* 219 * IMPORT -- import external symbol 220 */ 221 #define IMPORT(sym, size) \ 222 .extern _C_LABEL(sym),size 223 224 /* 225 * EXPORT -- export definition of symbol 226 */ 227 #define EXPORT(x) \ 228 .globl _C_LABEL(x); \ 229 _C_LABEL(x): 230 231 /* 232 * VECTOR 233 * exception vector entrypoint 234 * XXX: regmask should be used to generate .mask 235 */ 236 #define VECTOR(x, regmask) \ 237 .ent _C_LABEL(x),0; \ 238 EXPORT(x); \ 239 240 #ifdef __STDC__ 241 #define VECTOR_END(x) \ 242 EXPORT(x ## _end); \ 243 END(x); \ 244 .org _C_LABEL(x) + 0x80 245 #else 246 #define VECTOR_END(x) \ 247 EXPORT(x/**/_end); \ 248 END(x); \ 249 .org _C_LABEL(x) + 0x80 250 #endif 251 252 /* 253 * Macros to panic and printf from assembly language. 254 */ 255 #define PANIC(msg) \ 256 PTR_LA a0, 9f; \ 257 jal _C_LABEL(panic); \ 258 nop; \ 259 MSG(msg) 260 261 #define PRINTF(msg) \ 262 PTR_LA a0, 9f; \ 263 jal _C_LABEL(printf); \ 264 nop; \ 265 MSG(msg) 266 267 #define MSG(msg) \ 268 .rdata; \ 269 9: .asciiz msg; \ 270 .text 271 272 #define ASMSTR(str) \ 273 .asciiz str; \ 274 .align 3 275 276 #define RCSID(name) .pushsection ".ident"; .asciz name; .popsection 277 278 /* 279 * XXX retain dialects XXX 280 */ 281 #define ALEAF(x) XLEAF(x) 282 #define NLEAF(x) LEAF_NOPROFILE(x) 283 #define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc) 284 #define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc) 285 286 #if defined(__mips_o32) 287 #define SZREG 4 288 #else 289 #define SZREG 8 290 #endif 291 292 #if defined(__mips_o32) || defined(__mips_o64) 293 #define ALSK 7 /* stack alignment */ 294 #define ALMASK -7 /* stack alignment */ 295 #define SZFPREG 4 296 #define FP_L lwc1 297 #define FP_S swc1 298 #else 299 #define ALSK 15 /* stack alignment */ 300 #define ALMASK -15 /* stack alignment */ 301 #define SZFPREG 8 302 #define FP_L ldc1 303 #define FP_S sdc1 304 #endif 305 306 /* 307 * standard callframe { 308 * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64) 309 * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1) 310 * register_t cf_gp; global pointer (only on n32 and n64) 311 * register_t cf_sp; frame pointer 312 * register_t cf_ra; return address 313 * }; 314 */ 315 #if defined(__mips_o32) || defined(__mips_o64) 316 #define CALLFRAME_SIZ (SZREG * (4 + 2)) 317 #define CALLFRAME_S0 0 318 #elif defined(__mips_n32) || defined(__mips_n64) 319 #define CALLFRAME_SIZ (SZREG * 4) 320 #define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG) 321 #endif 322 #ifndef _KERNEL 323 #define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG) 324 #endif 325 #define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) 326 #define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) 327 328 /* 329 * While it would be nice to be compatible with the SGI 330 * REG_L and REG_S macros, because they do not take parameters, it 331 * is impossible to use them with the _MIPS_SIM_ABIX32 model. 332 * 333 * These macros hide the use of mips3 instructions from the 334 * assembler to prevent the assembler from generating 64-bit style 335 * ABI calls. 336 */ 337 #if _MIPS_SZPTR == 32 338 #define PTR_ADD add 339 #define PTR_ADDI addi 340 #define PTR_ADDU addu 341 #define PTR_ADDIU addiu 342 #define PTR_SUB add 343 #define PTR_SUBI subi 344 #define PTR_SUBU subu 345 #define PTR_SUBIU subu 346 #define PTR_L lw 347 #define PTR_LA la 348 #define PTR_S sw 349 #define PTR_SLL sll 350 #define PTR_SLLV sllv 351 #define PTR_SRL srl 352 #define PTR_SRLV srlv 353 #define PTR_SRA sra 354 #define PTR_SRAV srav 355 #define PTR_LL ll 356 #define PTR_SC sc 357 #define PTR_WORD .word 358 #define PTR_SCALESHIFT 2 359 #else /* _MIPS_SZPTR == 64 */ 360 #define PTR_ADD dadd 361 #define PTR_ADDI daddi 362 #define PTR_ADDU daddu 363 #define PTR_ADDIU daddiu 364 #define PTR_SUB dadd 365 #define PTR_SUBI dsubi 366 #define PTR_SUBU dsubu 367 #define PTR_SUBIU dsubu 368 #define PTR_L ld 369 #define PTR_LA dla 370 #define PTR_S sd 371 #define PTR_SLL dsll 372 #define PTR_SLLV dsllv 373 #define PTR_SRL dsrl 374 #define PTR_SRLV dsrlv 375 #define PTR_SRA dsra 376 #define PTR_SRAV dsrav 377 #define PTR_LL lld 378 #define PTR_SC scd 379 #define PTR_WORD .dword 380 #define PTR_SCALESHIFT 3 381 #endif /* _MIPS_SZPTR == 64 */ 382 383 #if _MIPS_SZINT == 32 384 #define INT_ADD add 385 #define INT_ADDI addi 386 #define INT_ADDU addu 387 #define INT_ADDIU addiu 388 #define INT_SUB add 389 #define INT_SUBI subi 390 #define INT_SUBU subu 391 #define INT_SUBIU subu 392 #define INT_L lw 393 #define INT_LA la 394 #define INT_S sw 395 #define INT_SLL sll 396 #define INT_SLLV sllv 397 #define INT_SRL srl 398 #define INT_SRLV srlv 399 #define INT_SRA sra 400 #define INT_SRAV srav 401 #define INT_LL ll 402 #define INT_SC sc 403 #define INT_WORD .word 404 #define INT_SCALESHIFT 2 405 #else 406 #define INT_ADD dadd 407 #define INT_ADDI daddi 408 #define INT_ADDU daddu 409 #define INT_ADDIU daddiu 410 #define INT_SUB dadd 411 #define INT_SUBI dsubi 412 #define INT_SUBU dsubu 413 #define INT_SUBIU dsubu 414 #define INT_L ld 415 #define INT_LA dla 416 #define INT_S sd 417 #define INT_SLL dsll 418 #define INT_SLLV dsllv 419 #define INT_SRL dsrl 420 #define INT_SRLV dsrlv 421 #define INT_SRA dsra 422 #define INT_SRAV dsrav 423 #define INT_LL lld 424 #define INT_SC scd 425 #define INT_WORD .dword 426 #define INT_SCALESHIFT 3 427 #endif 428 429 #if _MIPS_SZLONG == 32 430 #define LONG_ADD add 431 #define LONG_ADDI addi 432 #define LONG_ADDU addu 433 #define LONG_ADDIU addiu 434 #define LONG_SUB add 435 #define LONG_SUBI subi 436 #define LONG_SUBU subu 437 #define LONG_SUBIU subu 438 #define LONG_L lw 439 #define LONG_LA la 440 #define LONG_S sw 441 #define LONG_SLL sll 442 #define LONG_SLLV sllv 443 #define LONG_SRL srl 444 #define LONG_SRLV srlv 445 #define LONG_SRA sra 446 #define LONG_SRAV srav 447 #define LONG_LL ll 448 #define LONG_SC sc 449 #define LONG_WORD .word 450 #define LONG_SCALESHIFT 2 451 #else 452 #define LONG_ADD dadd 453 #define LONG_ADDI daddi 454 #define LONG_ADDU daddu 455 #define LONG_ADDIU daddiu 456 #define LONG_SUB dadd 457 #define LONG_SUBI dsubi 458 #define LONG_SUBU dsubu 459 #define LONG_SUBIU dsubu 460 #define LONG_L ld 461 #define LONG_LA dla 462 #define LONG_S sd 463 #define LONG_SLL dsll 464 #define LONG_SLLV dsllv 465 #define LONG_SRL dsrl 466 #define LONG_SRLV dsrlv 467 #define LONG_SRA dsra 468 #define LONG_SRAV dsrav 469 #define LONG_LL lld 470 #define LONG_SC scd 471 #define LONG_WORD .dword 472 #define LONG_SCALESHIFT 3 473 #endif 474 475 #if SZREG == 4 476 #define REG_L lw 477 #define REG_S sw 478 #define REG_LI li 479 #define REG_ADDU addu 480 #define REG_SLL sll 481 #define REG_SLLV sllv 482 #define REG_SRL srl 483 #define REG_SRLV srlv 484 #define REG_SRA sra 485 #define REG_SRAV srav 486 #define REG_LL ll 487 #define REG_SC sc 488 #define REG_SCALESHIFT 2 489 #else 490 #define REG_L ld 491 #define REG_S sd 492 #define REG_LI dli 493 #define REG_ADDU daddu 494 #define REG_SLL dsll 495 #define REG_SLLV dsllv 496 #define REG_SRL dsrl 497 #define REG_SRLV dsrlv 498 #define REG_SRA dsra 499 #define REG_SRAV dsrav 500 #define REG_LL lld 501 #define REG_SC scd 502 #define REG_SCALESHIFT 3 503 #endif 504 505 #if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \ 506 _MIPS_ISA == _MIPS_ISA_MIPS32 507 #define MFC0 mfc0 508 #define MTC0 mtc0 509 #endif 510 #if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \ 511 _MIPS_ISA == _MIPS_ISA_MIPS64 512 #define MFC0 dmfc0 513 #define MTC0 dmtc0 514 #endif 515 516 #if defined(__mips_o32) || defined(__mips_o64) 517 518 #ifdef __ABICALLS__ 519 #define CPRESTORE(r) .cprestore r 520 #define CPLOAD(r) .cpload r 521 #else 522 #define CPRESTORE(r) /* not needed */ 523 #define CPLOAD(r) /* not needed */ 524 #endif 525 526 #define SETUP_GP \ 527 .set push; \ 528 .set noreorder; \ 529 .cpload t9; \ 530 .set pop 531 #define SETUP_GPX(r) \ 532 .set push; \ 533 .set noreorder; \ 534 move r,ra; /* save old ra */ \ 535 bal 7f; \ 536 nop; \ 537 7: .cpload ra; \ 538 move ra,r; \ 539 .set pop 540 #define SETUP_GPX_L(r,lbl) \ 541 .set push; \ 542 .set noreorder; \ 543 move r,ra; /* save old ra */ \ 544 bal lbl; \ 545 nop; \ 546 lbl: .cpload ra; \ 547 move ra,r; \ 548 .set pop 549 #define SAVE_GP(x) .cprestore x 550 551 #define SETUP_GP64(a,b) /* n32/n64 specific */ 552 #define SETUP_GP64_R(a,b) /* n32/n64 specific */ 553 #define SETUP_GPX64(a,b) /* n32/n64 specific */ 554 #define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */ 555 #define RESTORE_GP64 /* n32/n64 specific */ 556 #define USE_ALT_CP(a) /* n32/n64 specific */ 557 #endif /* __mips_o32 || __mips_o64 */ 558 559 #if defined(__mips_o32) || defined(__mips_o64) 560 #define REG_PROLOGUE .set push 561 #define REG_EPILOGUE .set pop 562 #endif 563 #if defined(__mips_n32) || defined(__mips_n64) 564 #define REG_PROLOGUE .set push ; .set mips3 565 #define REG_EPILOGUE .set pop 566 #endif 567 568 #if defined(__mips_n32) || defined(__mips_n64) 569 #define SETUP_GP /* o32 specific */ 570 #define SETUP_GPX(r) /* o32 specific */ 571 #define SETUP_GPX_L(r,lbl) /* o32 specific */ 572 #define SAVE_GP(x) /* o32 specific */ 573 #define SETUP_GP64(a,b) .cpsetup $25, a, b 574 #define SETUP_GPX64(a,b) \ 575 .set push; \ 576 move b,ra; \ 577 .set noreorder; \ 578 bal 7f; \ 579 nop; \ 580 7: .set pop; \ 581 .cpsetup ra, a, 7b; \ 582 move ra,b 583 #define SETUP_GPX64_L(a,b,c) \ 584 .set push; \ 585 move b,ra; \ 586 .set noreorder; \ 587 bal c; \ 588 nop; \ 589 c: .set pop; \ 590 .cpsetup ra, a, c; \ 591 move ra,b 592 #define RESTORE_GP64 .cpreturn 593 #define USE_ALT_CP(a) .cplocal a 594 #endif /* __mips_n32 || __mips_n64 */ 595 596 /* 597 * The DYNAMIC_STATUS_MASK option adds an additional masking operation 598 * when updating the hardware interrupt mask in the status register. 599 * 600 * This is useful for platforms that need to at run-time mask 601 * interrupts based on motherboard configuration or to handle 602 * slowly clearing interrupts. 603 * 604 * XXX this is only currently implemented for mips3. 605 */ 606 #ifdef MIPS_DYNAMIC_STATUS_MASK 607 #define DYNAMIC_STATUS_MASK(sr,scratch) \ 608 lw scratch, mips_dynamic_status_mask; \ 609 and sr, sr, scratch 610 611 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) \ 612 ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \ 613 DYNAMIC_STATUS_MASK(sr,scratch1) 614 #else 615 #define DYNAMIC_STATUS_MASK(sr,scratch) 616 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) 617 #endif 618 619 /* See lock_stubs.S. */ 620 #define MIPS_LOCK_RAS_SIZE (4*64) 621 622 #define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off) 623 624 #endif /* _MIPS_ASM_H */ 625
Indexes created Wed Oct 01 19:09:53 GMT 2025