asm.h revision 1.40.38.7
1 /* $NetBSD: asm.h,v 1.40.38.7 2009/09/03 00:02:53 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93 35 */ 36 37 /* 38 * machAsmDefs.h -- 39 * 40 * Macros used when writing assembler programs. 41 * 42 * Copyright (C) 1989 Digital Equipment Corporation. 43 * Permission to use, copy, modify, and distribute this software and 44 * its documentation for any purpose and without fee is hereby granted, 45 * provided that the above copyright notice appears in all copies. 46 * Digital Equipment Corporation makes no representations about the 47 * suitability of this software for any purpose. It is provided "as is" 48 * without express or implied warranty. 49 * 50 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h, 51 * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) 52 */ 53 54 #ifndef _MIPS_ASM_H 55 #define _MIPS_ASM_H 56 57 #include <machine/cdefs.h> /* for API selection */ 58 #include <mips/regdef.h> 59 60 /* 61 * Define -pg profile entry code. 62 * Must always be noreorder, must never use a macro instruction 63 * Final addiu to t9 must always equal the size of this _KERN_MCOUNT 64 */ 65 #define _KERN_MCOUNT \ 66 .set push; \ 67 .set noreorder; \ 68 .set noat; \ 69 subu sp,sp,16; \ 70 sw t9,12(sp); \ 71 move AT,ra; \ 72 lui t9,%hi(_mcount); \ 73 addiu t9,t9,%lo(_mcount); \ 74 jalr t9; \ 75 nop; \ 76 lw t9,4(sp); \ 77 addiu sp,sp,8; \ 78 addiu t9,t9,40; \ 79 .set pop; 80 81 #ifdef GPROF 82 #define MCOUNT _KERN_MCOUNT 83 #else 84 #define MCOUNT 85 #endif 86 87 #ifdef __NO_LEADING_UNDERSCORES__ 88 # define _C_LABEL(x) x 89 #else 90 # ifdef __STDC__ 91 # define _C_LABEL(x) _ ## x 92 # else 93 # define _C_LABEL(x) _/**/x 94 # endif 95 #endif 96 97 #ifdef USE_AENT 98 #define AENT(x) \ 99 .aent x, 0 100 #else 101 #define AENT(x) 102 #endif 103 104 /* 105 * WEAK_ALIAS: create a weak alias. 106 */ 107 #define WEAK_ALIAS(alias,sym) \ 108 .weak alias; \ 109 alias = sym 110 /* 111 * STRONG_ALIAS: create a strong alias. 112 */ 113 #define STRONG_ALIAS(alias,sym) \ 114 .globl alias; \ 115 alias = sym 116 117 /* 118 * WARN_REFERENCES: create a warning if the specified symbol is referenced. 119 */ 120 #ifdef __STDC__ 121 #define WARN_REFERENCES(_sym,_msg) \ 122 .section .gnu.warning. ## _sym ; .ascii _msg ; .text 123 #else 124 #define WARN_REFERENCES(_sym,_msg) \ 125 .section .gnu.warning./**/_sym ; .ascii _msg ; .text 126 #endif /* __STDC__ */ 127 128 /* 129 * LEAF 130 * A leaf routine does 131 * - call no other function, 132 * - never use any register that callee-saved (S0-S8), and 133 * - not use any local stack storage. 134 */ 135 #define LEAF(x) \ 136 .globl _C_LABEL(x); \ 137 .ent _C_LABEL(x), 0; \ 138 _C_LABEL(x): ; \ 139 .frame sp, 0, ra; \ 140 MCOUNT 141 142 /* 143 * LEAF_NOPROFILE 144 * No profilable leaf routine. 145 */ 146 #define LEAF_NOPROFILE(x) \ 147 .globl _C_LABEL(x); \ 148 .ent _C_LABEL(x), 0; \ 149 _C_LABEL(x): ; \ 150 .frame sp, 0, ra 151 152 /* 153 * STATIC_LEAF 154 * Declare a local leaf function. 155 */ 156 #define STATIC_LEAF(x) \ 157 .ent _C_LABEL(x), 0; \ 158 _C_LABEL(x): ; \ 159 .frame sp, 0, ra; \ 160 MCOUNT 161 162 /* 163 * XLEAF 164 * declare alternate entry to leaf routine 165 */ 166 #define XLEAF(x) \ 167 .globl _C_LABEL(x); \ 168 AENT (_C_LABEL(x)); \ 169 _C_LABEL(x): 170 171 /* 172 * STATIC_XLEAF 173 * declare alternate entry to a static leaf routine 174 */ 175 #define STATIC_XLEAF(x) \ 176 AENT (_C_LABEL(x)); \ 177 _C_LABEL(x): 178 179 /* 180 * NESTED 181 * A function calls other functions and needs 182 * therefore stack space to save/restore registers. 183 */ 184 #define NESTED(x, fsize, retpc) \ 185 .globl _C_LABEL(x); \ 186 .ent _C_LABEL(x), 0; \ 187 _C_LABEL(x): ; \ 188 .frame sp, fsize, retpc; \ 189 MCOUNT 190 191 /* 192 * NESTED_NOPROFILE(x) 193 * No profilable nested routine. 194 */ 195 #define NESTED_NOPROFILE(x, fsize, retpc) \ 196 .globl _C_LABEL(x); \ 197 .ent _C_LABEL(x), 0; \ 198 _C_LABEL(x): ; \ 199 .frame sp, fsize, retpc 200 201 /* 202 * XNESTED 203 * declare alternate entry point to nested routine. 204 */ 205 #define XNESTED(x) \ 206 .globl _C_LABEL(x); \ 207 AENT (_C_LABEL(x)); \ 208 _C_LABEL(x): 209 210 /* 211 * END 212 * Mark end of a procedure. 213 */ 214 #define END(x) \ 215 .end _C_LABEL(x); \ 216 .size _C_LABEL(x), . - _C_LABEL(x) 217 218 /* 219 * IMPORT -- import external symbol 220 */ 221 #define IMPORT(sym, size) \ 222 .extern _C_LABEL(sym),size 223 224 /* 225 * EXPORT -- export definition of symbol 226 */ 227 #define EXPORT(x) \ 228 .globl _C_LABEL(x); \ 229 _C_LABEL(x): 230 231 /* 232 * VECTOR 233 * exception vector entrypoint 234 * XXX: regmask should be used to generate .mask 235 */ 236 #define VECTOR(x, regmask) \ 237 .ent _C_LABEL(x),0; \ 238 EXPORT(x); \ 239 240 #ifdef __STDC__ 241 #define VECTOR_END(x) \ 242 EXPORT(x ## End); \ 243 END(x) 244 #else 245 #define VECTOR_END(x) \ 246 EXPORT(x/**/End); \ 247 END(x) 248 #endif 249 250 /* 251 * Macros to panic and printf from assembly language. 252 */ 253 #define PANIC(msg) \ 254 PTR_LA a0, 9f; \ 255 jal _C_LABEL(panic); \ 256 nop; \ 257 MSG(msg) 258 259 #define PRINTF(msg) \ 260 PTR_LA a0, 9f; \ 261 jal _C_LABEL(printf); \ 262 nop; \ 263 MSG(msg) 264 265 #define MSG(msg) \ 266 .rdata; \ 267 9: .asciiz msg; \ 268 .text 269 270 #define ASMSTR(str) \ 271 .asciiz str; \ 272 .align 3 273 274 #define RCSID(name) .pushsection ".ident"; .asciz name; .popsection 275 276 /* 277 * XXX retain dialects XXX 278 */ 279 #define ALEAF(x) XLEAF(x) 280 #define NLEAF(x) LEAF_NOPROFILE(x) 281 #define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc) 282 #define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc) 283 284 #if defined(__mips_o32) 285 #define SZREG 4 286 #else 287 #define SZREG 8 288 #endif 289 290 #if defined(__mips_o32) || defined(__mips_o64) 291 #define ALSK 7 /* stack alignment */ 292 #define ALMASK -7 /* stack alignment */ 293 #define SZFPREG 4 294 #define FP_L lwc1 295 #define FP_S swc1 296 #else 297 #define ALSK 15 /* stack alignment */ 298 #define ALMASK -15 /* stack alignment */ 299 #define SZFPREG 8 300 #define FP_L ldc1 301 #define FP_S sdc1 302 #endif 303 304 /* 305 * standard callframe { 306 * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1) 307 * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64) 308 * register_t cf_gp; global pointer (only on n32 and n64) 309 * register_t cf_sp; frame pointer 310 * register_t cf_ra; return address 311 * }; 312 */ 313 #if defined(__mips_o32) || defined(__mips_o64) 314 #define CALLFRAME_SIZ (SZREG * (4 + 2)) 315 #define CALLFRAME_S0 0 316 #elif defined(__mips_n32) || defined(__mips_n64) 317 #define CALLFRAME_SIZ (SZREG * 4) 318 #define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG) 319 #endif 320 #ifndef _KERNEL 321 #define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG) 322 #endif 323 #define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) 324 #define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) 325 326 /* 327 * While it would be nice to be compatible with the SGI 328 * REG_L and REG_S macros, because they do not take parameters, it 329 * is impossible to use them with the _MIPS_SIM_ABIX32 model. 330 * 331 * These macros hide the use of mips3 instructions from the 332 * assembler to prevent the assembler from generating 64-bit style 333 * ABI calls. 334 */ 335 #if defined(__mips_o32) 336 #define PTR_ADD add 337 #define PTR_ADDI addi 338 #define PTR_ADDU addu 339 #define PTR_ADDIU addiu 340 #define PTR_SUB add 341 #define PTR_SUBI subi 342 #define PTR_SUBU subu 343 #define PTR_SUBIU subu 344 #define PTR_L lw 345 #define PTR_LA la 346 #define PTR_S sw 347 #define PTR_SLL sll 348 #define PTR_SLLV sllv 349 #define PTR_SRL srl 350 #define PTR_SRLV srlv 351 #define PTR_SRA sra 352 #define PTR_SRAV srav 353 #define PTR_LL ll 354 #define PTR_SC sc 355 #define PTR_WORD .word 356 #define PTR_SCALESHIFT 2 357 #endif /* __mips_o32 */ 358 359 #if defined(__mips_n32) 360 #define PTR_ADD add 361 #define PTR_ADDI addi 362 #define PTR_ADDU add /* no u */ 363 #define PTR_ADDIU addi /* no u */ 364 #define PTR_SUB sub 365 #define PTR_SUBI subi 366 #define PTR_SUBU sub /* no u */ 367 #define PTR_SUBIU sub /* no u */ 368 #define PTR_L lw 369 #define PTR_LA la 370 #define PTR_S sw 371 #define PTR_SLL sll 372 #define PTR_SLLV sllv 373 #define PTR_SRL srl 374 #define PTR_SRLV srlv 375 #define PTR_SRA sra 376 #define PTR_SRAV srav 377 #define PTR_LL ll 378 #define PTR_SC sc 379 #define PTR_WORD .word 380 #define PTR_SCALESHIFT 2 381 #endif /* __mips_n32 */ 382 383 #if defined(__mips_n64) || defined(__mips_o64) 384 #define PTR_ADD dadd 385 #define PTR_ADDI daddi 386 #define PTR_ADDU daddu 387 #define PTR_ADDIU daddiu 388 #define PTR_SUB dadd 389 #define PTR_SUBI dsubi 390 #define PTR_SUBU dsubu 391 #define PTR_SUBIU dsubu 392 #define PTR_L ld 393 #define PTR_LA dla 394 #define PTR_S sd 395 #define PTR_SLL dsll 396 #define PTR_SLLV dsllv 397 #define PTR_SRL dsrl 398 #define PTR_SRLV dsrlv 399 #define PTR_SRA dsra 400 #define PTR_SRAV dsrav 401 #define PTR_LL lld 402 #define PTR_SC scd 403 #define PTR_WORD .dword 404 #define PTR_SCALESHIFT 3 405 #endif /* __mips_n64 || __mips_o64 */ 406 407 #if _MIPS_SZINT == 32 408 #define INT_ADD add 409 #define INT_ADDI addi 410 #define INT_ADDU addu 411 #define INT_ADDIU addiu 412 #define INT_SUB add 413 #define INT_SUBI subi 414 #define INT_SUBU subu 415 #define INT_SUBIU subu 416 #define INT_L lw 417 #define INT_LA la 418 #define INT_S sw 419 #define INT_SLL sll 420 #define INT_SLLV sllv 421 #define INT_SRL srl 422 #define INT_SRLV srlv 423 #define INT_SRA sra 424 #define INT_SRAV srav 425 #define INT_LL ll 426 #define INT_SC sc 427 #define INT_WORD .word 428 #define INT_SCALESHIFT 2 429 #else 430 #define INT_ADD dadd 431 #define INT_ADDI daddi 432 #define INT_ADDU daddu 433 #define INT_ADDIU daddiu 434 #define INT_SUB dadd 435 #define INT_SUBI dsubi 436 #define INT_SUBU dsubu 437 #define INT_SUBIU dsubu 438 #define INT_L ld 439 #define INT_LA dla 440 #define INT_S sd 441 #define INT_SLL dsll 442 #define INT_SLLV dsllv 443 #define INT_SRL dsrl 444 #define INT_SRLV dsrlv 445 #define INT_SRA dsra 446 #define INT_SRAV dsrav 447 #define INT_LL lld 448 #define INT_SC scd 449 #define INT_WORD .dword 450 #define INT_SCALESHIFT 3 451 #endif 452 453 #if _MIPS_SZLONG == 32 454 #define LONG_ADD add 455 #define LONG_ADDI addi 456 #define LONG_ADDU addu 457 #define LONG_ADDIU addiu 458 #define LONG_SUB add 459 #define LONG_SUBI subi 460 #define LONG_SUBU subu 461 #define LONG_SUBIU subu 462 #define LONG_L lw 463 #define LONG_LA la 464 #define LONG_S sw 465 #define LONG_SLL sll 466 #define LONG_SLLV sllv 467 #define LONG_SRL srl 468 #define LONG_SRLV srlv 469 #define LONG_SRA sra 470 #define LONG_SRAV srav 471 #define LONG_LL ll 472 #define LONG_SC sc 473 #define LONG_WORD .word 474 #define LONG_SCALESHIFT 2 475 #else 476 #define LONG_ADD dadd 477 #define LONG_ADDI daddi 478 #define LONG_ADDU daddu 479 #define LONG_ADDIU daddiu 480 #define LONG_SUB dadd 481 #define LONG_SUBI dsubi 482 #define LONG_SUBU dsubu 483 #define LONG_SUBIU dsubu 484 #define LONG_L ld 485 #define LONG_LA dla 486 #define LONG_S sd 487 #define LONG_SLL dsll 488 #define LONG_SLLV dsllv 489 #define LONG_SRL dsrl 490 #define LONG_SRLV dsrlv 491 #define LONG_SRA dsra 492 #define LONG_SRAV dsrav 493 #define LONG_LL lld 494 #define LONG_SC scd 495 #define LONG_WORD .dword 496 #define LONG_SCALESHIFT 3 497 #endif 498 499 #if SZREG == 4 500 #define REG_L lw 501 #define REG_S sw 502 #define REG_LI li 503 #define REG_SLL sll 504 #define REG_SLLV sllv 505 #define REG_SRL srl 506 #define REG_SRLV srlv 507 #define REG_SRA sra 508 #define REG_SRAV srav 509 #define REG_SCALESHIFT 2 510 #else 511 #define REG_L ld 512 #define REG_S sd 513 #define REG_LI dli 514 #define REG_SLL dsll 515 #define REG_SLLV dsllv 516 #define REG_SRL dsrl 517 #define REG_SRLV dsrlv 518 #define REG_SRA dsra 519 #define REG_SRAV dsrav 520 #define REG_SCALESHIFT 3 521 #endif 522 523 #if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \ 524 _MIPS_ISA == _MIPS_ISA_MIPS32 525 #define MFC0 mfc0 526 #define MTC0 mtc0 527 #endif 528 #if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \ 529 _MIPS_ISA == _MIPS_ISA_MIPS64 530 #define MFC0 dmfc0 531 #define MTC0 dmtc0 532 #endif 533 534 #if defined(__mips_o32) || defined(__mips_o64) 535 536 #ifdef __ABICALLS__ 537 #define CPRESTORE(r) .cprestore r 538 #define CPLOAD(r) .cpload r 539 #else 540 #define CPRESTORE(r) /* not needed */ 541 #define CPLOAD(r) /* not needed */ 542 #endif 543 544 #define SETUP_GP \ 545 .set push; \ 546 .set noreorder; \ 547 .cpload t9; \ 548 .set pop 549 #define SETUP_GPX(r) \ 550 .set push; \ 551 .set noreorder; \ 552 move r,ra; /* save old ra */ \ 553 bal 7f; \ 554 nop; \ 555 7: .cpload ra; \ 556 move ra,r; \ 557 .set pop 558 #define SETUP_GPX_L(r,lbl) \ 559 .set push; \ 560 .set noreorder; \ 561 move r,ra; /* save old ra */ \ 562 bal lbl; \ 563 nop; \ 564 lbl: .cpload ra; \ 565 move ra,r; \ 566 .set pop 567 #define SAVE_GP(x) .cprestore x 568 569 #define SETUP_GP64(a,b) /* n32/n64 specific */ 570 #define SETUP_GP64_R(a,b) /* n32/n64 specific */ 571 #define SETUP_GPX64(a,b) /* n32/n64 specific */ 572 #define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */ 573 #define RESTORE_GP64 /* n32/n64 specific */ 574 #define USE_ALT_CP(a) /* n32/n64 specific */ 575 #endif /* __mips_o32 || __mips_o64 */ 576 577 #if defined(__mips_o32) || defined(__mips_o64) 578 #define REG_PROLOGUE .set push 579 #define REG_EPILOGUE .set pop 580 #endif 581 #if defined(__mips_n32) || defined(__mips_n64) 582 #define REG_PROLOGUE .set push ; .set mips3 583 #define REG_EPILOGUE .set pop 584 #endif 585 586 #if defined(__mips_n32) || defined(__mips_n64) 587 #define SETUP_GP /* o32 specific */ 588 #define SETUP_GPX(r) /* o32 specific */ 589 #define SETUP_GPX_L(r,lbl) /* o32 specific */ 590 #define SAVE_GP(x) /* o32 specific */ 591 #define SETUP_GP64(a,b) .cpsetup $25, a, b 592 #define SETUP_GPX64(a,b) \ 593 .set push; \ 594 move b,ra; \ 595 .set noreorder; \ 596 bal 7f; \ 597 nop; \ 598 7: .set pop; \ 599 .cpsetup ra, a, 7b; \ 600 move ra,b 601 #define SETUP_GPX64_L(a,b,c) \ 602 .set push; \ 603 move b,ra; \ 604 .set noreorder; \ 605 bal c; \ 606 nop; \ 607 c: .set pop; \ 608 .cpsetup ra, a, c; \ 609 move ra,b 610 #define RESTORE_GP64 .cpreturn 611 #define USE_ALT_CP(a) .cplocal a 612 #endif /* __mips_n32 || __mips_n64 */ 613 614 /* 615 * The DYNAMIC_STATUS_MASK option adds an additional masking operation 616 * when updating the hardware interrupt mask in the status register. 617 * 618 * This is useful for platforms that need to at run-time mask 619 * interrupts based on motherboard configuration or to handle 620 * slowly clearing interrupts. 621 * 622 * XXX this is only currently implemented for mips3. 623 */ 624 #ifdef MIPS_DYNAMIC_STATUS_MASK 625 #define DYNAMIC_STATUS_MASK(sr,scratch) \ 626 lw scratch, mips_dynamic_status_mask; \ 627 and sr, sr, scratch 628 629 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) \ 630 ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \ 631 DYNAMIC_STATUS_MASK(sr,scratch1) 632 #else 633 #define DYNAMIC_STATUS_MASK(sr,scratch) 634 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) 635 #endif 636 637 /* See lock_stubs.S. */ 638 #define MIPS_LOCK_RAS_SIZE 128 639 640 #define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off) 641 642 #endif /* _MIPS_ASM_H */ 643
Indexes created Wed Oct 01 19:09:53 GMT 2025