asm.h revision 1.43
1 /* $NetBSD: asm.h,v 1.43 2010/12/20 21:11:25 joerg Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93 35 */ 36 37 /* 38 * machAsmDefs.h -- 39 * 40 * Macros used when writing assembler programs. 41 * 42 * Copyright (C) 1989 Digital Equipment Corporation. 43 * Permission to use, copy, modify, and distribute this software and 44 * its documentation for any purpose and without fee is hereby granted, 45 * provided that the above copyright notice appears in all copies. 46 * Digital Equipment Corporation makes no representations about the 47 * suitability of this software for any purpose. It is provided "as is" 48 * without express or implied warranty. 49 * 50 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h, 51 * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) 52 */ 53 54 #ifndef _MIPS_ASM_H 55 #define _MIPS_ASM_H 56 57 #include <machine/cdefs.h> /* for API selection */ 58 #include <mips/regdef.h> 59 60 /* 61 * Define -pg profile entry code. 62 * Must always be noreorder, must never use a macro instruction 63 * Final addiu to t9 must always equal the size of this _KERN_MCOUNT 64 */ 65 #define _KERN_MCOUNT \ 66 .set push; \ 67 .set noreorder; \ 68 .set noat; \ 69 subu sp,sp,16; \ 70 sw t9,12(sp); \ 71 move AT,ra; \ 72 lui t9,%hi(_mcount); \ 73 addiu t9,t9,%lo(_mcount); \ 74 jalr t9; \ 75 nop; \ 76 lw t9,4(sp); \ 77 addiu sp,sp,8; \ 78 addiu t9,t9,40; \ 79 .set pop; 80 81 #ifdef GPROF 82 #define MCOUNT _KERN_MCOUNT 83 #else 84 #define MCOUNT 85 #endif 86 87 #ifdef __NO_LEADING_UNDERSCORES__ 88 # define _C_LABEL(x) x 89 #else 90 # ifdef __STDC__ 91 # define _C_LABEL(x) _ ## x 92 # else 93 # define _C_LABEL(x) _/**/x 94 # endif 95 #endif 96 97 #ifdef USE_AENT 98 #define AENT(x) \ 99 .aent x, 0 100 #else 101 #define AENT(x) 102 #endif 103 104 /* 105 * WEAK_ALIAS: create a weak alias. 106 */ 107 #define WEAK_ALIAS(alias,sym) \ 108 .weak alias; \ 109 alias = sym 110 /* 111 * STRONG_ALIAS: create a strong alias. 112 */ 113 #define STRONG_ALIAS(alias,sym) \ 114 .globl alias; \ 115 alias = sym 116 117 /* 118 * WARN_REFERENCES: create a warning if the specified symbol is referenced. 119 */ 120 #ifdef __STDC__ 121 #define WARN_REFERENCES(sym,msg) \ 122 .pushsection .gnu.warning. ## sym; \ 123 .ascii msg; \ 124 .popsection 125 #else 126 #define WARN_REFERENCES(sym,msg) \ 127 .pushsection .gnu.warning./**/sym; \ 128 .ascii msg; \ 129 .popsection 130 #endif /* __STDC__ */ 131 132 /* 133 * LEAF 134 * A leaf routine does 135 * - call no other function, 136 * - never use any register that callee-saved (S0-S8), and 137 * - not use any local stack storage. 138 */ 139 #define LEAF(x) \ 140 .globl _C_LABEL(x); \ 141 .ent _C_LABEL(x), 0; \ 142 _C_LABEL(x): ; \ 143 .frame sp, 0, ra; \ 144 MCOUNT 145 146 /* 147 * LEAF_NOPROFILE 148 * No profilable leaf routine. 149 */ 150 #define LEAF_NOPROFILE(x) \ 151 .globl _C_LABEL(x); \ 152 .ent _C_LABEL(x), 0; \ 153 _C_LABEL(x): ; \ 154 .frame sp, 0, ra 155 156 /* 157 * STATIC_LEAF 158 * Declare a local leaf function. 159 */ 160 #define STATIC_LEAF(x) \ 161 .ent _C_LABEL(x), 0; \ 162 _C_LABEL(x): ; \ 163 .frame sp, 0, ra; \ 164 MCOUNT 165 166 /* 167 * XLEAF 168 * declare alternate entry to leaf routine 169 */ 170 #define XLEAF(x) \ 171 .globl _C_LABEL(x); \ 172 AENT (_C_LABEL(x)); \ 173 _C_LABEL(x): 174 175 /* 176 * STATIC_XLEAF 177 * declare alternate entry to a static leaf routine 178 */ 179 #define STATIC_XLEAF(x) \ 180 AENT (_C_LABEL(x)); \ 181 _C_LABEL(x): 182 183 /* 184 * NESTED 185 * A function calls other functions and needs 186 * therefore stack space to save/restore registers. 187 */ 188 #define NESTED(x, fsize, retpc) \ 189 .globl _C_LABEL(x); \ 190 .ent _C_LABEL(x), 0; \ 191 _C_LABEL(x): ; \ 192 .frame sp, fsize, retpc; \ 193 MCOUNT 194 195 /* 196 * NESTED_NOPROFILE(x) 197 * No profilable nested routine. 198 */ 199 #define NESTED_NOPROFILE(x, fsize, retpc) \ 200 .globl _C_LABEL(x); \ 201 .ent _C_LABEL(x), 0; \ 202 _C_LABEL(x): ; \ 203 .frame sp, fsize, retpc 204 205 /* 206 * XNESTED 207 * declare alternate entry point to nested routine. 208 */ 209 #define XNESTED(x) \ 210 .globl _C_LABEL(x); \ 211 AENT (_C_LABEL(x)); \ 212 _C_LABEL(x): 213 214 /* 215 * END 216 * Mark end of a procedure. 217 */ 218 #define END(x) \ 219 .end _C_LABEL(x); \ 220 .size _C_LABEL(x), . - _C_LABEL(x) 221 222 /* 223 * IMPORT -- import external symbol 224 */ 225 #define IMPORT(sym, size) \ 226 .extern _C_LABEL(sym),size 227 228 /* 229 * EXPORT -- export definition of symbol 230 */ 231 #define EXPORT(x) \ 232 .globl _C_LABEL(x); \ 233 _C_LABEL(x): 234 235 /* 236 * VECTOR 237 * exception vector entrypoint 238 * XXX: regmask should be used to generate .mask 239 */ 240 #define VECTOR(x, regmask) \ 241 .ent _C_LABEL(x),0; \ 242 EXPORT(x); \ 243 244 #ifdef __STDC__ 245 #define VECTOR_END(x) \ 246 EXPORT(x ## End); \ 247 END(x) 248 #else 249 #define VECTOR_END(x) \ 250 EXPORT(x/**/End); \ 251 END(x) 252 #endif 253 254 /* 255 * Macros to panic and printf from assembly language. 256 */ 257 #define PANIC(msg) \ 258 PTR_LA a0, 9f; \ 259 jal _C_LABEL(panic); \ 260 nop; \ 261 MSG(msg) 262 263 #define PRINTF(msg) \ 264 PTR_LA a0, 9f; \ 265 jal _C_LABEL(printf); \ 266 nop; \ 267 MSG(msg) 268 269 #define MSG(msg) \ 270 .rdata; \ 271 9: .asciiz msg; \ 272 .text 273 274 #define ASMSTR(str) \ 275 .asciiz str; \ 276 .align 3 277 278 #define RCSID(name) .pushsection ".ident"; .asciz name; .popsection 279 280 /* 281 * XXX retain dialects XXX 282 */ 283 #define ALEAF(x) XLEAF(x) 284 #define NLEAF(x) LEAF_NOPROFILE(x) 285 #define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc) 286 #define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc) 287 288 #if defined(__mips_o32) 289 #define SZREG 4 290 #else 291 #define SZREG 8 292 #endif 293 294 #if defined(__mips_o32) || defined(__mips_o64) 295 #define ALSK 7 /* stack alignment */ 296 #define ALMASK -7 /* stack alignment */ 297 #define SZFPREG 4 298 #define FP_L lwc1 299 #define FP_S swc1 300 #else 301 #define ALSK 15 /* stack alignment */ 302 #define ALMASK -15 /* stack alignment */ 303 #define SZFPREG 8 304 #define FP_L ldc1 305 #define FP_S sdc1 306 #endif 307 308 /* 309 * standard callframe { 310 * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1) 311 * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64) 312 * register_t cf_gp; global pointer (only on n32 and n64) 313 * register_t cf_sp; frame pointer 314 * register_t cf_ra; return address 315 * }; 316 */ 317 #if defined(__mips_o32) || defined(__mips_o64) 318 #define CALLFRAME_SIZ (SZREG * (4 + 2)) 319 #define CALLFRAME_S0 0 320 #elif defined(__mips_n32) || defined(__mips_n64) 321 #define CALLFRAME_SIZ (SZREG * 4) 322 #define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG) 323 #endif 324 #ifndef _KERNEL 325 #define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG) 326 #endif 327 #define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) 328 #define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) 329 330 /* 331 * While it would be nice to be compatible with the SGI 332 * REG_L and REG_S macros, because they do not take parameters, it 333 * is impossible to use them with the _MIPS_SIM_ABIX32 model. 334 * 335 * These macros hide the use of mips3 instructions from the 336 * assembler to prevent the assembler from generating 64-bit style 337 * ABI calls. 338 */ 339 #if _MIPS_SZPTR == 32 340 #define PTR_ADD add 341 #define PTR_ADDI addi 342 #define PTR_ADDU addu 343 #define PTR_ADDIU addiu 344 #define PTR_SUB add 345 #define PTR_SUBI subi 346 #define PTR_SUBU subu 347 #define PTR_SUBIU subu 348 #define PTR_L lw 349 #define PTR_LA la 350 #define PTR_S sw 351 #define PTR_SLL sll 352 #define PTR_SLLV sllv 353 #define PTR_SRL srl 354 #define PTR_SRLV srlv 355 #define PTR_SRA sra 356 #define PTR_SRAV srav 357 #define PTR_LL ll 358 #define PTR_SC sc 359 #define PTR_WORD .word 360 #define PTR_SCALESHIFT 2 361 #else /* _MIPS_SZPTR == 64 */ 362 #define PTR_ADD dadd 363 #define PTR_ADDI daddi 364 #define PTR_ADDU daddu 365 #define PTR_ADDIU daddiu 366 #define PTR_SUB dadd 367 #define PTR_SUBI dsubi 368 #define PTR_SUBU dsubu 369 #define PTR_SUBIU dsubu 370 #define PTR_L ld 371 #define PTR_LA dla 372 #define PTR_S sd 373 #define PTR_SLL dsll 374 #define PTR_SLLV dsllv 375 #define PTR_SRL dsrl 376 #define PTR_SRLV dsrlv 377 #define PTR_SRA dsra 378 #define PTR_SRAV dsrav 379 #define PTR_LL lld 380 #define PTR_SC scd 381 #define PTR_WORD .dword 382 #define PTR_SCALESHIFT 3 383 #endif /* _MIPS_SZPTR == 64 */ 384 385 #if _MIPS_SZINT == 32 386 #define INT_ADD add 387 #define INT_ADDI addi 388 #define INT_ADDU addu 389 #define INT_ADDIU addiu 390 #define INT_SUB add 391 #define INT_SUBI subi 392 #define INT_SUBU subu 393 #define INT_SUBIU subu 394 #define INT_L lw 395 #define INT_LA la 396 #define INT_S sw 397 #define INT_SLL sll 398 #define INT_SLLV sllv 399 #define INT_SRL srl 400 #define INT_SRLV srlv 401 #define INT_SRA sra 402 #define INT_SRAV srav 403 #define INT_LL ll 404 #define INT_SC sc 405 #define INT_WORD .word 406 #define INT_SCALESHIFT 2 407 #else 408 #define INT_ADD dadd 409 #define INT_ADDI daddi 410 #define INT_ADDU daddu 411 #define INT_ADDIU daddiu 412 #define INT_SUB dadd 413 #define INT_SUBI dsubi 414 #define INT_SUBU dsubu 415 #define INT_SUBIU dsubu 416 #define INT_L ld 417 #define INT_LA dla 418 #define INT_S sd 419 #define INT_SLL dsll 420 #define INT_SLLV dsllv 421 #define INT_SRL dsrl 422 #define INT_SRLV dsrlv 423 #define INT_SRA dsra 424 #define INT_SRAV dsrav 425 #define INT_LL lld 426 #define INT_SC scd 427 #define INT_WORD .dword 428 #define INT_SCALESHIFT 3 429 #endif 430 431 #if _MIPS_SZLONG == 32 432 #define LONG_ADD add 433 #define LONG_ADDI addi 434 #define LONG_ADDU addu 435 #define LONG_ADDIU addiu 436 #define LONG_SUB add 437 #define LONG_SUBI subi 438 #define LONG_SUBU subu 439 #define LONG_SUBIU subu 440 #define LONG_L lw 441 #define LONG_LA la 442 #define LONG_S sw 443 #define LONG_SLL sll 444 #define LONG_SLLV sllv 445 #define LONG_SRL srl 446 #define LONG_SRLV srlv 447 #define LONG_SRA sra 448 #define LONG_SRAV srav 449 #define LONG_LL ll 450 #define LONG_SC sc 451 #define LONG_WORD .word 452 #define LONG_SCALESHIFT 2 453 #else 454 #define LONG_ADD dadd 455 #define LONG_ADDI daddi 456 #define LONG_ADDU daddu 457 #define LONG_ADDIU daddiu 458 #define LONG_SUB dadd 459 #define LONG_SUBI dsubi 460 #define LONG_SUBU dsubu 461 #define LONG_SUBIU dsubu 462 #define LONG_L ld 463 #define LONG_LA dla 464 #define LONG_S sd 465 #define LONG_SLL dsll 466 #define LONG_SLLV dsllv 467 #define LONG_SRL dsrl 468 #define LONG_SRLV dsrlv 469 #define LONG_SRA dsra 470 #define LONG_SRAV dsrav 471 #define LONG_LL lld 472 #define LONG_SC scd 473 #define LONG_WORD .dword 474 #define LONG_SCALESHIFT 3 475 #endif 476 477 #if SZREG == 4 478 #define REG_L lw 479 #define REG_S sw 480 #define REG_LI li 481 #define REG_ADDU addu 482 #define REG_SLL sll 483 #define REG_SLLV sllv 484 #define REG_SRL srl 485 #define REG_SRLV srlv 486 #define REG_SRA sra 487 #define REG_SRAV srav 488 #define REG_LL ll 489 #define REG_SC sc 490 #define REG_SCALESHIFT 2 491 #else 492 #define REG_L ld 493 #define REG_S sd 494 #define REG_LI dli 495 #define REG_ADDU daddu 496 #define REG_SLL dsll 497 #define REG_SLLV dsllv 498 #define REG_SRL dsrl 499 #define REG_SRLV dsrlv 500 #define REG_SRA dsra 501 #define REG_SRAV dsrav 502 #define REG_LL lld 503 #define REG_SC scd 504 #define REG_SCALESHIFT 3 505 #endif 506 507 #if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \ 508 _MIPS_ISA == _MIPS_ISA_MIPS32 509 #define MFC0 mfc0 510 #define MTC0 mtc0 511 #endif 512 #if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \ 513 _MIPS_ISA == _MIPS_ISA_MIPS64 514 #define MFC0 dmfc0 515 #define MTC0 dmtc0 516 #endif 517 518 #if defined(__mips_o32) || defined(__mips_o64) 519 520 #ifdef __ABICALLS__ 521 #define CPRESTORE(r) .cprestore r 522 #define CPLOAD(r) .cpload r 523 #else 524 #define CPRESTORE(r) /* not needed */ 525 #define CPLOAD(r) /* not needed */ 526 #endif 527 528 #define SETUP_GP \ 529 .set push; \ 530 .set noreorder; \ 531 .cpload t9; \ 532 .set pop 533 #define SETUP_GPX(r) \ 534 .set push; \ 535 .set noreorder; \ 536 move r,ra; /* save old ra */ \ 537 bal 7f; \ 538 nop; \ 539 7: .cpload ra; \ 540 move ra,r; \ 541 .set pop 542 #define SETUP_GPX_L(r,lbl) \ 543 .set push; \ 544 .set noreorder; \ 545 move r,ra; /* save old ra */ \ 546 bal lbl; \ 547 nop; \ 548 lbl: .cpload ra; \ 549 move ra,r; \ 550 .set pop 551 #define SAVE_GP(x) .cprestore x 552 553 #define SETUP_GP64(a,b) /* n32/n64 specific */ 554 #define SETUP_GP64_R(a,b) /* n32/n64 specific */ 555 #define SETUP_GPX64(a,b) /* n32/n64 specific */ 556 #define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */ 557 #define RESTORE_GP64 /* n32/n64 specific */ 558 #define USE_ALT_CP(a) /* n32/n64 specific */ 559 #endif /* __mips_o32 || __mips_o64 */ 560 561 #if defined(__mips_o32) || defined(__mips_o64) 562 #define REG_PROLOGUE .set push 563 #define REG_EPILOGUE .set pop 564 #endif 565 #if defined(__mips_n32) || defined(__mips_n64) 566 #define REG_PROLOGUE .set push ; .set mips3 567 #define REG_EPILOGUE .set pop 568 #endif 569 570 #if defined(__mips_n32) || defined(__mips_n64) 571 #define SETUP_GP /* o32 specific */ 572 #define SETUP_GPX(r) /* o32 specific */ 573 #define SETUP_GPX_L(r,lbl) /* o32 specific */ 574 #define SAVE_GP(x) /* o32 specific */ 575 #define SETUP_GP64(a,b) .cpsetup $25, a, b 576 #define SETUP_GPX64(a,b) \ 577 .set push; \ 578 move b,ra; \ 579 .set noreorder; \ 580 bal 7f; \ 581 nop; \ 582 7: .set pop; \ 583 .cpsetup ra, a, 7b; \ 584 move ra,b 585 #define SETUP_GPX64_L(a,b,c) \ 586 .set push; \ 587 move b,ra; \ 588 .set noreorder; \ 589 bal c; \ 590 nop; \ 591 c: .set pop; \ 592 .cpsetup ra, a, c; \ 593 move ra,b 594 #define RESTORE_GP64 .cpreturn 595 #define USE_ALT_CP(a) .cplocal a 596 #endif /* __mips_n32 || __mips_n64 */ 597 598 /* 599 * The DYNAMIC_STATUS_MASK option adds an additional masking operation 600 * when updating the hardware interrupt mask in the status register. 601 * 602 * This is useful for platforms that need to at run-time mask 603 * interrupts based on motherboard configuration or to handle 604 * slowly clearing interrupts. 605 * 606 * XXX this is only currently implemented for mips3. 607 */ 608 #ifdef MIPS_DYNAMIC_STATUS_MASK 609 #define DYNAMIC_STATUS_MASK(sr,scratch) \ 610 lw scratch, mips_dynamic_status_mask; \ 611 and sr, sr, scratch 612 613 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) \ 614 ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \ 615 DYNAMIC_STATUS_MASK(sr,scratch1) 616 #else 617 #define DYNAMIC_STATUS_MASK(sr,scratch) 618 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) 619 #endif 620 621 /* See lock_stubs.S. */ 622 #define MIPS_LOCK_RAS_SIZE 256 623 624 #define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off) 625 626 #endif /* _MIPS_ASM_H */ 627
Indexes created Tue Sep 23 14:10:03 GMT 2025