asm.h revision 1.45
1 /* $NetBSD: asm.h,v 1.45 2011/07/01 06:00:20 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93 35 */ 36 37 /* 38 * machAsmDefs.h -- 39 * 40 * Macros used when writing assembler programs. 41 * 42 * Copyright (C) 1989 Digital Equipment Corporation. 43 * Permission to use, copy, modify, and distribute this software and 44 * its documentation for any purpose and without fee is hereby granted, 45 * provided that the above copyright notice appears in all copies. 46 * Digital Equipment Corporation makes no representations about the 47 * suitability of this software for any purpose. It is provided "as is" 48 * without express or implied warranty. 49 * 50 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h, 51 * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) 52 */ 53 54 #ifndef _MIPS_ASM_H 55 #define _MIPS_ASM_H 56 57 #include <sys/cdefs.h> /* for API selection */ 58 #include <mips/regdef.h> 59 60 /* 61 * Define -pg profile entry code. 62 * Must always be noreorder, must never use a macro instruction 63 * Final addiu to t9 must always equal the size of this _KERN_MCOUNT 64 */ 65 #define _KERN_MCOUNT \ 66 .set push; \ 67 .set noreorder; \ 68 .set noat; \ 69 subu sp,sp,16; \ 70 sw t9,12(sp); \ 71 move AT,ra; \ 72 lui t9,%hi(_mcount); \ 73 addiu t9,t9,%lo(_mcount); \ 74 jalr t9; \ 75 nop; \ 76 lw t9,4(sp); \ 77 addiu sp,sp,8; \ 78 addiu t9,t9,40; \ 79 .set pop; 80 81 #ifdef GPROF 82 #define MCOUNT _KERN_MCOUNT 83 #else 84 #define MCOUNT 85 #endif 86 87 #ifdef __NO_LEADING_UNDERSCORES__ 88 # define _C_LABEL(x) x 89 #else 90 # define _C_LABEL(x) __CONCAT(_,x) 91 #endif 92 93 #ifdef USE_AENT 94 #define AENT(x) \ 95 .aent x, 0 96 #else 97 #define AENT(x) 98 #endif 99 100 /* 101 * WEAK_ALIAS: create a weak alias. 102 */ 103 #define WEAK_ALIAS(alias,sym) \ 104 .weak alias; \ 105 alias = sym 106 /* 107 * STRONG_ALIAS: create a strong alias. 108 */ 109 #define STRONG_ALIAS(alias,sym) \ 110 .globl alias; \ 111 alias = sym 112 113 /* 114 * WARN_REFERENCES: create a warning if the specified symbol is referenced. 115 */ 116 #define WARN_REFERENCES(sym,msg) \ 117 .pushsection __CONCAT(.gnu.warning.,sym); \ 118 .ascii msg; \ 119 .popsection 120 121 /* 122 * STATIC_LEAF_NOPROFILE 123 * No profilable local leaf routine. 124 */ 125 #define STATIC_LEAF_NOPROFILE(x) \ 126 .ent _C_LABEL(x), 0; \ 127 _C_LABEL(x): ; \ 128 .frame sp, 0, ra 129 130 /* 131 * LEAF_NOPROFILE 132 * No profilable leaf routine. 133 */ 134 #define LEAF_NOPROFILE(x) \ 135 .globl _C_LABEL(x); \ 136 STATIC_LEAF_NOPROFILE(x) 137 138 /* 139 * STATIC_LEAF 140 * Declare a local leaf function. 141 */ 142 #define STATIC_LEAF(x) \ 143 STATIC_LEAF_NOPROFILE(x); \ 144 MCOUNT 145 146 /* 147 * LEAF 148 * A leaf routine does 149 * - call no other function, 150 * - never use any register that callee-saved (S0-S8), and 151 * - not use any local stack storage. 152 */ 153 #define LEAF(x) \ 154 LEAF_NOPROFILE(x); \ 155 MCOUNT 156 157 /* 158 * STATIC_XLEAF 159 * declare alternate entry to a static leaf routine 160 */ 161 #define STATIC_XLEAF(x) \ 162 AENT (_C_LABEL(x)); \ 163 _C_LABEL(x): 164 165 /* 166 * XLEAF 167 * declare alternate entry to leaf routine 168 */ 169 #define XLEAF(x) \ 170 .globl _C_LABEL(x); \ 171 STATIC_XLEAF(x) 172 173 /* 174 * STATIC_NESTED_NOPROFILE 175 * No profilable local nested routine. 176 */ 177 #define STATIC_NESTED_NOPROFILE(x, fsize, retpc) \ 178 .ent _C_LABEL(x), 0; \ 179 _C_LABEL(x): ; \ 180 .frame sp, fsize, retpc 181 182 /* 183 * NESTED_NOPROFILE 184 * No profilable nested routine. 185 */ 186 #define NESTED_NOPROFILE(x, fsize, retpc) \ 187 .globl _C_LABEL(x); \ 188 STATIC_NESTED_NOPROFILE(x, fsize, retpc) 189 190 /* 191 * NESTED 192 * A function calls other functions and needs 193 * therefore stack space to save/restore registers. 194 */ 195 #define NESTED(x, fsize, retpc) \ 196 NESTED_NOPROFILE(x, fsize, retpc); \ 197 MCOUNT 198 199 /* 200 * STATIC_NESTED 201 * No profilable local nested routine. 202 */ 203 #define STATIC_NESTED(x, fsize, retpc) \ 204 STATIC_NESTED_NOPROFILE(x, fsize, retpc); \ 205 MCOUNT 206 207 /* 208 * XNESTED 209 * declare alternate entry point to nested routine. 210 */ 211 #define XNESTED(x) \ 212 .globl _C_LABEL(x); \ 213 AENT (_C_LABEL(x)); \ 214 _C_LABEL(x): 215 216 /* 217 * END 218 * Mark end of a procedure. 219 */ 220 #define END(x) \ 221 .end _C_LABEL(x); \ 222 .size _C_LABEL(x), . - _C_LABEL(x) 223 224 /* 225 * IMPORT -- import external symbol 226 */ 227 #define IMPORT(sym, size) \ 228 .extern _C_LABEL(sym),size 229 230 /* 231 * EXPORT -- export definition of symbol 232 */ 233 #define EXPORT(x) \ 234 .globl _C_LABEL(x); \ 235 _C_LABEL(x): 236 237 /* 238 * VECTOR 239 * exception vector entrypoint 240 * XXX: regmask should be used to generate .mask 241 */ 242 #define VECTOR(x, regmask) \ 243 .ent _C_LABEL(x),0; \ 244 EXPORT(x); \ 245 246 #define VECTOR_END(x) \ 247 EXPORT(__CONCAT(x,_end)); \ 248 END(x); \ 249 .org _C_LABEL(x) + 0x80 250 251 /* 252 * Macros to panic and printf from assembly language. 253 */ 254 #define PANIC(msg) \ 255 PTR_LA a0, 9f; \ 256 jal _C_LABEL(panic); \ 257 nop; \ 258 MSG(msg) 259 260 #define PRINTF(msg) \ 261 PTR_LA a0, 9f; \ 262 jal _C_LABEL(printf); \ 263 nop; \ 264 MSG(msg) 265 266 #define MSG(msg) \ 267 .rdata; \ 268 9: .asciiz msg; \ 269 .text 270 271 #define ASMSTR(str) \ 272 .asciiz str; \ 273 .align 3 274 275 #define RCSID(name) .pushsection ".ident"; .asciz name; .popsection 276 277 /* 278 * XXX retain dialects XXX 279 */ 280 #define ALEAF(x) XLEAF(x) 281 #define NLEAF(x) LEAF_NOPROFILE(x) 282 #define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc) 283 #define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc) 284 285 #if defined(__mips_o32) 286 #define SZREG 4 287 #else 288 #define SZREG 8 289 #endif 290 291 #if defined(__mips_o32) || defined(__mips_o64) 292 #define ALSK 7 /* stack alignment */ 293 #define ALMASK -7 /* stack alignment */ 294 #define SZFPREG 4 295 #define FP_L lwc1 296 #define FP_S swc1 297 #else 298 #define ALSK 15 /* stack alignment */ 299 #define ALMASK -15 /* stack alignment */ 300 #define SZFPREG 8 301 #define FP_L ldc1 302 #define FP_S sdc1 303 #endif 304 305 /* 306 * standard callframe { 307 * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64) 308 * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1) 309 * register_t cf_gp; global pointer (only on n32 and n64) 310 * register_t cf_sp; frame pointer 311 * register_t cf_ra; return address 312 * }; 313 */ 314 #if defined(__mips_o32) || defined(__mips_o64) 315 #define CALLFRAME_SIZ (SZREG * (4 + 2)) 316 #define CALLFRAME_S0 0 317 #elif defined(__mips_n32) || defined(__mips_n64) 318 #define CALLFRAME_SIZ (SZREG * 4) 319 #define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG) 320 #endif 321 #ifndef _KERNEL 322 #define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG) 323 #endif 324 #define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) 325 #define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) 326 327 /* 328 * While it would be nice to be compatible with the SGI 329 * REG_L and REG_S macros, because they do not take parameters, it 330 * is impossible to use them with the _MIPS_SIM_ABIX32 model. 331 * 332 * These macros hide the use of mips3 instructions from the 333 * assembler to prevent the assembler from generating 64-bit style 334 * ABI calls. 335 */ 336 #if _MIPS_SZPTR == 32 337 #define PTR_ADD add 338 #define PTR_ADDI addi 339 #define PTR_ADDU addu 340 #define PTR_ADDIU addiu 341 #define PTR_SUB subu 342 #define PTR_SUBI subi 343 #define PTR_SUBU subu 344 #define PTR_SUBIU subu 345 #define PTR_L lw 346 #define PTR_LA la 347 #define PTR_S sw 348 #define PTR_SLL sll 349 #define PTR_SLLV sllv 350 #define PTR_SRL srl 351 #define PTR_SRLV srlv 352 #define PTR_SRA sra 353 #define PTR_SRAV srav 354 #define PTR_LL ll 355 #define PTR_SC sc 356 #define PTR_WORD .word 357 #define PTR_SCALESHIFT 2 358 #else /* _MIPS_SZPTR == 64 */ 359 #define PTR_ADD dadd 360 #define PTR_ADDI daddi 361 #define PTR_ADDU daddu 362 #define PTR_ADDIU daddiu 363 #define PTR_SUB dsubu 364 #define PTR_SUBI dsubi 365 #define PTR_SUBU dsubu 366 #define PTR_SUBIU dsubu 367 #define PTR_L ld 368 #define PTR_LA dla 369 #define PTR_S sd 370 #define PTR_SLL dsll 371 #define PTR_SLLV dsllv 372 #define PTR_SRL dsrl 373 #define PTR_SRLV dsrlv 374 #define PTR_SRA dsra 375 #define PTR_SRAV dsrav 376 #define PTR_LL lld 377 #define PTR_SC scd 378 #define PTR_WORD .dword 379 #define PTR_SCALESHIFT 3 380 #endif /* _MIPS_SZPTR == 64 */ 381 382 #if _MIPS_SZINT == 32 383 #define INT_ADD add 384 #define INT_ADDI addi 385 #define INT_ADDU addu 386 #define INT_ADDIU addiu 387 #define INT_SUB subu 388 #define INT_SUBI subi 389 #define INT_SUBU subu 390 #define INT_SUBIU subu 391 #define INT_L lw 392 #define INT_LA la 393 #define INT_S sw 394 #define INT_SLL sll 395 #define INT_SLLV sllv 396 #define INT_SRL srl 397 #define INT_SRLV srlv 398 #define INT_SRA sra 399 #define INT_SRAV srav 400 #define INT_LL ll 401 #define INT_SC sc 402 #define INT_WORD .word 403 #define INT_SCALESHIFT 2 404 #else 405 #define INT_ADD dadd 406 #define INT_ADDI daddi 407 #define INT_ADDU daddu 408 #define INT_ADDIU daddiu 409 #define INT_SUB dsubu 410 #define INT_SUBI dsubi 411 #define INT_SUBU dsubu 412 #define INT_SUBIU dsubu 413 #define INT_L ld 414 #define INT_LA dla 415 #define INT_S sd 416 #define INT_SLL dsll 417 #define INT_SLLV dsllv 418 #define INT_SRL dsrl 419 #define INT_SRLV dsrlv 420 #define INT_SRA dsra 421 #define INT_SRAV dsrav 422 #define INT_LL lld 423 #define INT_SC scd 424 #define INT_WORD .dword 425 #define INT_SCALESHIFT 3 426 #endif 427 428 #if _MIPS_SZLONG == 32 429 #define LONG_ADD add 430 #define LONG_ADDI addi 431 #define LONG_ADDU addu 432 #define LONG_ADDIU addiu 433 #define LONG_SUB subu 434 #define LONG_SUBI subi 435 #define LONG_SUBU subu 436 #define LONG_SUBIU subu 437 #define LONG_L lw 438 #define LONG_LA la 439 #define LONG_S sw 440 #define LONG_SLL sll 441 #define LONG_SLLV sllv 442 #define LONG_SRL srl 443 #define LONG_SRLV srlv 444 #define LONG_SRA sra 445 #define LONG_SRAV srav 446 #define LONG_LL ll 447 #define LONG_SC sc 448 #define LONG_WORD .word 449 #define LONG_SCALESHIFT 2 450 #else 451 #define LONG_ADD dadd 452 #define LONG_ADDI daddi 453 #define LONG_ADDU daddu 454 #define LONG_ADDIU daddiu 455 #define LONG_SUB dsubu 456 #define LONG_SUBI dsubi 457 #define LONG_SUBU dsubu 458 #define LONG_SUBIU dsubu 459 #define LONG_L ld 460 #define LONG_LA dla 461 #define LONG_S sd 462 #define LONG_SLL dsll 463 #define LONG_SLLV dsllv 464 #define LONG_SRL dsrl 465 #define LONG_SRLV dsrlv 466 #define LONG_SRA dsra 467 #define LONG_SRAV dsrav 468 #define LONG_LL lld 469 #define LONG_SC scd 470 #define LONG_WORD .dword 471 #define LONG_SCALESHIFT 3 472 #endif 473 474 #if SZREG == 4 475 #define REG_L lw 476 #define REG_S sw 477 #define REG_LI li 478 #define REG_ADDU addu 479 #define REG_SLL sll 480 #define REG_SLLV sllv 481 #define REG_SRL srl 482 #define REG_SRLV srlv 483 #define REG_SRA sra 484 #define REG_SRAV srav 485 #define REG_LL ll 486 #define REG_SC sc 487 #define REG_SCALESHIFT 2 488 #else 489 #define REG_L ld 490 #define REG_S sd 491 #define REG_LI dli 492 #define REG_ADDU daddu 493 #define REG_SLL dsll 494 #define REG_SLLV dsllv 495 #define REG_SRL dsrl 496 #define REG_SRLV dsrlv 497 #define REG_SRA dsra 498 #define REG_SRAV dsrav 499 #define REG_LL lld 500 #define REG_SC scd 501 #define REG_SCALESHIFT 3 502 #endif 503 504 #if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \ 505 _MIPS_ISA == _MIPS_ISA_MIPS32 506 #define MFC0 mfc0 507 #define MTC0 mtc0 508 #endif 509 #if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \ 510 _MIPS_ISA == _MIPS_ISA_MIPS64 511 #define MFC0 dmfc0 512 #define MTC0 dmtc0 513 #endif 514 515 #if defined(__mips_o32) || defined(__mips_o64) 516 517 #ifdef __ABICALLS__ 518 #define CPRESTORE(r) .cprestore r 519 #define CPLOAD(r) .cpload r 520 #else 521 #define CPRESTORE(r) /* not needed */ 522 #define CPLOAD(r) /* not needed */ 523 #endif 524 525 #define SETUP_GP \ 526 .set push; \ 527 .set noreorder; \ 528 .cpload t9; \ 529 .set pop 530 #define SETUP_GPX(r) \ 531 .set push; \ 532 .set noreorder; \ 533 move r,ra; /* save old ra */ \ 534 bal 7f; \ 535 nop; \ 536 7: .cpload ra; \ 537 move ra,r; \ 538 .set pop 539 #define SETUP_GPX_L(r,lbl) \ 540 .set push; \ 541 .set noreorder; \ 542 move r,ra; /* save old ra */ \ 543 bal lbl; \ 544 nop; \ 545 lbl: .cpload ra; \ 546 move ra,r; \ 547 .set pop 548 #define SAVE_GP(x) .cprestore x 549 550 #define SETUP_GP64(a,b) /* n32/n64 specific */ 551 #define SETUP_GP64_R(a,b) /* n32/n64 specific */ 552 #define SETUP_GPX64(a,b) /* n32/n64 specific */ 553 #define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */ 554 #define RESTORE_GP64 /* n32/n64 specific */ 555 #define USE_ALT_CP(a) /* n32/n64 specific */ 556 #endif /* __mips_o32 || __mips_o64 */ 557 558 #if defined(__mips_o32) || defined(__mips_o64) 559 #define REG_PROLOGUE .set push 560 #define REG_EPILOGUE .set pop 561 #endif 562 #if defined(__mips_n32) || defined(__mips_n64) 563 #define REG_PROLOGUE .set push ; .set mips3 564 #define REG_EPILOGUE .set pop 565 #endif 566 567 #if defined(__mips_n32) || defined(__mips_n64) 568 #define SETUP_GP /* o32 specific */ 569 #define SETUP_GPX(r) /* o32 specific */ 570 #define SETUP_GPX_L(r,lbl) /* o32 specific */ 571 #define SAVE_GP(x) /* o32 specific */ 572 #define SETUP_GP64(a,b) .cpsetup $25, a, b 573 #define SETUP_GPX64(a,b) \ 574 .set push; \ 575 move b,ra; \ 576 .set noreorder; \ 577 bal 7f; \ 578 nop; \ 579 7: .set pop; \ 580 .cpsetup ra, a, 7b; \ 581 move ra,b 582 #define SETUP_GPX64_L(a,b,c) \ 583 .set push; \ 584 move b,ra; \ 585 .set noreorder; \ 586 bal c; \ 587 nop; \ 588 c: .set pop; \ 589 .cpsetup ra, a, c; \ 590 move ra,b 591 #define RESTORE_GP64 .cpreturn 592 #define USE_ALT_CP(a) .cplocal a 593 #endif /* __mips_n32 || __mips_n64 */ 594 595 /* 596 * The DYNAMIC_STATUS_MASK option adds an additional masking operation 597 * when updating the hardware interrupt mask in the status register. 598 * 599 * This is useful for platforms that need to at run-time mask 600 * interrupts based on motherboard configuration or to handle 601 * slowly clearing interrupts. 602 * 603 * XXX this is only currently implemented for mips3. 604 */ 605 #ifdef MIPS_DYNAMIC_STATUS_MASK 606 #define DYNAMIC_STATUS_MASK(sr,scratch) \ 607 lw scratch, mips_dynamic_status_mask; \ 608 and sr, sr, scratch 609 610 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) \ 611 ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \ 612 DYNAMIC_STATUS_MASK(sr,scratch1) 613 #else 614 #define DYNAMIC_STATUS_MASK(sr,scratch) 615 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) 616 #endif 617 618 /* See lock_stubs.S. */ 619 #define LOG2_MIPS_LOCK_RAS_SIZE 8 620 #define MIPS_LOCK_RAS_SIZE 256 /* 16 bytes left over */ 621 622 #define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off) 623 624 #endif /* _MIPS_ASM_H */ 625
Indexes created Mon Sep 22 13:09:51 GMT 2025