asm.h revision 1.48.2.2
1 /* $NetBSD: asm.h,v 1.48.2.2 2016/12/05 10:54:55 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93 35 */ 36 37 /* 38 * machAsmDefs.h -- 39 * 40 * Macros used when writing assembler programs. 41 * 42 * Copyright (C) 1989 Digital Equipment Corporation. 43 * Permission to use, copy, modify, and distribute this software and 44 * its documentation for any purpose and without fee is hereby granted, 45 * provided that the above copyright notice appears in all copies. 46 * Digital Equipment Corporation makes no representations about the 47 * suitability of this software for any purpose. It is provided "as is" 48 * without express or implied warranty. 49 * 50 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h, 51 * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) 52 */ 53 54 #ifndef _MIPS_ASM_H 55 #define _MIPS_ASM_H 56 57 #include <sys/cdefs.h> /* for API selection */ 58 #include <mips/regdef.h> 59 60 /* 61 * Define -pg profile entry code. 62 * Must always be noreorder, must never use a macro instruction 63 * Final addiu to t9 must always equal the size of this _KERN_MCOUNT 64 */ 65 #define _KERN_MCOUNT \ 66 .set push; \ 67 .set noreorder; \ 68 .set noat; \ 69 subu sp,sp,16; \ 70 sw t9,12(sp); \ 71 move AT,ra; \ 72 lui t9,%hi(_mcount); \ 73 addiu t9,t9,%lo(_mcount); \ 74 jalr t9; \ 75 nop; \ 76 lw t9,4(sp); \ 77 addiu sp,sp,8; \ 78 addiu t9,t9,40; \ 79 .set pop; 80 81 #ifdef GPROF 82 #define MCOUNT _KERN_MCOUNT 83 #else 84 #define MCOUNT 85 #endif 86 87 #ifdef USE_AENT 88 #define AENT(x) \ 89 .aent x, 0 90 #else 91 #define AENT(x) 92 #endif 93 94 /* 95 * WEAK_ALIAS: create a weak alias. 96 */ 97 #define WEAK_ALIAS(alias,sym) \ 98 .weak alias; \ 99 alias = sym 100 /* 101 * STRONG_ALIAS: create a strong alias. 102 */ 103 #define STRONG_ALIAS(alias,sym) \ 104 .globl alias; \ 105 alias = sym 106 107 /* 108 * WARN_REFERENCES: create a warning if the specified symbol is referenced. 109 */ 110 #define WARN_REFERENCES(sym,msg) \ 111 .pushsection __CONCAT(.gnu.warning.,sym); \ 112 .ascii msg; \ 113 .popsection 114 115 /* 116 * STATIC_LEAF_NOPROFILE 117 * No profilable local leaf routine. 118 */ 119 #define STATIC_LEAF_NOPROFILE(x) \ 120 .ent _C_LABEL(x); \ 121 _C_LABEL(x): ; \ 122 .frame sp, 0, ra 123 124 /* 125 * LEAF_NOPROFILE 126 * No profilable leaf routine. 127 */ 128 #define LEAF_NOPROFILE(x) \ 129 .globl _C_LABEL(x); \ 130 STATIC_LEAF_NOPROFILE(x) 131 132 /* 133 * STATIC_LEAF 134 * Declare a local leaf function. 135 */ 136 #define STATIC_LEAF(x) \ 137 STATIC_LEAF_NOPROFILE(x); \ 138 MCOUNT 139 140 /* 141 * LEAF 142 * A leaf routine does 143 * - call no other function, 144 * - never use any register that callee-saved (S0-S8), and 145 * - not use any local stack storage. 146 */ 147 #define LEAF(x) \ 148 LEAF_NOPROFILE(x); \ 149 MCOUNT 150 151 /* 152 * STATIC_XLEAF 153 * declare alternate entry to a static leaf routine 154 */ 155 #define STATIC_XLEAF(x) \ 156 AENT (_C_LABEL(x)); \ 157 _C_LABEL(x): 158 159 /* 160 * XLEAF 161 * declare alternate entry to leaf routine 162 */ 163 #define XLEAF(x) \ 164 .globl _C_LABEL(x); \ 165 STATIC_XLEAF(x) 166 167 /* 168 * STATIC_NESTED_NOPROFILE 169 * No profilable local nested routine. 170 */ 171 #define STATIC_NESTED_NOPROFILE(x, fsize, retpc) \ 172 .ent _C_LABEL(x); \ 173 _C_LABEL(x): ; \ 174 .frame sp, fsize, retpc 175 176 /* 177 * NESTED_NOPROFILE 178 * No profilable nested routine. 179 */ 180 #define NESTED_NOPROFILE(x, fsize, retpc) \ 181 .globl _C_LABEL(x); \ 182 STATIC_NESTED_NOPROFILE(x, fsize, retpc) 183 184 /* 185 * NESTED 186 * A function calls other functions and needs 187 * therefore stack space to save/restore registers. 188 */ 189 #define NESTED(x, fsize, retpc) \ 190 NESTED_NOPROFILE(x, fsize, retpc); \ 191 MCOUNT 192 193 /* 194 * STATIC_NESTED 195 * No profilable local nested routine. 196 */ 197 #define STATIC_NESTED(x, fsize, retpc) \ 198 STATIC_NESTED_NOPROFILE(x, fsize, retpc); \ 199 MCOUNT 200 201 /* 202 * XNESTED 203 * declare alternate entry point to nested routine. 204 */ 205 #define XNESTED(x) \ 206 .globl _C_LABEL(x); \ 207 AENT (_C_LABEL(x)); \ 208 _C_LABEL(x): 209 210 /* 211 * END 212 * Mark end of a procedure. 213 */ 214 #define END(x) \ 215 .end _C_LABEL(x); \ 216 .size _C_LABEL(x), . - _C_LABEL(x) 217 218 /* 219 * IMPORT -- import external symbol 220 */ 221 #define IMPORT(sym, size) \ 222 .extern _C_LABEL(sym),size 223 224 /* 225 * EXPORT -- export definition of symbol 226 */ 227 #define EXPORT(x) \ 228 .globl _C_LABEL(x); \ 229 _C_LABEL(x): 230 231 /* 232 * VECTOR 233 * exception vector entrypoint 234 * XXX: regmask should be used to generate .mask 235 */ 236 #define VECTOR(x, regmask) \ 237 .ent _C_LABEL(x); \ 238 EXPORT(x); \ 239 240 #define VECTOR_END(x) \ 241 EXPORT(__CONCAT(x,_end)); \ 242 END(x); \ 243 .org _C_LABEL(x) + 0x80 244 245 /* 246 * Macros to panic and printf from assembly language. 247 */ 248 #define PANIC(msg) \ 249 PTR_LA a0, 9f; \ 250 jal _C_LABEL(panic); \ 251 nop; \ 252 MSG(msg) 253 254 #define PRINTF(msg) \ 255 PTR_LA a0, 9f; \ 256 jal _C_LABEL(printf); \ 257 nop; \ 258 MSG(msg) 259 260 #define MSG(msg) \ 261 .rdata; \ 262 9: .asciz msg; \ 263 .text 264 265 #define ASMSTR(str) \ 266 .asciz str; \ 267 .align 3 268 269 #define RCSID(name) .pushsection ".ident"; .asciz name; .popsection 270 271 /* 272 * XXX retain dialects XXX 273 */ 274 #define ALEAF(x) XLEAF(x) 275 #define NLEAF(x) LEAF_NOPROFILE(x) 276 #define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc) 277 #define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc) 278 279 #if defined(__mips_o32) 280 #define SZREG 4 281 #else 282 #define SZREG 8 283 #endif 284 285 #if defined(__mips_o32) || defined(__mips_o64) 286 #define ALSK 7 /* stack alignment */ 287 #define ALMASK -7 /* stack alignment */ 288 #define SZFPREG 4 289 #define FP_L lwc1 290 #define FP_S swc1 291 #else 292 #define ALSK 15 /* stack alignment */ 293 #define ALMASK -15 /* stack alignment */ 294 #define SZFPREG 8 295 #define FP_L ldc1 296 #define FP_S sdc1 297 #endif 298 299 /* 300 * standard callframe { 301 * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64) 302 * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1) 303 * register_t cf_gp; global pointer (only on n32 and n64) 304 * register_t cf_sp; frame pointer 305 * register_t cf_ra; return address 306 * }; 307 */ 308 #if defined(__mips_o32) || defined(__mips_o64) 309 #define CALLFRAME_SIZ (SZREG * (4 + 2)) 310 #define CALLFRAME_S0 0 311 #elif defined(__mips_n32) || defined(__mips_n64) 312 #define CALLFRAME_SIZ (SZREG * 4) 313 #define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG) 314 #endif 315 #ifndef _KERNEL 316 #define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG) 317 #endif 318 #define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) 319 #define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) 320 321 /* 322 * While it would be nice to be compatible with the SGI 323 * REG_L and REG_S macros, because they do not take parameters, it 324 * is impossible to use them with the _MIPS_SIM_ABIX32 model. 325 * 326 * These macros hide the use of mips3 instructions from the 327 * assembler to prevent the assembler from generating 64-bit style 328 * ABI calls. 329 */ 330 #ifdef __mips_o32 331 #define PTR_ADD add 332 #define PTR_ADDI addi 333 #define PTR_ADDU addu 334 #define PTR_ADDIU addiu 335 #define PTR_SUB subu 336 #define PTR_SUBI subi 337 #define PTR_SUBU subu 338 #define PTR_SUBIU subu 339 #define PTR_L lw 340 #define PTR_LA la 341 #define PTR_S sw 342 #define PTR_SLL sll 343 #define PTR_SLLV sllv 344 #define PTR_SRL srl 345 #define PTR_SRLV srlv 346 #define PTR_SRA sra 347 #define PTR_SRAV srav 348 #define PTR_LL ll 349 #define PTR_SC sc 350 #define PTR_WORD .word 351 #define PTR_SCALESHIFT 2 352 #else /* _MIPS_SZPTR == 64 */ 353 #define PTR_ADD dadd 354 #define PTR_ADDI daddi 355 #define PTR_ADDU daddu 356 #define PTR_ADDIU daddiu 357 #define PTR_SUB dsubu 358 #define PTR_SUBI dsubi 359 #define PTR_SUBU dsubu 360 #define PTR_SUBIU dsubu 361 #ifdef __mips_n32 362 #define PTR_L lw 363 #define PTR_LL ll 364 #define PTR_SC sc 365 #define PTR_S sw 366 #define PTR_SCALESHIFT 2 367 #define PTR_WORD .word 368 #else 369 #define PTR_L ld 370 #define PTR_LL lld 371 #define PTR_SC scd 372 #define PTR_S sd 373 #define PTR_SCALESHIFT 3 374 #define PTR_WORD .dword 375 #endif 376 #define PTR_LA dla 377 #define PTR_SLL dsll 378 #define PTR_SLLV dsllv 379 #define PTR_SRL dsrl 380 #define PTR_SRLV dsrlv 381 #define PTR_SRA dsra 382 #define PTR_SRAV dsrav 383 #endif /* _MIPS_SZPTR == 64 */ 384 385 #if _MIPS_SZINT == 32 386 #define INT_ADD add 387 #define INT_ADDI addi 388 #define INT_ADDU addu 389 #define INT_ADDIU addiu 390 #define INT_SUB subu 391 #define INT_SUBI subi 392 #define INT_SUBU subu 393 #define INT_SUBIU subu 394 #define INT_L lw 395 #define INT_LA la 396 #define INT_S sw 397 #define INT_SLL sll 398 #define INT_SLLV sllv 399 #define INT_SRL srl 400 #define INT_SRLV srlv 401 #define INT_SRA sra 402 #define INT_SRAV srav 403 #define INT_LL ll 404 #define INT_SC sc 405 #define INT_WORD .word 406 #define INT_SCALESHIFT 2 407 #else 408 #define INT_ADD dadd 409 #define INT_ADDI daddi 410 #define INT_ADDU daddu 411 #define INT_ADDIU daddiu 412 #define INT_SUB dsubu 413 #define INT_SUBI dsubi 414 #define INT_SUBU dsubu 415 #define INT_SUBIU dsubu 416 #define INT_L ld 417 #define INT_LA dla 418 #define INT_S sd 419 #define INT_SLL dsll 420 #define INT_SLLV dsllv 421 #define INT_SRL dsrl 422 #define INT_SRLV dsrlv 423 #define INT_SRA dsra 424 #define INT_SRAV dsrav 425 #define INT_LL lld 426 #define INT_SC scd 427 #define INT_WORD .dword 428 #define INT_SCALESHIFT 3 429 #endif 430 431 #if _MIPS_SZLONG == 32 432 #define LONG_ADD add 433 #define LONG_ADDI addi 434 #define LONG_ADDU addu 435 #define LONG_ADDIU addiu 436 #define LONG_SUB subu 437 #define LONG_SUBI subi 438 #define LONG_SUBU subu 439 #define LONG_SUBIU subu 440 #define LONG_L lw 441 #define LONG_LA la 442 #define LONG_S sw 443 #define LONG_SLL sll 444 #define LONG_SLLV sllv 445 #define LONG_SRL srl 446 #define LONG_SRLV srlv 447 #define LONG_SRA sra 448 #define LONG_SRAV srav 449 #define LONG_LL ll 450 #define LONG_SC sc 451 #define LONG_WORD .word 452 #define LONG_SCALESHIFT 2 453 #else 454 #define LONG_ADD dadd 455 #define LONG_ADDI daddi 456 #define LONG_ADDU daddu 457 #define LONG_ADDIU daddiu 458 #define LONG_SUB dsubu 459 #define LONG_SUBI dsubi 460 #define LONG_SUBU dsubu 461 #define LONG_SUBIU dsubu 462 #define LONG_L ld 463 #define LONG_LA dla 464 #define LONG_S sd 465 #define LONG_SLL dsll 466 #define LONG_SLLV dsllv 467 #define LONG_SRL dsrl 468 #define LONG_SRLV dsrlv 469 #define LONG_SRA dsra 470 #define LONG_SRAV dsrav 471 #define LONG_LL lld 472 #define LONG_SC scd 473 #define LONG_WORD .dword 474 #define LONG_SCALESHIFT 3 475 #endif 476 477 #if SZREG == 4 478 #define REG_L lw 479 #define REG_S sw 480 #define REG_LI li 481 #define REG_ADDU addu 482 #define REG_SLL sll 483 #define REG_SLLV sllv 484 #define REG_SRL srl 485 #define REG_SRLV srlv 486 #define REG_SRA sra 487 #define REG_SRAV srav 488 #define REG_LL ll 489 #define REG_SC sc 490 #define REG_SCALESHIFT 2 491 #else 492 #define REG_L ld 493 #define REG_S sd 494 #define REG_LI dli 495 #define REG_ADDU daddu 496 #define REG_SLL dsll 497 #define REG_SLLV dsllv 498 #define REG_SRL dsrl 499 #define REG_SRLV dsrlv 500 #define REG_SRA dsra 501 #define REG_SRAV dsrav 502 #define REG_LL lld 503 #define REG_SC scd 504 #define REG_SCALESHIFT 3 505 #endif 506 507 #if (MIPS1 + MIPS2) > 0 508 #define NOP_L nop 509 #else 510 #define NOP_L /* nothing */ 511 #endif 512 513 /* CPU dependent hook for cp0 load delays */ 514 #if defined(MIPS1) || defined(MIPS2) || defined(MIPS3) 515 #define MFC0_HAZARD sll $0,$0,1 /* super scalar nop */ 516 #else 517 #define MFC0_HAZARD /* nothing */ 518 #endif 519 520 #if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \ 521 _MIPS_ISA == _MIPS_ISA_MIPS32 522 #define MFC0 mfc0 523 #define MTC0 mtc0 524 #endif 525 #if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \ 526 _MIPS_ISA == _MIPS_ISA_MIPS64 527 #define MFC0 dmfc0 528 #define MTC0 dmtc0 529 #endif 530 531 #if defined(__mips_o32) || defined(__mips_o64) 532 533 #ifdef __ABICALLS__ 534 #define CPRESTORE(r) .cprestore r 535 #define CPLOAD(r) .cpload r 536 #else 537 #define CPRESTORE(r) /* not needed */ 538 #define CPLOAD(r) /* not needed */ 539 #endif 540 541 #define SETUP_GP \ 542 .set push; \ 543 .set noreorder; \ 544 .cpload t9; \ 545 .set pop 546 #define SETUP_GPX(r) \ 547 .set push; \ 548 .set noreorder; \ 549 move r,ra; /* save old ra */ \ 550 bal 7f; \ 551 nop; \ 552 7: .cpload ra; \ 553 move ra,r; \ 554 .set pop 555 #define SETUP_GPX_L(r,lbl) \ 556 .set push; \ 557 .set noreorder; \ 558 move r,ra; /* save old ra */ \ 559 bal lbl; \ 560 nop; \ 561 lbl: .cpload ra; \ 562 move ra,r; \ 563 .set pop 564 #define SAVE_GP(x) .cprestore x 565 566 #define SETUP_GP64(a,b) /* n32/n64 specific */ 567 #define SETUP_GP64_R(a,b) /* n32/n64 specific */ 568 #define SETUP_GPX64(a,b) /* n32/n64 specific */ 569 #define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */ 570 #define RESTORE_GP64 /* n32/n64 specific */ 571 #define USE_ALT_CP(a) /* n32/n64 specific */ 572 #endif /* __mips_o32 || __mips_o64 */ 573 574 #if defined(__mips_o32) || defined(__mips_o64) 575 #define REG_PROLOGUE .set push 576 #define REG_EPILOGUE .set pop 577 #endif 578 #if defined(__mips_n32) || defined(__mips_n64) 579 #define REG_PROLOGUE .set push ; .set mips3 580 #define REG_EPILOGUE .set pop 581 #endif 582 583 #if defined(__mips_n32) || defined(__mips_n64) 584 #define SETUP_GP /* o32 specific */ 585 #define SETUP_GPX(r) /* o32 specific */ 586 #define SETUP_GPX_L(r,lbl) /* o32 specific */ 587 #define SAVE_GP(x) /* o32 specific */ 588 #define SETUP_GP64(a,b) .cpsetup $25, a, b 589 #define SETUP_GPX64(a,b) \ 590 .set push; \ 591 move b,ra; \ 592 .set noreorder; \ 593 bal 7f; \ 594 nop; \ 595 7: .set pop; \ 596 .cpsetup ra, a, 7b; \ 597 move ra,b 598 #define SETUP_GPX64_L(a,b,c) \ 599 .set push; \ 600 move b,ra; \ 601 .set noreorder; \ 602 bal c; \ 603 nop; \ 604 c: .set pop; \ 605 .cpsetup ra, a, c; \ 606 move ra,b 607 #define RESTORE_GP64 .cpreturn 608 #define USE_ALT_CP(a) .cplocal a 609 #endif /* __mips_n32 || __mips_n64 */ 610 611 /* 612 * The DYNAMIC_STATUS_MASK option adds an additional masking operation 613 * when updating the hardware interrupt mask in the status register. 614 * 615 * This is useful for platforms that need to at run-time mask 616 * interrupts based on motherboard configuration or to handle 617 * slowly clearing interrupts. 618 * 619 * XXX this is only currently implemented for mips3. 620 */ 621 #ifdef MIPS_DYNAMIC_STATUS_MASK 622 #define DYNAMIC_STATUS_MASK(sr,scratch) \ 623 lw scratch, mips_dynamic_status_mask; \ 624 and sr, sr, scratch 625 626 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) \ 627 ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \ 628 DYNAMIC_STATUS_MASK(sr,scratch1) 629 #else 630 #define DYNAMIC_STATUS_MASK(sr,scratch) 631 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) 632 #endif 633 634 /* See lock_stubs.S. */ 635 #define LOG2_MIPS_LOCK_RAS_SIZE 8 636 #define MIPS_LOCK_RAS_SIZE 256 /* 16 bytes left over */ 637 638 #define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off) 639 640 #endif /* _MIPS_ASM_H */ 641
Indexes created Wed Oct 01 19:09:53 GMT 2025