asm.h revision 1.55
1 /* $NetBSD: asm.h,v 1.55 2018/09/04 00:01:41 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93 35 */ 36 37 /* 38 * machAsmDefs.h -- 39 * 40 * Macros used when writing assembler programs. 41 * 42 * Copyright (C) 1989 Digital Equipment Corporation. 43 * Permission to use, copy, modify, and distribute this software and 44 * its documentation for any purpose and without fee is hereby granted, 45 * provided that the above copyright notice appears in all copies. 46 * Digital Equipment Corporation makes no representations about the 47 * suitability of this software for any purpose. It is provided "as is" 48 * without express or implied warranty. 49 * 50 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h, 51 * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) 52 */ 53 54 #ifndef _MIPS_ASM_H 55 #define _MIPS_ASM_H 56 57 #include <sys/cdefs.h> /* for API selection */ 58 #include <mips/regdef.h> 59 60 /* 61 * Define -pg profile entry code. 62 * Must always be noreorder, must never use a macro instruction 63 * Final addiu to t9 must always equal the size of this _KERN_MCOUNT 64 */ 65 #define _KERN_MCOUNT \ 66 .set push; \ 67 .set noreorder; \ 68 .set noat; \ 69 subu sp,sp,16; \ 70 sw t9,12(sp); \ 71 move AT,ra; \ 72 lui t9,%hi(_mcount); \ 73 addiu t9,t9,%lo(_mcount); \ 74 jalr t9; \ 75 nop; \ 76 lw t9,4(sp); \ 77 addiu sp,sp,8; \ 78 addiu t9,t9,40; \ 79 .set pop; 80 81 #ifdef GPROF 82 #define MCOUNT _KERN_MCOUNT 83 #else 84 #define MCOUNT 85 #endif 86 87 #ifdef USE_AENT 88 #define AENT(x) \ 89 .aent x, 0 90 #else 91 #define AENT(x) 92 #endif 93 94 /* 95 * WEAK_ALIAS: create a weak alias. 96 */ 97 #define WEAK_ALIAS(alias,sym) \ 98 .weak alias; \ 99 alias = sym 100 /* 101 * STRONG_ALIAS: create a strong alias. 102 */ 103 #define STRONG_ALIAS(alias,sym) \ 104 .globl alias; \ 105 alias = sym 106 107 /* 108 * WARN_REFERENCES: create a warning if the specified symbol is referenced. 109 */ 110 #define WARN_REFERENCES(sym,msg) \ 111 .pushsection __CONCAT(.gnu.warning.,sym); \ 112 .ascii msg; \ 113 .popsection 114 115 /* 116 * STATIC_LEAF_NOPROFILE 117 * No profilable local leaf routine. 118 */ 119 #define STATIC_LEAF_NOPROFILE(x) \ 120 .ent _C_LABEL(x); \ 121 _C_LABEL(x): ; \ 122 .frame sp, 0, ra 123 124 /* 125 * LEAF_NOPROFILE 126 * No profilable leaf routine. 127 */ 128 #define LEAF_NOPROFILE(x) \ 129 .globl _C_LABEL(x); \ 130 STATIC_LEAF_NOPROFILE(x) 131 132 /* 133 * STATIC_LEAF 134 * Declare a local leaf function. 135 */ 136 #define STATIC_LEAF(x) \ 137 STATIC_LEAF_NOPROFILE(x); \ 138 MCOUNT 139 140 /* 141 * LEAF 142 * A leaf routine does 143 * - call no other function, 144 * - never use any register that callee-saved (S0-S8), and 145 * - not use any local stack storage. 146 */ 147 #define LEAF(x) \ 148 LEAF_NOPROFILE(x); \ 149 MCOUNT 150 151 /* 152 * STATIC_XLEAF 153 * declare alternate entry to a static leaf routine 154 */ 155 #define STATIC_XLEAF(x) \ 156 AENT (_C_LABEL(x)); \ 157 _C_LABEL(x): 158 159 /* 160 * XLEAF 161 * declare alternate entry to leaf routine 162 */ 163 #define XLEAF(x) \ 164 .globl _C_LABEL(x); \ 165 STATIC_XLEAF(x) 166 167 /* 168 * STATIC_NESTED_NOPROFILE 169 * No profilable local nested routine. 170 */ 171 #define STATIC_NESTED_NOPROFILE(x, fsize, retpc) \ 172 .ent _C_LABEL(x); \ 173 .type _C_LABEL(x), @function; \ 174 _C_LABEL(x): ; \ 175 .frame sp, fsize, retpc 176 177 /* 178 * NESTED_NOPROFILE 179 * No profilable nested routine. 180 */ 181 #define NESTED_NOPROFILE(x, fsize, retpc) \ 182 .globl _C_LABEL(x); \ 183 STATIC_NESTED_NOPROFILE(x, fsize, retpc) 184 185 /* 186 * NESTED 187 * A function calls other functions and needs 188 * therefore stack space to save/restore registers. 189 */ 190 #define NESTED(x, fsize, retpc) \ 191 NESTED_NOPROFILE(x, fsize, retpc); \ 192 MCOUNT 193 194 /* 195 * STATIC_NESTED 196 * No profilable local nested routine. 197 */ 198 #define STATIC_NESTED(x, fsize, retpc) \ 199 STATIC_NESTED_NOPROFILE(x, fsize, retpc); \ 200 MCOUNT 201 202 /* 203 * XNESTED 204 * declare alternate entry point to nested routine. 205 */ 206 #define XNESTED(x) \ 207 .globl _C_LABEL(x); \ 208 AENT (_C_LABEL(x)); \ 209 _C_LABEL(x): 210 211 /* 212 * END 213 * Mark end of a procedure. 214 */ 215 #define END(x) \ 216 .end _C_LABEL(x); \ 217 .size _C_LABEL(x), . - _C_LABEL(x) 218 219 /* 220 * IMPORT -- import external symbol 221 */ 222 #define IMPORT(sym, size) \ 223 .extern _C_LABEL(sym),size 224 225 /* 226 * EXPORT -- export definition of symbol 227 */ 228 #define EXPORT(x) \ 229 .globl _C_LABEL(x); \ 230 _C_LABEL(x): 231 232 /* 233 * VECTOR 234 * exception vector entrypoint 235 * XXX: regmask should be used to generate .mask 236 */ 237 #define VECTOR(x, regmask) \ 238 .ent _C_LABEL(x); \ 239 EXPORT(x); \ 240 241 #define VECTOR_END(x) \ 242 EXPORT(__CONCAT(x,_end)); \ 243 END(x); \ 244 .org _C_LABEL(x) + 0x80 245 246 /* 247 * Macros to panic and printf from assembly language. 248 */ 249 #define PANIC(msg) \ 250 PTR_LA a0, 9f; \ 251 jal _C_LABEL(panic); \ 252 nop; \ 253 MSG(msg) 254 255 #define PRINTF(msg) \ 256 PTR_LA a0, 9f; \ 257 jal _C_LABEL(printf); \ 258 nop; \ 259 MSG(msg) 260 261 #define MSG(msg) \ 262 .rdata; \ 263 9: .asciz msg; \ 264 .text 265 266 #define ASMSTR(str) \ 267 .asciz str; \ 268 .align 3 269 270 #define RCSID(name) .pushsection ".ident"; .asciz name; .popsection 271 272 /* 273 * XXX retain dialects XXX 274 */ 275 #define ALEAF(x) XLEAF(x) 276 #define NLEAF(x) LEAF_NOPROFILE(x) 277 #define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc) 278 #define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc) 279 280 #if defined(__mips_o32) 281 #define SZREG 4 282 #else 283 #define SZREG 8 284 #endif 285 286 #if defined(__mips_o32) || defined(__mips_o64) 287 #define ALSK 7 /* stack alignment */ 288 #define ALMASK -7 /* stack alignment */ 289 #define SZFPREG 4 290 #define FP_L lwc1 291 #define FP_S swc1 292 #else 293 #define ALSK 15 /* stack alignment */ 294 #define ALMASK -15 /* stack alignment */ 295 #define SZFPREG 8 296 #define FP_L ldc1 297 #define FP_S sdc1 298 #endif 299 300 /* 301 * standard callframe { 302 * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64) 303 * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1) 304 * register_t cf_gp; global pointer (only on n32 and n64) 305 * register_t cf_sp; frame pointer 306 * register_t cf_ra; return address 307 * }; 308 */ 309 #if defined(__mips_o32) || defined(__mips_o64) 310 #define CALLFRAME_SIZ (SZREG * (4 + 2)) 311 #define CALLFRAME_S0 0 312 #elif defined(__mips_n32) || defined(__mips_n64) 313 #define CALLFRAME_SIZ (SZREG * 4) 314 #define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG) 315 #endif 316 #ifndef _KERNEL 317 #define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG) 318 #endif 319 #define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) 320 #define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) 321 322 /* 323 * While it would be nice to be compatible with the SGI 324 * REG_L and REG_S macros, because they do not take parameters, it 325 * is impossible to use them with the _MIPS_SIM_ABIX32 model. 326 * 327 * These macros hide the use of mips3 instructions from the 328 * assembler to prevent the assembler from generating 64-bit style 329 * ABI calls. 330 */ 331 #ifdef __mips_o32 332 #define PTR_ADD add 333 #define PTR_ADDI addi 334 #define PTR_ADDU addu 335 #define PTR_ADDIU addiu 336 #define PTR_SUB subu 337 #define PTR_SUBI subi 338 #define PTR_SUBU subu 339 #define PTR_SUBIU subu 340 #define PTR_L lw 341 #define PTR_LA la 342 #define PTR_S sw 343 #define PTR_SLL sll 344 #define PTR_SLLV sllv 345 #define PTR_SRL srl 346 #define PTR_SRLV srlv 347 #define PTR_SRA sra 348 #define PTR_SRAV srav 349 #define PTR_LL ll 350 #define PTR_SC sc 351 #define PTR_WORD .word 352 #define PTR_SCALESHIFT 2 353 #else /* _MIPS_SZPTR == 64 */ 354 #define PTR_ADD dadd 355 #define PTR_ADDI daddi 356 #define PTR_ADDU daddu 357 #define PTR_ADDIU daddiu 358 #define PTR_SUB dsubu 359 #define PTR_SUBI dsubi 360 #define PTR_SUBU dsubu 361 #define PTR_SUBIU dsubu 362 #ifdef __mips_n32 363 #define PTR_L lw 364 #define PTR_LL ll 365 #define PTR_SC sc 366 #define PTR_S sw 367 #define PTR_SCALESHIFT 2 368 #define PTR_WORD .word 369 #else 370 #define PTR_L ld 371 #define PTR_LL lld 372 #define PTR_SC scd 373 #define PTR_S sd 374 #define PTR_SCALESHIFT 3 375 #define PTR_WORD .dword 376 #endif 377 #define PTR_LA dla 378 #define PTR_SLL dsll 379 #define PTR_SLLV dsllv 380 #define PTR_SRL dsrl 381 #define PTR_SRLV dsrlv 382 #define PTR_SRA dsra 383 #define PTR_SRAV dsrav 384 #endif /* _MIPS_SZPTR == 64 */ 385 386 #if _MIPS_SZINT == 32 387 #define INT_ADD add 388 #define INT_ADDI addi 389 #define INT_ADDU addu 390 #define INT_ADDIU addiu 391 #define INT_SUB subu 392 #define INT_SUBI subi 393 #define INT_SUBU subu 394 #define INT_SUBIU subu 395 #define INT_L lw 396 #define INT_LA la 397 #define INT_S sw 398 #define INT_SLL sll 399 #define INT_SLLV sllv 400 #define INT_SRL srl 401 #define INT_SRLV srlv 402 #define INT_SRA sra 403 #define INT_SRAV srav 404 #define INT_LL ll 405 #define INT_SC sc 406 #define INT_WORD .word 407 #define INT_SCALESHIFT 2 408 #else 409 #define INT_ADD dadd 410 #define INT_ADDI daddi 411 #define INT_ADDU daddu 412 #define INT_ADDIU daddiu 413 #define INT_SUB dsubu 414 #define INT_SUBI dsubi 415 #define INT_SUBU dsubu 416 #define INT_SUBIU dsubu 417 #define INT_L ld 418 #define INT_LA dla 419 #define INT_S sd 420 #define INT_SLL dsll 421 #define INT_SLLV dsllv 422 #define INT_SRL dsrl 423 #define INT_SRLV dsrlv 424 #define INT_SRA dsra 425 #define INT_SRAV dsrav 426 #define INT_LL lld 427 #define INT_SC scd 428 #define INT_WORD .dword 429 #define INT_SCALESHIFT 3 430 #endif 431 432 #if _MIPS_SZLONG == 32 433 #define LONG_ADD add 434 #define LONG_ADDI addi 435 #define LONG_ADDU addu 436 #define LONG_ADDIU addiu 437 #define LONG_SUB subu 438 #define LONG_SUBI subi 439 #define LONG_SUBU subu 440 #define LONG_SUBIU subu 441 #define LONG_L lw 442 #define LONG_LA la 443 #define LONG_S sw 444 #define LONG_SLL sll 445 #define LONG_SLLV sllv 446 #define LONG_SRL srl 447 #define LONG_SRLV srlv 448 #define LONG_SRA sra 449 #define LONG_SRAV srav 450 #define LONG_LL ll 451 #define LONG_SC sc 452 #define LONG_WORD .word 453 #define LONG_SCALESHIFT 2 454 #else 455 #define LONG_ADD dadd 456 #define LONG_ADDI daddi 457 #define LONG_ADDU daddu 458 #define LONG_ADDIU daddiu 459 #define LONG_SUB dsubu 460 #define LONG_SUBI dsubi 461 #define LONG_SUBU dsubu 462 #define LONG_SUBIU dsubu 463 #define LONG_L ld 464 #define LONG_LA dla 465 #define LONG_S sd 466 #define LONG_SLL dsll 467 #define LONG_SLLV dsllv 468 #define LONG_SRL dsrl 469 #define LONG_SRLV dsrlv 470 #define LONG_SRA dsra 471 #define LONG_SRAV dsrav 472 #define LONG_LL lld 473 #define LONG_SC scd 474 #define LONG_WORD .dword 475 #define LONG_SCALESHIFT 3 476 #endif 477 478 #if SZREG == 4 479 #define REG_L lw 480 #define REG_S sw 481 #define REG_LI li 482 #define REG_ADDU addu 483 #define REG_SLL sll 484 #define REG_SLLV sllv 485 #define REG_SRL srl 486 #define REG_SRLV srlv 487 #define REG_SRA sra 488 #define REG_SRAV srav 489 #define REG_LL ll 490 #define REG_SC sc 491 #define REG_SCALESHIFT 2 492 #else 493 #define REG_L ld 494 #define REG_S sd 495 #define REG_LI dli 496 #define REG_ADDU daddu 497 #define REG_SLL dsll 498 #define REG_SLLV dsllv 499 #define REG_SRL dsrl 500 #define REG_SRLV dsrlv 501 #define REG_SRA dsra 502 #define REG_SRAV dsrav 503 #define REG_LL lld 504 #define REG_SC scd 505 #define REG_SCALESHIFT 3 506 #endif 507 508 #if (MIPS1 + MIPS2) > 0 509 #define NOP_L nop 510 #else 511 #define NOP_L /* nothing */ 512 #endif 513 514 /* CPU dependent hook for cp0 load delays */ 515 #if defined(MIPS1) || defined(MIPS2) || defined(MIPS3) 516 #define MFC0_HAZARD sll $0,$0,1 /* super scalar nop */ 517 #else 518 #define MFC0_HAZARD /* nothing */ 519 #endif 520 521 #if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \ 522 _MIPS_ISA == _MIPS_ISA_MIPS32 523 #define MFC0 mfc0 524 #define MTC0 mtc0 525 #endif 526 #if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \ 527 _MIPS_ISA == _MIPS_ISA_MIPS64 528 #define MFC0 dmfc0 529 #define MTC0 dmtc0 530 #endif 531 532 #if defined(__mips_o32) || defined(__mips_o64) 533 534 #ifdef __mips_abicalls 535 #define CPRESTORE(r) .cprestore r 536 #define CPLOAD(r) .cpload r 537 #else 538 #define CPRESTORE(r) /* not needed */ 539 #define CPLOAD(r) /* not needed */ 540 #endif 541 542 #define SETUP_GP \ 543 .set push; \ 544 .set noreorder; \ 545 .cpload t9; \ 546 .set pop 547 #define SETUP_GPX(r) \ 548 .set push; \ 549 .set noreorder; \ 550 move r,ra; /* save old ra */ \ 551 bal 7f; \ 552 nop; \ 553 7: .cpload ra; \ 554 move ra,r; \ 555 .set pop 556 #define SETUP_GPX_L(r,lbl) \ 557 .set push; \ 558 .set noreorder; \ 559 move r,ra; /* save old ra */ \ 560 bal lbl; \ 561 nop; \ 562 lbl: .cpload ra; \ 563 move ra,r; \ 564 .set pop 565 #define SAVE_GP(x) .cprestore x 566 567 #define SETUP_GP64(a,b) /* n32/n64 specific */ 568 #define SETUP_GP64_R(a,b) /* n32/n64 specific */ 569 #define SETUP_GPX64(a,b) /* n32/n64 specific */ 570 #define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */ 571 #define RESTORE_GP64 /* n32/n64 specific */ 572 #define USE_ALT_CP(a) /* n32/n64 specific */ 573 #endif /* __mips_o32 || __mips_o64 */ 574 575 #if defined(__mips_o32) || defined(__mips_o64) 576 #define REG_PROLOGUE .set push 577 #define REG_EPILOGUE .set pop 578 #endif 579 #if defined(__mips_n32) || defined(__mips_n64) 580 #define REG_PROLOGUE .set push ; .set mips3 581 #define REG_EPILOGUE .set pop 582 #endif 583 584 #if defined(__mips_n32) || defined(__mips_n64) 585 #define SETUP_GP /* o32 specific */ 586 #define SETUP_GPX(r) /* o32 specific */ 587 #define SETUP_GPX_L(r,lbl) /* o32 specific */ 588 #define SAVE_GP(x) /* o32 specific */ 589 #define SETUP_GP64(a,b) .cpsetup $25, a, b 590 #define SETUP_GPX64(a,b) \ 591 .set push; \ 592 move b,ra; \ 593 .set noreorder; \ 594 bal 7f; \ 595 nop; \ 596 7: .set pop; \ 597 .cpsetup ra, a, 7b; \ 598 move ra,b 599 #define SETUP_GPX64_L(a,b,c) \ 600 .set push; \ 601 move b,ra; \ 602 .set noreorder; \ 603 bal c; \ 604 nop; \ 605 c: .set pop; \ 606 .cpsetup ra, a, c; \ 607 move ra,b 608 #define RESTORE_GP64 .cpreturn 609 #define USE_ALT_CP(a) .cplocal a 610 #endif /* __mips_n32 || __mips_n64 */ 611 612 /* 613 * The DYNAMIC_STATUS_MASK option adds an additional masking operation 614 * when updating the hardware interrupt mask in the status register. 615 * 616 * This is useful for platforms that need to at run-time mask 617 * interrupts based on motherboard configuration or to handle 618 * slowly clearing interrupts. 619 * 620 * XXX this is only currently implemented for mips3. 621 */ 622 #ifdef MIPS_DYNAMIC_STATUS_MASK 623 #define DYNAMIC_STATUS_MASK(sr,scratch) \ 624 lw scratch, mips_dynamic_status_mask; \ 625 and sr, sr, scratch 626 627 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) \ 628 ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \ 629 DYNAMIC_STATUS_MASK(sr,scratch1) 630 #else 631 #define DYNAMIC_STATUS_MASK(sr,scratch) 632 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) 633 #endif 634 635 /* See lock_stubs.S. */ 636 #define LOG2_MIPS_LOCK_RAS_SIZE 8 637 #define MIPS_LOCK_RAS_SIZE 256 /* 16 bytes left over */ 638 639 #define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off) 640 641 #endif /* _MIPS_ASM_H */ 642
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