asm.h revision 1.60
1 /* $NetBSD: asm.h,v 1.60 2020/08/10 14:37:38 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93 35 */ 36 37 /* 38 * machAsmDefs.h -- 39 * 40 * Macros used when writing assembler programs. 41 * 42 * Copyright (C) 1989 Digital Equipment Corporation. 43 * Permission to use, copy, modify, and distribute this software and 44 * its documentation for any purpose and without fee is hereby granted, 45 * provided that the above copyright notice appears in all copies. 46 * Digital Equipment Corporation makes no representations about the 47 * suitability of this software for any purpose. It is provided "as is" 48 * without express or implied warranty. 49 * 50 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h, 51 * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) 52 */ 53 54 #ifndef _MIPS_ASM_H 55 #define _MIPS_ASM_H 56 57 #include <sys/cdefs.h> /* for API selection */ 58 #include <mips/regdef.h> 59 60 /* 61 * Define -pg profile entry code. 62 * Must always be noreorder, must never use a macro instruction 63 * Final addiu to t9 must always equal the size of this _KERN_MCOUNT 64 */ 65 #define _KERN_MCOUNT \ 66 .set push; \ 67 .set noreorder; \ 68 .set noat; \ 69 subu sp,sp,16; \ 70 sw t9,12(sp); \ 71 move AT,ra; \ 72 lui t9,%hi(_mcount); \ 73 addiu t9,t9,%lo(_mcount); \ 74 jalr t9; \ 75 nop; \ 76 lw t9,4(sp); \ 77 addiu sp,sp,8; \ 78 addiu t9,t9,40; \ 79 .set pop; 80 81 #ifdef GPROF 82 #define MCOUNT _KERN_MCOUNT 83 #else 84 #define MCOUNT 85 #endif 86 87 #ifdef USE_AENT 88 #define AENT(x) \ 89 .aent x, 0 90 #else 91 #define AENT(x) 92 #endif 93 94 /* 95 * WEAK_ALIAS: create a weak alias. 96 */ 97 #define WEAK_ALIAS(alias,sym) \ 98 .weak alias; \ 99 alias = sym 100 /* 101 * STRONG_ALIAS: create a strong alias. 102 */ 103 #define STRONG_ALIAS(alias,sym) \ 104 .globl alias; \ 105 alias = sym 106 107 /* 108 * WARN_REFERENCES: create a warning if the specified symbol is referenced. 109 */ 110 #define WARN_REFERENCES(sym,msg) \ 111 .pushsection __CONCAT(.gnu.warning.,sym); \ 112 .ascii msg; \ 113 .popsection 114 115 /* 116 * STATIC_LEAF_NOPROFILE 117 * No profilable local leaf routine. 118 */ 119 #define STATIC_LEAF_NOPROFILE(x) \ 120 .ent _C_LABEL(x); \ 121 _C_LABEL(x): ; \ 122 .frame sp, 0, ra 123 124 /* 125 * LEAF_NOPROFILE 126 * No profilable leaf routine. 127 */ 128 #define LEAF_NOPROFILE(x) \ 129 .globl _C_LABEL(x); \ 130 STATIC_LEAF_NOPROFILE(x) 131 132 /* 133 * STATIC_LEAF 134 * Declare a local leaf function. 135 */ 136 #define STATIC_LEAF(x) \ 137 STATIC_LEAF_NOPROFILE(x); \ 138 MCOUNT 139 140 /* 141 * LEAF 142 * A leaf routine does 143 * - call no other function, 144 * - never use any register that callee-saved (S0-S8), and 145 * - not use any local stack storage. 146 */ 147 #define LEAF(x) \ 148 LEAF_NOPROFILE(x); \ 149 MCOUNT 150 151 /* 152 * STATIC_XLEAF 153 * declare alternate entry to a static leaf routine 154 */ 155 #define STATIC_XLEAF(x) \ 156 AENT (_C_LABEL(x)); \ 157 _C_LABEL(x): 158 159 /* 160 * XLEAF 161 * declare alternate entry to leaf routine 162 */ 163 #define XLEAF(x) \ 164 .globl _C_LABEL(x); \ 165 STATIC_XLEAF(x) 166 167 /* 168 * STATIC_NESTED_NOPROFILE 169 * No profilable local nested routine. 170 */ 171 #define STATIC_NESTED_NOPROFILE(x, fsize, retpc) \ 172 .ent _C_LABEL(x); \ 173 .type _C_LABEL(x), @function; \ 174 _C_LABEL(x): ; \ 175 .frame sp, fsize, retpc 176 177 /* 178 * NESTED_NOPROFILE 179 * No profilable nested routine. 180 */ 181 #define NESTED_NOPROFILE(x, fsize, retpc) \ 182 .globl _C_LABEL(x); \ 183 STATIC_NESTED_NOPROFILE(x, fsize, retpc) 184 185 /* 186 * NESTED 187 * A function calls other functions and needs 188 * therefore stack space to save/restore registers. 189 */ 190 #define NESTED(x, fsize, retpc) \ 191 NESTED_NOPROFILE(x, fsize, retpc); \ 192 MCOUNT 193 194 /* 195 * STATIC_NESTED 196 * No profilable local nested routine. 197 */ 198 #define STATIC_NESTED(x, fsize, retpc) \ 199 STATIC_NESTED_NOPROFILE(x, fsize, retpc); \ 200 MCOUNT 201 202 /* 203 * XNESTED 204 * declare alternate entry point to nested routine. 205 */ 206 #define XNESTED(x) \ 207 .globl _C_LABEL(x); \ 208 AENT (_C_LABEL(x)); \ 209 _C_LABEL(x): 210 211 /* 212 * END 213 * Mark end of a procedure. 214 */ 215 #define END(x) \ 216 .end _C_LABEL(x); \ 217 .size _C_LABEL(x), . - _C_LABEL(x) 218 219 /* 220 * IMPORT -- import external symbol 221 */ 222 #define IMPORT(sym, size) \ 223 .extern _C_LABEL(sym),size 224 225 /* 226 * EXPORT -- export definition of symbol 227 */ 228 #define EXPORT(x) \ 229 .globl _C_LABEL(x); \ 230 _C_LABEL(x): 231 232 /* 233 * VECTOR 234 * exception vector entrypoint 235 * XXX: regmask should be used to generate .mask 236 */ 237 #define VECTOR(x, regmask) \ 238 .ent _C_LABEL(x); \ 239 EXPORT(x); \ 240 241 #define VECTOR_END(x) \ 242 EXPORT(__CONCAT(x,_end)); \ 243 END(x); \ 244 .org _C_LABEL(x) + 0x80 245 246 /* 247 * Macros to panic and printf from assembly language. 248 */ 249 #define PANIC(msg) \ 250 PTR_LA a0, 9f; \ 251 jal _C_LABEL(panic); \ 252 nop; \ 253 MSG(msg) 254 255 #define PRINTF(msg) \ 256 PTR_LA a0, 9f; \ 257 jal _C_LABEL(printf); \ 258 nop; \ 259 MSG(msg) 260 261 #define MSG(msg) \ 262 .rdata; \ 263 9: .asciz msg; \ 264 .text 265 266 #define ASMSTR(str) \ 267 .asciz str; \ 268 .align 3 269 270 #define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ 271 .asciz x; \ 272 .popsection 273 274 /* 275 * XXX retain dialects XXX 276 */ 277 #define ALEAF(x) XLEAF(x) 278 #define NLEAF(x) LEAF_NOPROFILE(x) 279 #define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc) 280 #define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc) 281 282 #if defined(__mips_o32) 283 #define SZREG 4 284 #else 285 #define SZREG 8 286 #endif 287 288 #if defined(__mips_o32) || defined(__mips_o64) 289 #define ALSK 7 /* stack alignment */ 290 #define ALMASK -7 /* stack alignment */ 291 #define SZFPREG 4 292 #define FP_L lwc1 293 #define FP_S swc1 294 #else 295 #define ALSK 15 /* stack alignment */ 296 #define ALMASK -15 /* stack alignment */ 297 #define SZFPREG 8 298 #define FP_L ldc1 299 #define FP_S sdc1 300 #endif 301 302 /* 303 * standard callframe { 304 * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64) 305 * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1) 306 * register_t cf_gp; global pointer (only on n32 and n64) 307 * register_t cf_sp; frame pointer 308 * register_t cf_ra; return address 309 * }; 310 */ 311 #if defined(__mips_o32) || defined(__mips_o64) 312 #define CALLFRAME_SIZ (SZREG * (4 + 2)) 313 #define CALLFRAME_S0 0 314 #elif defined(__mips_n32) || defined(__mips_n64) 315 #define CALLFRAME_SIZ (SZREG * 4) 316 #define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG) 317 #endif 318 #ifndef _KERNEL 319 #define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG) 320 #endif 321 #define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) 322 #define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) 323 324 /* 325 * While it would be nice to be compatible with the SGI 326 * REG_L and REG_S macros, because they do not take parameters, it 327 * is impossible to use them with the _MIPS_SIM_ABIX32 model. 328 * 329 * These macros hide the use of mips3 instructions from the 330 * assembler to prevent the assembler from generating 64-bit style 331 * ABI calls. 332 */ 333 #ifdef __mips_o32 334 #define PTR_ADD add 335 #define PTR_ADDI addi 336 #define PTR_ADDU addu 337 #define PTR_ADDIU addiu 338 #define PTR_SUB subu 339 #define PTR_SUBI subi 340 #define PTR_SUBU subu 341 #define PTR_SUBIU subu 342 #define PTR_L lw 343 #define PTR_LA la 344 #define PTR_S sw 345 #define PTR_SLL sll 346 #define PTR_SLLV sllv 347 #define PTR_SRL srl 348 #define PTR_SRLV srlv 349 #define PTR_SRA sra 350 #define PTR_SRAV srav 351 #define PTR_LL ll 352 #define PTR_SC sc 353 #define PTR_WORD .word 354 #define PTR_SCALESHIFT 2 355 #else /* _MIPS_SZPTR == 64 */ 356 #define PTR_ADD dadd 357 #define PTR_ADDI daddi 358 #define PTR_ADDU daddu 359 #define PTR_ADDIU daddiu 360 #define PTR_SUB dsubu 361 #define PTR_SUBI dsubi 362 #define PTR_SUBU dsubu 363 #define PTR_SUBIU dsubu 364 #ifdef __mips_n32 365 #define PTR_L lw 366 #define PTR_LL ll 367 #define PTR_SC sc 368 #define PTR_S sw 369 #define PTR_SCALESHIFT 2 370 #define PTR_WORD .word 371 #else 372 #define PTR_L ld 373 #define PTR_LL lld 374 #define PTR_SC scd 375 #define PTR_S sd 376 #define PTR_SCALESHIFT 3 377 #define PTR_WORD .dword 378 #endif 379 #define PTR_LA dla 380 #define PTR_SLL dsll 381 #define PTR_SLLV dsllv 382 #define PTR_SRL dsrl 383 #define PTR_SRLV dsrlv 384 #define PTR_SRA dsra 385 #define PTR_SRAV dsrav 386 #endif /* _MIPS_SZPTR == 64 */ 387 388 #if _MIPS_SZINT == 32 389 #define INT_ADD add 390 #define INT_ADDI addi 391 #define INT_ADDU addu 392 #define INT_ADDIU addiu 393 #define INT_SUB subu 394 #define INT_SUBI subi 395 #define INT_SUBU subu 396 #define INT_SUBIU subu 397 #define INT_L lw 398 #define INT_LA la 399 #define INT_S sw 400 #define INT_SLL sll 401 #define INT_SLLV sllv 402 #define INT_SRL srl 403 #define INT_SRLV srlv 404 #define INT_SRA sra 405 #define INT_SRAV srav 406 #define INT_LL ll 407 #define INT_SC sc 408 #define INT_WORD .word 409 #define INT_SCALESHIFT 2 410 #else 411 #define INT_ADD dadd 412 #define INT_ADDI daddi 413 #define INT_ADDU daddu 414 #define INT_ADDIU daddiu 415 #define INT_SUB dsubu 416 #define INT_SUBI dsubi 417 #define INT_SUBU dsubu 418 #define INT_SUBIU dsubu 419 #define INT_L ld 420 #define INT_LA dla 421 #define INT_S sd 422 #define INT_SLL dsll 423 #define INT_SLLV dsllv 424 #define INT_SRL dsrl 425 #define INT_SRLV dsrlv 426 #define INT_SRA dsra 427 #define INT_SRAV dsrav 428 #define INT_LL lld 429 #define INT_SC scd 430 #define INT_WORD .dword 431 #define INT_SCALESHIFT 3 432 #endif 433 434 #if _MIPS_SZLONG == 32 435 #define LONG_ADD add 436 #define LONG_ADDI addi 437 #define LONG_ADDU addu 438 #define LONG_ADDIU addiu 439 #define LONG_SUB subu 440 #define LONG_SUBI subi 441 #define LONG_SUBU subu 442 #define LONG_SUBIU subu 443 #define LONG_L lw 444 #define LONG_LA la 445 #define LONG_S sw 446 #define LONG_SLL sll 447 #define LONG_SLLV sllv 448 #define LONG_SRL srl 449 #define LONG_SRLV srlv 450 #define LONG_SRA sra 451 #define LONG_SRAV srav 452 #define LONG_LL ll 453 #define LONG_SC sc 454 #define LONG_WORD .word 455 #define LONG_SCALESHIFT 2 456 #else 457 #define LONG_ADD dadd 458 #define LONG_ADDI daddi 459 #define LONG_ADDU daddu 460 #define LONG_ADDIU daddiu 461 #define LONG_SUB dsubu 462 #define LONG_SUBI dsubi 463 #define LONG_SUBU dsubu 464 #define LONG_SUBIU dsubu 465 #define LONG_L ld 466 #define LONG_LA dla 467 #define LONG_S sd 468 #define LONG_SLL dsll 469 #define LONG_SLLV dsllv 470 #define LONG_SRL dsrl 471 #define LONG_SRLV dsrlv 472 #define LONG_SRA dsra 473 #define LONG_SRAV dsrav 474 #define LONG_LL lld 475 #define LONG_SC scd 476 #define LONG_WORD .dword 477 #define LONG_SCALESHIFT 3 478 #endif 479 480 #if SZREG == 4 481 #define REG_L lw 482 #define REG_S sw 483 #define REG_LI li 484 #define REG_ADDU addu 485 #define REG_SLL sll 486 #define REG_SLLV sllv 487 #define REG_SRL srl 488 #define REG_SRLV srlv 489 #define REG_SRA sra 490 #define REG_SRAV srav 491 #define REG_LL ll 492 #define REG_SC sc 493 #define REG_SCALESHIFT 2 494 #else 495 #define REG_L ld 496 #define REG_S sd 497 #define REG_LI dli 498 #define REG_ADDU daddu 499 #define REG_SLL dsll 500 #define REG_SLLV dsllv 501 #define REG_SRL dsrl 502 #define REG_SRLV dsrlv 503 #define REG_SRA dsra 504 #define REG_SRAV dsrav 505 #define REG_LL lld 506 #define REG_SC scd 507 #define REG_SCALESHIFT 3 508 #endif 509 510 #if (MIPS1 + MIPS2) > 0 511 #define NOP_L nop 512 #else 513 #define NOP_L /* nothing */ 514 #endif 515 516 /* compiler define */ 517 #if defined(__OCTEON__) 518 /* early cnMIPS have erratum which means 2 */ 519 #define LLSCSYNC sync 4; sync 4 520 #define SYNC sync 4 /* sync 4 == syncw - sync all writes */ 521 #define BDSYNC sync 4 /* sync 4 == syncw - sync all writes */ 522 #elif __mips >= 3 || !defined(__mips_o32) 523 #define LLSCSYNC sync 524 #define SYNC sync 525 #define BDSYNC sync 526 #else 527 #define LLSCSYNC /* nothing */ 528 #define SYNC /* nothing */ 529 #define BDSYNC nop 530 #endif 531 532 /* CPU dependent hook for cp0 load delays */ 533 #if defined(MIPS1) || defined(MIPS2) || defined(MIPS3) 534 #define MFC0_HAZARD sll $0,$0,1 /* super scalar nop */ 535 #else 536 #define MFC0_HAZARD /* nothing */ 537 #endif 538 539 #if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \ 540 _MIPS_ISA == _MIPS_ISA_MIPS32 541 #define MFC0 mfc0 542 #define MTC0 mtc0 543 #endif 544 #if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \ 545 _MIPS_ISA == _MIPS_ISA_MIPS64 546 #define MFC0 dmfc0 547 #define MTC0 dmtc0 548 #endif 549 550 #if defined(__mips_o32) || defined(__mips_o64) 551 552 #ifdef __mips_abicalls 553 #define CPRESTORE(r) .cprestore r 554 #define CPLOAD(r) .cpload r 555 #else 556 #define CPRESTORE(r) /* not needed */ 557 #define CPLOAD(r) /* not needed */ 558 #endif 559 560 #define SETUP_GP \ 561 .set push; \ 562 .set noreorder; \ 563 .cpload t9; \ 564 .set pop 565 #define SETUP_GPX(r) \ 566 .set push; \ 567 .set noreorder; \ 568 move r,ra; /* save old ra */ \ 569 bal 7f; \ 570 nop; \ 571 7: .cpload ra; \ 572 move ra,r; \ 573 .set pop 574 #define SETUP_GPX_L(r,lbl) \ 575 .set push; \ 576 .set noreorder; \ 577 move r,ra; /* save old ra */ \ 578 bal lbl; \ 579 nop; \ 580 lbl: .cpload ra; \ 581 move ra,r; \ 582 .set pop 583 #define SAVE_GP(x) .cprestore x 584 585 #define SETUP_GP64(a,b) /* n32/n64 specific */ 586 #define SETUP_GP64_R(a,b) /* n32/n64 specific */ 587 #define SETUP_GPX64(a,b) /* n32/n64 specific */ 588 #define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */ 589 #define RESTORE_GP64 /* n32/n64 specific */ 590 #define USE_ALT_CP(a) /* n32/n64 specific */ 591 #endif /* __mips_o32 || __mips_o64 */ 592 593 #if defined(__mips_o32) || defined(__mips_o64) 594 #define REG_PROLOGUE .set push 595 #define REG_EPILOGUE .set pop 596 #endif 597 #if defined(__mips_n32) || defined(__mips_n64) 598 #define REG_PROLOGUE .set push ; .set mips3 599 #define REG_EPILOGUE .set pop 600 #endif 601 602 #if defined(__mips_n32) || defined(__mips_n64) 603 #define SETUP_GP /* o32 specific */ 604 #define SETUP_GPX(r) /* o32 specific */ 605 #define SETUP_GPX_L(r,lbl) /* o32 specific */ 606 #define SAVE_GP(x) /* o32 specific */ 607 #define SETUP_GP64(a,b) .cpsetup $25, a, b 608 #define SETUP_GPX64(a,b) \ 609 .set push; \ 610 move b,ra; \ 611 .set noreorder; \ 612 bal 7f; \ 613 nop; \ 614 7: .set pop; \ 615 .cpsetup ra, a, 7b; \ 616 move ra,b 617 #define SETUP_GPX64_L(a,b,c) \ 618 .set push; \ 619 move b,ra; \ 620 .set noreorder; \ 621 bal c; \ 622 nop; \ 623 c: .set pop; \ 624 .cpsetup ra, a, c; \ 625 move ra,b 626 #define RESTORE_GP64 .cpreturn 627 #define USE_ALT_CP(a) .cplocal a 628 #endif /* __mips_n32 || __mips_n64 */ 629 630 /* 631 * The DYNAMIC_STATUS_MASK option adds an additional masking operation 632 * when updating the hardware interrupt mask in the status register. 633 * 634 * This is useful for platforms that need to at run-time mask 635 * interrupts based on motherboard configuration or to handle 636 * slowly clearing interrupts. 637 * 638 * XXX this is only currently implemented for mips3. 639 */ 640 #ifdef MIPS_DYNAMIC_STATUS_MASK 641 #define DYNAMIC_STATUS_MASK(sr,scratch) \ 642 lw scratch, mips_dynamic_status_mask; \ 643 and sr, sr, scratch 644 645 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) \ 646 ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \ 647 DYNAMIC_STATUS_MASK(sr,scratch1) 648 #else 649 #define DYNAMIC_STATUS_MASK(sr,scratch) 650 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) 651 #endif 652 653 /* See lock_stubs.S. */ 654 #define LOG2_MIPS_LOCK_RAS_SIZE 8 655 #define MIPS_LOCK_RAS_SIZE 256 /* 16 bytes left over */ 656 657 #define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off) 658 659 #endif /* _MIPS_ASM_H */ 660
Indexes created Tue Sep 23 07:09:52 GMT 2025