asm.h revision 1.63
1 /* $NetBSD: asm.h,v 1.63 2021/02/04 08:51:42 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93 35 */ 36 37 /* 38 * machAsmDefs.h -- 39 * 40 * Macros used when writing assembler programs. 41 * 42 * Copyright (C) 1989 Digital Equipment Corporation. 43 * Permission to use, copy, modify, and distribute this software and 44 * its documentation for any purpose and without fee is hereby granted, 45 * provided that the above copyright notice appears in all copies. 46 * Digital Equipment Corporation makes no representations about the 47 * suitability of this software for any purpose. It is provided "as is" 48 * without express or implied warranty. 49 * 50 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h, 51 * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) 52 */ 53 54 #ifndef _MIPS_ASM_H 55 #define _MIPS_ASM_H 56 57 #include <sys/cdefs.h> /* for API selection */ 58 #include <mips/regdef.h> 59 60 #define __BIT(n) (1 << (n)) 61 #define __BITS(hi,lo) ((~((~0)<<((hi)+1)))&((~0)<<(lo))) 62 63 #define __LOWEST_SET_BIT(__mask) ((((__mask) - 1) & (__mask)) ^ (__mask)) 64 #define __SHIFTOUT(__x, __mask) (((__x) & (__mask)) / __LOWEST_SET_BIT(__mask)) 65 #define __SHIFTIN(__x, __mask) ((__x) * __LOWEST_SET_BIT(__mask)) 66 67 /* 68 * Define -pg profile entry code. 69 * Must always be noreorder, must never use a macro instruction 70 * Final addiu to t9 must always equal the size of this _KERN_MCOUNT 71 */ 72 #define _KERN_MCOUNT \ 73 .set push; \ 74 .set noreorder; \ 75 .set noat; \ 76 subu sp,sp,16; \ 77 sw t9,12(sp); \ 78 move AT,ra; \ 79 lui t9,%hi(_mcount); \ 80 addiu t9,t9,%lo(_mcount); \ 81 jalr t9; \ 82 nop; \ 83 lw t9,4(sp); \ 84 addiu sp,sp,8; \ 85 addiu t9,t9,40; \ 86 .set pop; 87 88 #ifdef GPROF 89 #define MCOUNT _KERN_MCOUNT 90 #else 91 #define MCOUNT 92 #endif 93 94 #ifdef USE_AENT 95 #define AENT(x) \ 96 .aent x, 0 97 #else 98 #define AENT(x) 99 #endif 100 101 /* 102 * WEAK_ALIAS: create a weak alias. 103 */ 104 #define WEAK_ALIAS(alias,sym) \ 105 .weak alias; \ 106 alias = sym 107 /* 108 * STRONG_ALIAS: create a strong alias. 109 */ 110 #define STRONG_ALIAS(alias,sym) \ 111 .globl alias; \ 112 alias = sym 113 114 /* 115 * WARN_REFERENCES: create a warning if the specified symbol is referenced. 116 */ 117 #define WARN_REFERENCES(sym,msg) \ 118 .pushsection __CONCAT(.gnu.warning.,sym); \ 119 .ascii msg; \ 120 .popsection 121 122 /* 123 * STATIC_LEAF_NOPROFILE 124 * No profilable local leaf routine. 125 */ 126 #define STATIC_LEAF_NOPROFILE(x) \ 127 .ent _C_LABEL(x); \ 128 _C_LABEL(x): ; \ 129 .frame sp, 0, ra 130 131 /* 132 * LEAF_NOPROFILE 133 * No profilable leaf routine. 134 */ 135 #define LEAF_NOPROFILE(x) \ 136 .globl _C_LABEL(x); \ 137 STATIC_LEAF_NOPROFILE(x) 138 139 /* 140 * STATIC_LEAF 141 * Declare a local leaf function. 142 */ 143 #define STATIC_LEAF(x) \ 144 STATIC_LEAF_NOPROFILE(x); \ 145 MCOUNT 146 147 /* 148 * LEAF 149 * A leaf routine does 150 * - call no other function, 151 * - never use any register that callee-saved (S0-S8), and 152 * - not use any local stack storage. 153 */ 154 #define LEAF(x) \ 155 LEAF_NOPROFILE(x); \ 156 MCOUNT 157 158 /* 159 * STATIC_XLEAF 160 * declare alternate entry to a static leaf routine 161 */ 162 #define STATIC_XLEAF(x) \ 163 AENT (_C_LABEL(x)); \ 164 _C_LABEL(x): 165 166 /* 167 * XLEAF 168 * declare alternate entry to leaf routine 169 */ 170 #define XLEAF(x) \ 171 .globl _C_LABEL(x); \ 172 STATIC_XLEAF(x) 173 174 /* 175 * STATIC_NESTED_NOPROFILE 176 * No profilable local nested routine. 177 */ 178 #define STATIC_NESTED_NOPROFILE(x, fsize, retpc) \ 179 .ent _C_LABEL(x); \ 180 .type _C_LABEL(x), @function; \ 181 _C_LABEL(x): ; \ 182 .frame sp, fsize, retpc 183 184 /* 185 * NESTED_NOPROFILE 186 * No profilable nested routine. 187 */ 188 #define NESTED_NOPROFILE(x, fsize, retpc) \ 189 .globl _C_LABEL(x); \ 190 STATIC_NESTED_NOPROFILE(x, fsize, retpc) 191 192 /* 193 * NESTED 194 * A function calls other functions and needs 195 * therefore stack space to save/restore registers. 196 */ 197 #define NESTED(x, fsize, retpc) \ 198 NESTED_NOPROFILE(x, fsize, retpc); \ 199 MCOUNT 200 201 /* 202 * STATIC_NESTED 203 * No profilable local nested routine. 204 */ 205 #define STATIC_NESTED(x, fsize, retpc) \ 206 STATIC_NESTED_NOPROFILE(x, fsize, retpc); \ 207 MCOUNT 208 209 /* 210 * XNESTED 211 * declare alternate entry point to nested routine. 212 */ 213 #define XNESTED(x) \ 214 .globl _C_LABEL(x); \ 215 AENT (_C_LABEL(x)); \ 216 _C_LABEL(x): 217 218 /* 219 * END 220 * Mark end of a procedure. 221 */ 222 #define END(x) \ 223 .end _C_LABEL(x); \ 224 .size _C_LABEL(x), . - _C_LABEL(x) 225 226 /* 227 * IMPORT -- import external symbol 228 */ 229 #define IMPORT(sym, size) \ 230 .extern _C_LABEL(sym),size 231 232 /* 233 * EXPORT -- export definition of symbol 234 */ 235 #define EXPORT(x) \ 236 .globl _C_LABEL(x); \ 237 _C_LABEL(x): 238 239 /* 240 * EXPORT_OBJECT -- export definition of symbol of symbol 241 * type Object, visible to ksyms(4) address search. 242 */ 243 #define EXPORT_OBJECT(x) \ 244 EXPORT(x); \ 245 .type _C_LABEL(x), @object; 246 247 /* 248 * VECTOR 249 * exception vector entrypoint 250 * XXX: regmask should be used to generate .mask 251 */ 252 #define VECTOR(x, regmask) \ 253 .ent _C_LABEL(x); \ 254 EXPORT(x); \ 255 256 #define VECTOR_END(x) \ 257 EXPORT(__CONCAT(x,_end)); \ 258 END(x); \ 259 .org _C_LABEL(x) + 0x80 260 261 /* 262 * Macros to panic and printf from assembly language. 263 */ 264 #define PANIC(msg) \ 265 PTR_LA a0, 9f; \ 266 jal _C_LABEL(panic); \ 267 nop; \ 268 MSG(msg) 269 270 #define PRINTF(msg) \ 271 PTR_LA a0, 9f; \ 272 jal _C_LABEL(printf); \ 273 nop; \ 274 MSG(msg) 275 276 #define MSG(msg) \ 277 .rdata; \ 278 9: .asciz msg; \ 279 .text 280 281 #define ASMSTR(str) \ 282 .asciz str; \ 283 .align 3 284 285 #define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ 286 .asciz x; \ 287 .popsection 288 289 /* 290 * XXX retain dialects XXX 291 */ 292 #define ALEAF(x) XLEAF(x) 293 #define NLEAF(x) LEAF_NOPROFILE(x) 294 #define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc) 295 #define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc) 296 297 #if defined(__mips_o32) 298 #define SZREG 4 299 #else 300 #define SZREG 8 301 #endif 302 303 #if defined(__mips_o32) || defined(__mips_o64) 304 #define ALSK 7 /* stack alignment */ 305 #define ALMASK -7 /* stack alignment */ 306 #define SZFPREG 4 307 #define FP_L lwc1 308 #define FP_S swc1 309 #else 310 #define ALSK 15 /* stack alignment */ 311 #define ALMASK -15 /* stack alignment */ 312 #define SZFPREG 8 313 #define FP_L ldc1 314 #define FP_S sdc1 315 #endif 316 317 /* 318 * standard callframe { 319 * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64) 320 * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1) 321 * register_t cf_gp; global pointer (only on n32 and n64) 322 * register_t cf_sp; frame pointer 323 * register_t cf_ra; return address 324 * }; 325 */ 326 #if defined(__mips_o32) || defined(__mips_o64) 327 #define CALLFRAME_SIZ (SZREG * (4 + 2)) 328 #define CALLFRAME_S0 0 329 #elif defined(__mips_n32) || defined(__mips_n64) 330 #define CALLFRAME_SIZ (SZREG * 4) 331 #define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG) 332 #endif 333 #ifndef _KERNEL 334 #define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG) 335 #endif 336 #define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) 337 #define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) 338 339 /* 340 * While it would be nice to be compatible with the SGI 341 * REG_L and REG_S macros, because they do not take parameters, it 342 * is impossible to use them with the _MIPS_SIM_ABIX32 model. 343 * 344 * These macros hide the use of mips3 instructions from the 345 * assembler to prevent the assembler from generating 64-bit style 346 * ABI calls. 347 */ 348 #ifdef __mips_o32 349 #define PTR_ADD add 350 #define PTR_ADDI addi 351 #define PTR_ADDU addu 352 #define PTR_ADDIU addiu 353 #define PTR_SUB subu 354 #define PTR_SUBI subi 355 #define PTR_SUBU subu 356 #define PTR_SUBIU subu 357 #define PTR_L lw 358 #define PTR_LA la 359 #define PTR_S sw 360 #define PTR_SLL sll 361 #define PTR_SLLV sllv 362 #define PTR_SRL srl 363 #define PTR_SRLV srlv 364 #define PTR_SRA sra 365 #define PTR_SRAV srav 366 #define PTR_LL ll 367 #define PTR_SC sc 368 #define PTR_WORD .word 369 #define PTR_SCALESHIFT 2 370 #else /* _MIPS_SZPTR == 64 */ 371 #define PTR_ADD dadd 372 #define PTR_ADDI daddi 373 #define PTR_ADDU daddu 374 #define PTR_ADDIU daddiu 375 #define PTR_SUB dsubu 376 #define PTR_SUBI dsubi 377 #define PTR_SUBU dsubu 378 #define PTR_SUBIU dsubu 379 #ifdef __mips_n32 380 #define PTR_L lw 381 #define PTR_LL ll 382 #define PTR_SC sc 383 #define PTR_S sw 384 #define PTR_SCALESHIFT 2 385 #define PTR_WORD .word 386 #else 387 #define PTR_L ld 388 #define PTR_LL lld 389 #define PTR_SC scd 390 #define PTR_S sd 391 #define PTR_SCALESHIFT 3 392 #define PTR_WORD .dword 393 #endif 394 #define PTR_LA dla 395 #define PTR_SLL dsll 396 #define PTR_SLLV dsllv 397 #define PTR_SRL dsrl 398 #define PTR_SRLV dsrlv 399 #define PTR_SRA dsra 400 #define PTR_SRAV dsrav 401 #endif /* _MIPS_SZPTR == 64 */ 402 403 #if _MIPS_SZINT == 32 404 #define INT_ADD add 405 #define INT_ADDI addi 406 #define INT_ADDU addu 407 #define INT_ADDIU addiu 408 #define INT_SUB subu 409 #define INT_SUBI subi 410 #define INT_SUBU subu 411 #define INT_SUBIU subu 412 #define INT_L lw 413 #define INT_LA la 414 #define INT_S sw 415 #define INT_SLL sll 416 #define INT_SLLV sllv 417 #define INT_SRL srl 418 #define INT_SRLV srlv 419 #define INT_SRA sra 420 #define INT_SRAV srav 421 #define INT_LL ll 422 #define INT_SC sc 423 #define INT_WORD .word 424 #define INT_SCALESHIFT 2 425 #else 426 #define INT_ADD dadd 427 #define INT_ADDI daddi 428 #define INT_ADDU daddu 429 #define INT_ADDIU daddiu 430 #define INT_SUB dsubu 431 #define INT_SUBI dsubi 432 #define INT_SUBU dsubu 433 #define INT_SUBIU dsubu 434 #define INT_L ld 435 #define INT_LA dla 436 #define INT_S sd 437 #define INT_SLL dsll 438 #define INT_SLLV dsllv 439 #define INT_SRL dsrl 440 #define INT_SRLV dsrlv 441 #define INT_SRA dsra 442 #define INT_SRAV dsrav 443 #define INT_LL lld 444 #define INT_SC scd 445 #define INT_WORD .dword 446 #define INT_SCALESHIFT 3 447 #endif 448 449 #if _MIPS_SZLONG == 32 450 #define LONG_ADD add 451 #define LONG_ADDI addi 452 #define LONG_ADDU addu 453 #define LONG_ADDIU addiu 454 #define LONG_SUB subu 455 #define LONG_SUBI subi 456 #define LONG_SUBU subu 457 #define LONG_SUBIU subu 458 #define LONG_L lw 459 #define LONG_LA la 460 #define LONG_S sw 461 #define LONG_SLL sll 462 #define LONG_SLLV sllv 463 #define LONG_SRL srl 464 #define LONG_SRLV srlv 465 #define LONG_SRA sra 466 #define LONG_SRAV srav 467 #define LONG_LL ll 468 #define LONG_SC sc 469 #define LONG_WORD .word 470 #define LONG_SCALESHIFT 2 471 #else 472 #define LONG_ADD dadd 473 #define LONG_ADDI daddi 474 #define LONG_ADDU daddu 475 #define LONG_ADDIU daddiu 476 #define LONG_SUB dsubu 477 #define LONG_SUBI dsubi 478 #define LONG_SUBU dsubu 479 #define LONG_SUBIU dsubu 480 #define LONG_L ld 481 #define LONG_LA dla 482 #define LONG_S sd 483 #define LONG_SLL dsll 484 #define LONG_SLLV dsllv 485 #define LONG_SRL dsrl 486 #define LONG_SRLV dsrlv 487 #define LONG_SRA dsra 488 #define LONG_SRAV dsrav 489 #define LONG_LL lld 490 #define LONG_SC scd 491 #define LONG_WORD .dword 492 #define LONG_SCALESHIFT 3 493 #endif 494 495 #if SZREG == 4 496 #define REG_L lw 497 #define REG_S sw 498 #define REG_LI li 499 #define REG_ADDU addu 500 #define REG_SLL sll 501 #define REG_SLLV sllv 502 #define REG_SRL srl 503 #define REG_SRLV srlv 504 #define REG_SRA sra 505 #define REG_SRAV srav 506 #define REG_LL ll 507 #define REG_SC sc 508 #define REG_SCALESHIFT 2 509 #else 510 #define REG_L ld 511 #define REG_S sd 512 #define REG_LI dli 513 #define REG_ADDU daddu 514 #define REG_SLL dsll 515 #define REG_SLLV dsllv 516 #define REG_SRL dsrl 517 #define REG_SRLV dsrlv 518 #define REG_SRA dsra 519 #define REG_SRAV dsrav 520 #define REG_LL lld 521 #define REG_SC scd 522 #define REG_SCALESHIFT 3 523 #endif 524 525 #if (MIPS1 + MIPS2) > 0 526 #define NOP_L nop 527 #else 528 #define NOP_L /* nothing */ 529 #endif 530 531 /* compiler define */ 532 #if defined(__OCTEON__) 533 /* early cnMIPS have erratum which means 2 */ 534 #define LLSCSYNC sync 4; sync 4 535 #define SYNC sync 4 /* sync 4 == syncw - sync all writes */ 536 #define BDSYNC sync 4 /* sync 4 == syncw - sync all writes */ 537 #elif __mips >= 3 || !defined(__mips_o32) 538 #define LLSCSYNC sync 539 #define SYNC sync 540 #define BDSYNC sync 541 #else 542 #define LLSCSYNC /* nothing */ 543 #define SYNC /* nothing */ 544 #define BDSYNC nop 545 #endif 546 547 /* CPU dependent hook for cp0 load delays */ 548 #if defined(MIPS1) || defined(MIPS2) || defined(MIPS3) 549 #define MFC0_HAZARD sll $0,$0,1 /* super scalar nop */ 550 #else 551 #define MFC0_HAZARD /* nothing */ 552 #endif 553 554 #if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \ 555 _MIPS_ISA == _MIPS_ISA_MIPS32 556 #define MFC0 mfc0 557 #define MTC0 mtc0 558 #endif 559 #if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \ 560 _MIPS_ISA == _MIPS_ISA_MIPS64 561 #define MFC0 dmfc0 562 #define MTC0 dmtc0 563 #endif 564 565 #if defined(__mips_o32) || defined(__mips_o64) 566 567 #ifdef __mips_abicalls 568 #define CPRESTORE(r) .cprestore r 569 #define CPLOAD(r) .cpload r 570 #else 571 #define CPRESTORE(r) /* not needed */ 572 #define CPLOAD(r) /* not needed */ 573 #endif 574 575 #define SETUP_GP \ 576 .set push; \ 577 .set noreorder; \ 578 .cpload t9; \ 579 .set pop 580 #define SETUP_GPX(r) \ 581 .set push; \ 582 .set noreorder; \ 583 move r,ra; /* save old ra */ \ 584 bal 7f; \ 585 nop; \ 586 7: .cpload ra; \ 587 move ra,r; \ 588 .set pop 589 #define SETUP_GPX_L(r,lbl) \ 590 .set push; \ 591 .set noreorder; \ 592 move r,ra; /* save old ra */ \ 593 bal lbl; \ 594 nop; \ 595 lbl: .cpload ra; \ 596 move ra,r; \ 597 .set pop 598 #define SAVE_GP(x) .cprestore x 599 600 #define SETUP_GP64(a,b) /* n32/n64 specific */ 601 #define SETUP_GP64_R(a,b) /* n32/n64 specific */ 602 #define SETUP_GPX64(a,b) /* n32/n64 specific */ 603 #define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */ 604 #define RESTORE_GP64 /* n32/n64 specific */ 605 #define USE_ALT_CP(a) /* n32/n64 specific */ 606 #endif /* __mips_o32 || __mips_o64 */ 607 608 #if defined(__mips_o32) || defined(__mips_o64) 609 #define REG_PROLOGUE .set push 610 #define REG_EPILOGUE .set pop 611 #endif 612 #if defined(__mips_n32) || defined(__mips_n64) 613 #define REG_PROLOGUE .set push ; .set mips3 614 #define REG_EPILOGUE .set pop 615 #endif 616 617 #if defined(__mips_n32) || defined(__mips_n64) 618 #define SETUP_GP /* o32 specific */ 619 #define SETUP_GPX(r) /* o32 specific */ 620 #define SETUP_GPX_L(r,lbl) /* o32 specific */ 621 #define SAVE_GP(x) /* o32 specific */ 622 #define SETUP_GP64(a,b) .cpsetup t9, a, b 623 #define SETUP_GPX64(a,b) \ 624 .set push; \ 625 move b,ra; \ 626 .set noreorder; \ 627 bal 7f; \ 628 nop; \ 629 7: .set pop; \ 630 .cpsetup ra, a, 7b; \ 631 move ra,b 632 #define SETUP_GPX64_L(a,b,c) \ 633 .set push; \ 634 move b,ra; \ 635 .set noreorder; \ 636 bal c; \ 637 nop; \ 638 c: .set pop; \ 639 .cpsetup ra, a, c; \ 640 move ra,b 641 #define RESTORE_GP64 .cpreturn 642 #define USE_ALT_CP(a) .cplocal a 643 #endif /* __mips_n32 || __mips_n64 */ 644 645 /* 646 * The DYNAMIC_STATUS_MASK option adds an additional masking operation 647 * when updating the hardware interrupt mask in the status register. 648 * 649 * This is useful for platforms that need to at run-time mask 650 * interrupts based on motherboard configuration or to handle 651 * slowly clearing interrupts. 652 * 653 * XXX this is only currently implemented for mips3. 654 */ 655 #ifdef MIPS_DYNAMIC_STATUS_MASK 656 #define DYNAMIC_STATUS_MASK(sr,scratch) \ 657 lw scratch, mips_dynamic_status_mask; \ 658 and sr, sr, scratch 659 660 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) \ 661 ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \ 662 DYNAMIC_STATUS_MASK(sr,scratch1) 663 #else 664 #define DYNAMIC_STATUS_MASK(sr,scratch) 665 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) 666 #endif 667 668 /* See lock_stubs.S. */ 669 #define LOG2_MIPS_LOCK_RAS_SIZE 8 670 #define MIPS_LOCK_RAS_SIZE 256 /* 16 bytes left over */ 671 672 #define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off) 673 674 #endif /* _MIPS_ASM_H */ 675
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