asm.h revision 1.64
1 /* $NetBSD: asm.h,v 1.64 2021/02/16 06:06:58 simonb Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93 35 */ 36 37 /* 38 * machAsmDefs.h -- 39 * 40 * Macros used when writing assembler programs. 41 * 42 * Copyright (C) 1989 Digital Equipment Corporation. 43 * Permission to use, copy, modify, and distribute this software and 44 * its documentation for any purpose and without fee is hereby granted, 45 * provided that the above copyright notice appears in all copies. 46 * Digital Equipment Corporation makes no representations about the 47 * suitability of this software for any purpose. It is provided "as is" 48 * without express or implied warranty. 49 * 50 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h, 51 * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) 52 */ 53 54 #ifndef _MIPS_ASM_H 55 #define _MIPS_ASM_H 56 57 #include <sys/cdefs.h> /* for API selection */ 58 #include <mips/regdef.h> 59 60 #if defined(_KERNEL_OPT) 61 #include "opt_gprof.h" 62 #endif 63 64 #define __BIT(n) (1 << (n)) 65 #define __BITS(hi,lo) ((~((~0)<<((hi)+1)))&((~0)<<(lo))) 66 67 #define __LOWEST_SET_BIT(__mask) ((((__mask) - 1) & (__mask)) ^ (__mask)) 68 #define __SHIFTOUT(__x, __mask) (((__x) & (__mask)) / __LOWEST_SET_BIT(__mask)) 69 #define __SHIFTIN(__x, __mask) ((__x) * __LOWEST_SET_BIT(__mask)) 70 71 /* 72 * Define -pg profile entry code. 73 * Must always be noreorder, must never use a macro instruction. 74 */ 75 #if defined(__mips_o32) /* Old 32-bit ABI */ 76 /* 77 * The old ABI version must also decrement two less words off the 78 * stack and the final addiu to t9 must always equal the size of this 79 * _KERN_MCOUNT. 80 */ 81 #define _KERN_MCOUNT \ 82 .set push; \ 83 .set noreorder; \ 84 .set noat; \ 85 subu sp,16; \ 86 sw t9,12(sp); \ 87 move AT,ra; \ 88 lui t9,%hi(_mcount); \ 89 addiu t9,t9,%lo(_mcount); \ 90 jalr t9; \ 91 nop; \ 92 lw t9,4(sp); \ 93 addiu sp,8; \ 94 addiu t9,40; \ 95 .set pop; 96 #elif defined(__mips_o64) /* Old 64-bit ABI */ 97 # error yeahnah 98 #else /* New (n32/n64) ABI */ 99 /* 100 * The new ABI version just needs to put the return address in AT and 101 * call _mcount(). 102 */ 103 #define _KERN_MCOUNT \ 104 .set push; \ 105 .set noreorder; \ 106 .set noat; \ 107 move AT,ra; \ 108 jal _mcount; \ 109 nop; \ 110 .set pop; 111 #endif /* n32/n64 */ 112 113 #ifdef GPROF 114 #define MCOUNT _KERN_MCOUNT 115 #else 116 #define MCOUNT 117 #endif 118 119 #ifdef USE_AENT 120 #define AENT(x) \ 121 .aent x, 0 122 #else 123 #define AENT(x) 124 #endif 125 126 /* 127 * WEAK_ALIAS: create a weak alias. 128 */ 129 #define WEAK_ALIAS(alias,sym) \ 130 .weak alias; \ 131 alias = sym 132 /* 133 * STRONG_ALIAS: create a strong alias. 134 */ 135 #define STRONG_ALIAS(alias,sym) \ 136 .globl alias; \ 137 alias = sym 138 139 /* 140 * WARN_REFERENCES: create a warning if the specified symbol is referenced. 141 */ 142 #define WARN_REFERENCES(sym,msg) \ 143 .pushsection __CONCAT(.gnu.warning.,sym); \ 144 .ascii msg; \ 145 .popsection 146 147 /* 148 * STATIC_LEAF_NOPROFILE 149 * No profilable local leaf routine. 150 */ 151 #define STATIC_LEAF_NOPROFILE(x) \ 152 .ent _C_LABEL(x); \ 153 _C_LABEL(x): ; \ 154 .frame sp, 0, ra 155 156 /* 157 * LEAF_NOPROFILE 158 * No profilable leaf routine. 159 */ 160 #define LEAF_NOPROFILE(x) \ 161 .globl _C_LABEL(x); \ 162 STATIC_LEAF_NOPROFILE(x) 163 164 /* 165 * STATIC_LEAF 166 * Declare a local leaf function. 167 */ 168 #define STATIC_LEAF(x) \ 169 STATIC_LEAF_NOPROFILE(x); \ 170 MCOUNT 171 172 /* 173 * LEAF 174 * A leaf routine does 175 * - call no other function, 176 * - never use any register that callee-saved (S0-S8), and 177 * - not use any local stack storage. 178 */ 179 #define LEAF(x) \ 180 LEAF_NOPROFILE(x); \ 181 MCOUNT 182 183 /* 184 * STATIC_XLEAF 185 * declare alternate entry to a static leaf routine 186 */ 187 #define STATIC_XLEAF(x) \ 188 AENT (_C_LABEL(x)); \ 189 _C_LABEL(x): 190 191 /* 192 * XLEAF 193 * declare alternate entry to leaf routine 194 */ 195 #define XLEAF(x) \ 196 .globl _C_LABEL(x); \ 197 STATIC_XLEAF(x) 198 199 /* 200 * STATIC_NESTED_NOPROFILE 201 * No profilable local nested routine. 202 */ 203 #define STATIC_NESTED_NOPROFILE(x, fsize, retpc) \ 204 .ent _C_LABEL(x); \ 205 .type _C_LABEL(x), @function; \ 206 _C_LABEL(x): ; \ 207 .frame sp, fsize, retpc 208 209 /* 210 * NESTED_NOPROFILE 211 * No profilable nested routine. 212 */ 213 #define NESTED_NOPROFILE(x, fsize, retpc) \ 214 .globl _C_LABEL(x); \ 215 STATIC_NESTED_NOPROFILE(x, fsize, retpc) 216 217 /* 218 * NESTED 219 * A function calls other functions and needs 220 * therefore stack space to save/restore registers. 221 */ 222 #define NESTED(x, fsize, retpc) \ 223 NESTED_NOPROFILE(x, fsize, retpc); \ 224 MCOUNT 225 226 /* 227 * STATIC_NESTED 228 * No profilable local nested routine. 229 */ 230 #define STATIC_NESTED(x, fsize, retpc) \ 231 STATIC_NESTED_NOPROFILE(x, fsize, retpc); \ 232 MCOUNT 233 234 /* 235 * XNESTED 236 * declare alternate entry point to nested routine. 237 */ 238 #define XNESTED(x) \ 239 .globl _C_LABEL(x); \ 240 AENT (_C_LABEL(x)); \ 241 _C_LABEL(x): 242 243 /* 244 * END 245 * Mark end of a procedure. 246 */ 247 #define END(x) \ 248 .end _C_LABEL(x); \ 249 .size _C_LABEL(x), . - _C_LABEL(x) 250 251 /* 252 * IMPORT -- import external symbol 253 */ 254 #define IMPORT(sym, size) \ 255 .extern _C_LABEL(sym),size 256 257 /* 258 * EXPORT -- export definition of symbol 259 */ 260 #define EXPORT(x) \ 261 .globl _C_LABEL(x); \ 262 _C_LABEL(x): 263 264 /* 265 * EXPORT_OBJECT -- export definition of symbol of symbol 266 * type Object, visible to ksyms(4) address search. 267 */ 268 #define EXPORT_OBJECT(x) \ 269 EXPORT(x); \ 270 .type _C_LABEL(x), @object; 271 272 /* 273 * VECTOR 274 * exception vector entrypoint 275 * XXX: regmask should be used to generate .mask 276 */ 277 #define VECTOR(x, regmask) \ 278 .ent _C_LABEL(x); \ 279 EXPORT(x); \ 280 281 #define VECTOR_END(x) \ 282 EXPORT(__CONCAT(x,_end)); \ 283 END(x); \ 284 .org _C_LABEL(x) + 0x80 285 286 /* 287 * Macros to panic and printf from assembly language. 288 */ 289 #define PANIC(msg) \ 290 PTR_LA a0, 9f; \ 291 jal _C_LABEL(panic); \ 292 nop; \ 293 MSG(msg) 294 295 #define PRINTF(msg) \ 296 PTR_LA a0, 9f; \ 297 jal _C_LABEL(printf); \ 298 nop; \ 299 MSG(msg) 300 301 #define MSG(msg) \ 302 .rdata; \ 303 9: .asciz msg; \ 304 .text 305 306 #define ASMSTR(str) \ 307 .asciz str; \ 308 .align 3 309 310 #define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ 311 .asciz x; \ 312 .popsection 313 314 /* 315 * XXX retain dialects XXX 316 */ 317 #define ALEAF(x) XLEAF(x) 318 #define NLEAF(x) LEAF_NOPROFILE(x) 319 #define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc) 320 #define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc) 321 322 #if defined(__mips_o32) 323 #define SZREG 4 324 #else 325 #define SZREG 8 326 #endif 327 328 #if defined(__mips_o32) || defined(__mips_o64) 329 #define ALSK 7 /* stack alignment */ 330 #define ALMASK -7 /* stack alignment */ 331 #define SZFPREG 4 332 #define FP_L lwc1 333 #define FP_S swc1 334 #else 335 #define ALSK 15 /* stack alignment */ 336 #define ALMASK -15 /* stack alignment */ 337 #define SZFPREG 8 338 #define FP_L ldc1 339 #define FP_S sdc1 340 #endif 341 342 /* 343 * standard callframe { 344 * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64) 345 * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1) 346 * register_t cf_gp; global pointer (only on n32 and n64) 347 * register_t cf_sp; frame pointer 348 * register_t cf_ra; return address 349 * }; 350 */ 351 #if defined(__mips_o32) || defined(__mips_o64) 352 #define CALLFRAME_SIZ (SZREG * (4 + 2)) 353 #define CALLFRAME_S0 0 354 #elif defined(__mips_n32) || defined(__mips_n64) 355 #define CALLFRAME_SIZ (SZREG * 4) 356 #define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG) 357 #endif 358 #ifndef _KERNEL 359 #define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG) 360 #endif 361 #define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) 362 #define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) 363 364 /* 365 * While it would be nice to be compatible with the SGI 366 * REG_L and REG_S macros, because they do not take parameters, it 367 * is impossible to use them with the _MIPS_SIM_ABIX32 model. 368 * 369 * These macros hide the use of mips3 instructions from the 370 * assembler to prevent the assembler from generating 64-bit style 371 * ABI calls. 372 */ 373 #ifdef __mips_o32 374 #define PTR_ADD add 375 #define PTR_ADDI addi 376 #define PTR_ADDU addu 377 #define PTR_ADDIU addiu 378 #define PTR_SUB subu 379 #define PTR_SUBI subi 380 #define PTR_SUBU subu 381 #define PTR_SUBIU subu 382 #define PTR_L lw 383 #define PTR_LA la 384 #define PTR_S sw 385 #define PTR_SLL sll 386 #define PTR_SLLV sllv 387 #define PTR_SRL srl 388 #define PTR_SRLV srlv 389 #define PTR_SRA sra 390 #define PTR_SRAV srav 391 #define PTR_LL ll 392 #define PTR_SC sc 393 #define PTR_WORD .word 394 #define PTR_SCALESHIFT 2 395 #else /* _MIPS_SZPTR == 64 */ 396 #define PTR_ADD dadd 397 #define PTR_ADDI daddi 398 #define PTR_ADDU daddu 399 #define PTR_ADDIU daddiu 400 #define PTR_SUB dsubu 401 #define PTR_SUBI dsubi 402 #define PTR_SUBU dsubu 403 #define PTR_SUBIU dsubu 404 #ifdef __mips_n32 405 #define PTR_L lw 406 #define PTR_LL ll 407 #define PTR_SC sc 408 #define PTR_S sw 409 #define PTR_SCALESHIFT 2 410 #define PTR_WORD .word 411 #else 412 #define PTR_L ld 413 #define PTR_LL lld 414 #define PTR_SC scd 415 #define PTR_S sd 416 #define PTR_SCALESHIFT 3 417 #define PTR_WORD .dword 418 #endif 419 #define PTR_LA dla 420 #define PTR_SLL dsll 421 #define PTR_SLLV dsllv 422 #define PTR_SRL dsrl 423 #define PTR_SRLV dsrlv 424 #define PTR_SRA dsra 425 #define PTR_SRAV dsrav 426 #endif /* _MIPS_SZPTR == 64 */ 427 428 #if _MIPS_SZINT == 32 429 #define INT_ADD add 430 #define INT_ADDI addi 431 #define INT_ADDU addu 432 #define INT_ADDIU addiu 433 #define INT_SUB subu 434 #define INT_SUBI subi 435 #define INT_SUBU subu 436 #define INT_SUBIU subu 437 #define INT_L lw 438 #define INT_LA la 439 #define INT_S sw 440 #define INT_SLL sll 441 #define INT_SLLV sllv 442 #define INT_SRL srl 443 #define INT_SRLV srlv 444 #define INT_SRA sra 445 #define INT_SRAV srav 446 #define INT_LL ll 447 #define INT_SC sc 448 #define INT_WORD .word 449 #define INT_SCALESHIFT 2 450 #else 451 #define INT_ADD dadd 452 #define INT_ADDI daddi 453 #define INT_ADDU daddu 454 #define INT_ADDIU daddiu 455 #define INT_SUB dsubu 456 #define INT_SUBI dsubi 457 #define INT_SUBU dsubu 458 #define INT_SUBIU dsubu 459 #define INT_L ld 460 #define INT_LA dla 461 #define INT_S sd 462 #define INT_SLL dsll 463 #define INT_SLLV dsllv 464 #define INT_SRL dsrl 465 #define INT_SRLV dsrlv 466 #define INT_SRA dsra 467 #define INT_SRAV dsrav 468 #define INT_LL lld 469 #define INT_SC scd 470 #define INT_WORD .dword 471 #define INT_SCALESHIFT 3 472 #endif 473 474 #if _MIPS_SZLONG == 32 475 #define LONG_ADD add 476 #define LONG_ADDI addi 477 #define LONG_ADDU addu 478 #define LONG_ADDIU addiu 479 #define LONG_SUB subu 480 #define LONG_SUBI subi 481 #define LONG_SUBU subu 482 #define LONG_SUBIU subu 483 #define LONG_L lw 484 #define LONG_LA la 485 #define LONG_S sw 486 #define LONG_SLL sll 487 #define LONG_SLLV sllv 488 #define LONG_SRL srl 489 #define LONG_SRLV srlv 490 #define LONG_SRA sra 491 #define LONG_SRAV srav 492 #define LONG_LL ll 493 #define LONG_SC sc 494 #define LONG_WORD .word 495 #define LONG_SCALESHIFT 2 496 #else 497 #define LONG_ADD dadd 498 #define LONG_ADDI daddi 499 #define LONG_ADDU daddu 500 #define LONG_ADDIU daddiu 501 #define LONG_SUB dsubu 502 #define LONG_SUBI dsubi 503 #define LONG_SUBU dsubu 504 #define LONG_SUBIU dsubu 505 #define LONG_L ld 506 #define LONG_LA dla 507 #define LONG_S sd 508 #define LONG_SLL dsll 509 #define LONG_SLLV dsllv 510 #define LONG_SRL dsrl 511 #define LONG_SRLV dsrlv 512 #define LONG_SRA dsra 513 #define LONG_SRAV dsrav 514 #define LONG_LL lld 515 #define LONG_SC scd 516 #define LONG_WORD .dword 517 #define LONG_SCALESHIFT 3 518 #endif 519 520 #if SZREG == 4 521 #define REG_L lw 522 #define REG_S sw 523 #define REG_LI li 524 #define REG_ADDU addu 525 #define REG_SLL sll 526 #define REG_SLLV sllv 527 #define REG_SRL srl 528 #define REG_SRLV srlv 529 #define REG_SRA sra 530 #define REG_SRAV srav 531 #define REG_LL ll 532 #define REG_SC sc 533 #define REG_SCALESHIFT 2 534 #else 535 #define REG_L ld 536 #define REG_S sd 537 #define REG_LI dli 538 #define REG_ADDU daddu 539 #define REG_SLL dsll 540 #define REG_SLLV dsllv 541 #define REG_SRL dsrl 542 #define REG_SRLV dsrlv 543 #define REG_SRA dsra 544 #define REG_SRAV dsrav 545 #define REG_LL lld 546 #define REG_SC scd 547 #define REG_SCALESHIFT 3 548 #endif 549 550 #if (MIPS1 + MIPS2) > 0 551 #define NOP_L nop 552 #else 553 #define NOP_L /* nothing */ 554 #endif 555 556 /* compiler define */ 557 #if defined(__OCTEON__) 558 /* early cnMIPS have erratum which means 2 */ 559 #define LLSCSYNC sync 4; sync 4 560 #define SYNC sync 4 /* sync 4 == syncw - sync all writes */ 561 #define BDSYNC sync 4 /* sync 4 == syncw - sync all writes */ 562 #elif __mips >= 3 || !defined(__mips_o32) 563 #define LLSCSYNC sync 564 #define SYNC sync 565 #define BDSYNC sync 566 #else 567 #define LLSCSYNC /* nothing */ 568 #define SYNC /* nothing */ 569 #define BDSYNC nop 570 #endif 571 572 /* CPU dependent hook for cp0 load delays */ 573 #if defined(MIPS1) || defined(MIPS2) || defined(MIPS3) 574 #define MFC0_HAZARD sll $0,$0,1 /* super scalar nop */ 575 #else 576 #define MFC0_HAZARD /* nothing */ 577 #endif 578 579 #if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \ 580 _MIPS_ISA == _MIPS_ISA_MIPS32 581 #define MFC0 mfc0 582 #define MTC0 mtc0 583 #endif 584 #if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \ 585 _MIPS_ISA == _MIPS_ISA_MIPS64 586 #define MFC0 dmfc0 587 #define MTC0 dmtc0 588 #endif 589 590 #if defined(__mips_o32) || defined(__mips_o64) 591 592 #ifdef __mips_abicalls 593 #define CPRESTORE(r) .cprestore r 594 #define CPLOAD(r) .cpload r 595 #else 596 #define CPRESTORE(r) /* not needed */ 597 #define CPLOAD(r) /* not needed */ 598 #endif 599 600 #define SETUP_GP \ 601 .set push; \ 602 .set noreorder; \ 603 .cpload t9; \ 604 .set pop 605 #define SETUP_GPX(r) \ 606 .set push; \ 607 .set noreorder; \ 608 move r,ra; /* save old ra */ \ 609 bal 7f; \ 610 nop; \ 611 7: .cpload ra; \ 612 move ra,r; \ 613 .set pop 614 #define SETUP_GPX_L(r,lbl) \ 615 .set push; \ 616 .set noreorder; \ 617 move r,ra; /* save old ra */ \ 618 bal lbl; \ 619 nop; \ 620 lbl: .cpload ra; \ 621 move ra,r; \ 622 .set pop 623 #define SAVE_GP(x) .cprestore x 624 625 #define SETUP_GP64(a,b) /* n32/n64 specific */ 626 #define SETUP_GP64_R(a,b) /* n32/n64 specific */ 627 #define SETUP_GPX64(a,b) /* n32/n64 specific */ 628 #define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */ 629 #define RESTORE_GP64 /* n32/n64 specific */ 630 #define USE_ALT_CP(a) /* n32/n64 specific */ 631 #endif /* __mips_o32 || __mips_o64 */ 632 633 #if defined(__mips_o32) || defined(__mips_o64) 634 #define REG_PROLOGUE .set push 635 #define REG_EPILOGUE .set pop 636 #endif 637 #if defined(__mips_n32) || defined(__mips_n64) 638 #define REG_PROLOGUE .set push ; .set mips3 639 #define REG_EPILOGUE .set pop 640 #endif 641 642 #if defined(__mips_n32) || defined(__mips_n64) 643 #define SETUP_GP /* o32 specific */ 644 #define SETUP_GPX(r) /* o32 specific */ 645 #define SETUP_GPX_L(r,lbl) /* o32 specific */ 646 #define SAVE_GP(x) /* o32 specific */ 647 #define SETUP_GP64(a,b) .cpsetup t9, a, b 648 #define SETUP_GPX64(a,b) \ 649 .set push; \ 650 move b,ra; \ 651 .set noreorder; \ 652 bal 7f; \ 653 nop; \ 654 7: .set pop; \ 655 .cpsetup ra, a, 7b; \ 656 move ra,b 657 #define SETUP_GPX64_L(a,b,c) \ 658 .set push; \ 659 move b,ra; \ 660 .set noreorder; \ 661 bal c; \ 662 nop; \ 663 c: .set pop; \ 664 .cpsetup ra, a, c; \ 665 move ra,b 666 #define RESTORE_GP64 .cpreturn 667 #define USE_ALT_CP(a) .cplocal a 668 #endif /* __mips_n32 || __mips_n64 */ 669 670 /* 671 * The DYNAMIC_STATUS_MASK option adds an additional masking operation 672 * when updating the hardware interrupt mask in the status register. 673 * 674 * This is useful for platforms that need to at run-time mask 675 * interrupts based on motherboard configuration or to handle 676 * slowly clearing interrupts. 677 * 678 * XXX this is only currently implemented for mips3. 679 */ 680 #ifdef MIPS_DYNAMIC_STATUS_MASK 681 #define DYNAMIC_STATUS_MASK(sr,scratch) \ 682 lw scratch, mips_dynamic_status_mask; \ 683 and sr, sr, scratch 684 685 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) \ 686 ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \ 687 DYNAMIC_STATUS_MASK(sr,scratch1) 688 #else 689 #define DYNAMIC_STATUS_MASK(sr,scratch) 690 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) 691 #endif 692 693 /* See lock_stubs.S. */ 694 #define LOG2_MIPS_LOCK_RAS_SIZE 8 695 #define MIPS_LOCK_RAS_SIZE 256 /* 16 bytes left over */ 696 697 #define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off) 698 699 #endif /* _MIPS_ASM_H */ 700
Indexes created Tue Sep 23 02:09:52 GMT 2025