asm.h revision 1.68
1 /* $NetBSD: asm.h,v 1.68 2022/02/27 19:22:12 riastradh Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93 35 */ 36 37 /* 38 * machAsmDefs.h -- 39 * 40 * Macros used when writing assembler programs. 41 * 42 * Copyright (C) 1989 Digital Equipment Corporation. 43 * Permission to use, copy, modify, and distribute this software and 44 * its documentation for any purpose and without fee is hereby granted, 45 * provided that the above copyright notice appears in all copies. 46 * Digital Equipment Corporation makes no representations about the 47 * suitability of this software for any purpose. It is provided "as is" 48 * without express or implied warranty. 49 * 50 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h, 51 * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) 52 */ 53 54 #ifndef _MIPS_ASM_H 55 #define _MIPS_ASM_H 56 57 #include <sys/cdefs.h> /* for API selection */ 58 #include <mips/regdef.h> 59 60 #if defined(_KERNEL_OPT) 61 #include "opt_gprof.h" 62 #endif 63 64 #define __BIT(n) (1 << (n)) 65 #define __BITS(hi,lo) ((~((~0)<<((hi)+1)))&((~0)<<(lo))) 66 67 #define __LOWEST_SET_BIT(__mask) ((((__mask) - 1) & (__mask)) ^ (__mask)) 68 #define __SHIFTOUT(__x, __mask) (((__x) & (__mask)) / __LOWEST_SET_BIT(__mask)) 69 #define __SHIFTIN(__x, __mask) ((__x) * __LOWEST_SET_BIT(__mask)) 70 71 /* 72 * Define -pg profile entry code. 73 * Must always be noreorder, must never use a macro instruction. 74 */ 75 #if defined(__mips_o32) /* Old 32-bit ABI */ 76 /* 77 * The old ABI version must also decrement two less words off the 78 * stack and the final addiu to t9 must always equal the size of this 79 * _MIPS_ASM_MCOUNT. 80 */ 81 #define _MIPS_ASM_MCOUNT \ 82 .set push; \ 83 .set noreorder; \ 84 .set noat; \ 85 subu sp,16; \ 86 sw t9,12(sp); \ 87 move AT,ra; \ 88 lui t9,%hi(_mcount); \ 89 addiu t9,t9,%lo(_mcount); \ 90 jalr t9; \ 91 nop; \ 92 lw t9,4(sp); \ 93 addiu sp,8; \ 94 addiu t9,40; \ 95 .set pop; 96 #elif defined(__mips_o64) /* Old 64-bit ABI */ 97 # error yeahnah 98 #else /* New (n32/n64) ABI */ 99 /* 100 * The new ABI version just needs to put the return address in AT and 101 * call _mcount(). For the no abicalls case, skip the reloc dance. 102 */ 103 #ifdef __mips_abicalls 104 #define _MIPS_ASM_MCOUNT \ 105 .set push; \ 106 .set noreorder; \ 107 .set noat; \ 108 subu sp,16; \ 109 sw t9,8(sp); \ 110 move AT,ra; \ 111 lui t9,%hi(_mcount); \ 112 addiu t9,t9,%lo(_mcount); \ 113 jalr t9; \ 114 nop; \ 115 lw t9,8(sp); \ 116 addiu sp,16; \ 117 .set pop; 118 #else /* !__mips_abicalls */ 119 #define _MIPS_ASM_MCOUNT \ 120 .set push; \ 121 .set noreorder; \ 122 .set noat; \ 123 move AT,ra; \ 124 jal _mcount; \ 125 nop; \ 126 .set pop; 127 #endif /* !__mips_abicalls */ 128 #endif /* n32/n64 */ 129 130 #ifdef GPROF 131 #define MCOUNT _MIPS_ASM_MCOUNT 132 #else 133 #define MCOUNT 134 #endif 135 136 #ifdef USE_AENT 137 #define AENT(x) \ 138 .aent x, 0 139 #else 140 #define AENT(x) 141 #endif 142 143 /* 144 * WEAK_ALIAS: create a weak alias. 145 */ 146 #define WEAK_ALIAS(alias,sym) \ 147 .weak alias; \ 148 alias = sym 149 /* 150 * STRONG_ALIAS: create a strong alias. 151 */ 152 #define STRONG_ALIAS(alias,sym) \ 153 .globl alias; \ 154 alias = sym 155 156 /* 157 * WARN_REFERENCES: create a warning if the specified symbol is referenced. 158 */ 159 #define WARN_REFERENCES(sym,msg) \ 160 .pushsection __CONCAT(.gnu.warning.,sym); \ 161 .ascii msg; \ 162 .popsection 163 164 /* 165 * STATIC_LEAF_NOPROFILE 166 * No profilable local leaf routine. 167 */ 168 #define STATIC_LEAF_NOPROFILE(x) \ 169 .ent _C_LABEL(x); \ 170 _C_LABEL(x): ; \ 171 .frame sp, 0, ra 172 173 /* 174 * LEAF_NOPROFILE 175 * No profilable leaf routine. 176 */ 177 #define LEAF_NOPROFILE(x) \ 178 .globl _C_LABEL(x); \ 179 STATIC_LEAF_NOPROFILE(x) 180 181 /* 182 * STATIC_LEAF 183 * Declare a local leaf function. 184 */ 185 #define STATIC_LEAF(x) \ 186 STATIC_LEAF_NOPROFILE(x); \ 187 MCOUNT 188 189 /* 190 * LEAF 191 * A leaf routine does 192 * - call no other function, 193 * - never use any register that callee-saved (S0-S8), and 194 * - not use any local stack storage. 195 */ 196 #define LEAF(x) \ 197 LEAF_NOPROFILE(x); \ 198 MCOUNT 199 200 /* 201 * STATIC_XLEAF 202 * declare alternate entry to a static leaf routine 203 */ 204 #define STATIC_XLEAF(x) \ 205 AENT (_C_LABEL(x)); \ 206 _C_LABEL(x): 207 208 /* 209 * XLEAF 210 * declare alternate entry to leaf routine 211 */ 212 #define XLEAF(x) \ 213 .globl _C_LABEL(x); \ 214 STATIC_XLEAF(x) 215 216 /* 217 * STATIC_NESTED_NOPROFILE 218 * No profilable local nested routine. 219 */ 220 #define STATIC_NESTED_NOPROFILE(x, fsize, retpc) \ 221 .ent _C_LABEL(x); \ 222 .type _C_LABEL(x), @function; \ 223 _C_LABEL(x): ; \ 224 .frame sp, fsize, retpc 225 226 /* 227 * NESTED_NOPROFILE 228 * No profilable nested routine. 229 */ 230 #define NESTED_NOPROFILE(x, fsize, retpc) \ 231 .globl _C_LABEL(x); \ 232 STATIC_NESTED_NOPROFILE(x, fsize, retpc) 233 234 /* 235 * NESTED 236 * A function calls other functions and needs 237 * therefore stack space to save/restore registers. 238 */ 239 #define NESTED(x, fsize, retpc) \ 240 NESTED_NOPROFILE(x, fsize, retpc); \ 241 MCOUNT 242 243 /* 244 * STATIC_NESTED 245 * No profilable local nested routine. 246 */ 247 #define STATIC_NESTED(x, fsize, retpc) \ 248 STATIC_NESTED_NOPROFILE(x, fsize, retpc); \ 249 MCOUNT 250 251 /* 252 * XNESTED 253 * declare alternate entry point to nested routine. 254 */ 255 #define XNESTED(x) \ 256 .globl _C_LABEL(x); \ 257 AENT (_C_LABEL(x)); \ 258 _C_LABEL(x): 259 260 /* 261 * END 262 * Mark end of a procedure. 263 */ 264 #define END(x) \ 265 .end _C_LABEL(x); \ 266 .size _C_LABEL(x), . - _C_LABEL(x) 267 268 /* 269 * IMPORT -- import external symbol 270 */ 271 #define IMPORT(sym, size) \ 272 .extern _C_LABEL(sym),size 273 274 /* 275 * EXPORT -- export definition of symbol 276 */ 277 #define EXPORT(x) \ 278 .globl _C_LABEL(x); \ 279 _C_LABEL(x): 280 281 /* 282 * EXPORT_OBJECT -- export definition of symbol of symbol 283 * type Object, visible to ksyms(4) address search. 284 */ 285 #define EXPORT_OBJECT(x) \ 286 EXPORT(x); \ 287 .type _C_LABEL(x), @object; 288 289 /* 290 * VECTOR 291 * exception vector entrypoint 292 * XXX: regmask should be used to generate .mask 293 */ 294 #define VECTOR(x, regmask) \ 295 .ent _C_LABEL(x); \ 296 EXPORT(x); \ 297 298 #define VECTOR_END(x) \ 299 EXPORT(__CONCAT(x,_end)); \ 300 END(x); \ 301 .org _C_LABEL(x) + 0x80 302 303 /* 304 * Macros to panic and printf from assembly language. 305 */ 306 #define PANIC(msg) \ 307 PTR_LA a0, 9f; \ 308 jal _C_LABEL(panic); \ 309 nop; \ 310 MSG(msg) 311 312 #define PRINTF(msg) \ 313 PTR_LA a0, 9f; \ 314 jal _C_LABEL(printf); \ 315 nop; \ 316 MSG(msg) 317 318 #define MSG(msg) \ 319 .rdata; \ 320 9: .asciz msg; \ 321 .text 322 323 #define ASMSTR(str) \ 324 .asciz str; \ 325 .align 3 326 327 #define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ 328 .asciz x; \ 329 .popsection 330 331 /* 332 * XXX retain dialects XXX 333 */ 334 #define ALEAF(x) XLEAF(x) 335 #define NLEAF(x) LEAF_NOPROFILE(x) 336 #define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc) 337 #define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc) 338 339 #if defined(__mips_o32) 340 #define SZREG 4 341 #else 342 #define SZREG 8 343 #endif 344 345 #if defined(__mips_o32) || defined(__mips_o64) 346 #define ALSK 7 /* stack alignment */ 347 #define ALMASK -7 /* stack alignment */ 348 #define SZFPREG 4 349 #define FP_L lwc1 350 #define FP_S swc1 351 #else 352 #define ALSK 15 /* stack alignment */ 353 #define ALMASK -15 /* stack alignment */ 354 #define SZFPREG 8 355 #define FP_L ldc1 356 #define FP_S sdc1 357 #endif 358 359 /* 360 * standard callframe { 361 * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64) 362 * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1) 363 * register_t cf_gp; global pointer (only on n32 and n64) 364 * register_t cf_sp; frame pointer 365 * register_t cf_ra; return address 366 * }; 367 */ 368 #if defined(__mips_o32) || defined(__mips_o64) 369 #define CALLFRAME_SIZ (SZREG * (4 + 2)) 370 #define CALLFRAME_S0 0 371 #elif defined(__mips_n32) || defined(__mips_n64) 372 #define CALLFRAME_SIZ (SZREG * 4) 373 #define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG) 374 #endif 375 #ifndef _KERNEL 376 #define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG) 377 #endif 378 #define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) 379 #define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) 380 381 /* 382 * While it would be nice to be compatible with the SGI 383 * REG_L and REG_S macros, because they do not take parameters, it 384 * is impossible to use them with the _MIPS_SIM_ABIX32 model. 385 * 386 * These macros hide the use of mips3 instructions from the 387 * assembler to prevent the assembler from generating 64-bit style 388 * ABI calls. 389 */ 390 #ifdef __mips_o32 391 #define PTR_ADD add 392 #define PTR_ADDI addi 393 #define PTR_ADDU addu 394 #define PTR_ADDIU addiu 395 #define PTR_SUB subu 396 #define PTR_SUBI subi 397 #define PTR_SUBU subu 398 #define PTR_SUBIU subu 399 #define PTR_L lw 400 #define PTR_LA la 401 #define PTR_S sw 402 #define PTR_SLL sll 403 #define PTR_SLLV sllv 404 #define PTR_SRL srl 405 #define PTR_SRLV srlv 406 #define PTR_SRA sra 407 #define PTR_SRAV srav 408 #define PTR_LL ll 409 #define PTR_SC sc 410 #define PTR_WORD .word 411 #define PTR_SCALESHIFT 2 412 #else /* _MIPS_SZPTR == 64 */ 413 #define PTR_ADD dadd 414 #define PTR_ADDI daddi 415 #define PTR_ADDU daddu 416 #define PTR_ADDIU daddiu 417 #define PTR_SUB dsubu 418 #define PTR_SUBI dsubi 419 #define PTR_SUBU dsubu 420 #define PTR_SUBIU dsubu 421 #ifdef __mips_n32 422 #define PTR_L lw 423 #define PTR_LL ll 424 #define PTR_SC sc 425 #define PTR_S sw 426 #define PTR_SCALESHIFT 2 427 #define PTR_WORD .word 428 #else 429 #define PTR_L ld 430 #define PTR_LL lld 431 #define PTR_SC scd 432 #define PTR_S sd 433 #define PTR_SCALESHIFT 3 434 #define PTR_WORD .dword 435 #endif 436 #define PTR_LA dla 437 #define PTR_SLL dsll 438 #define PTR_SLLV dsllv 439 #define PTR_SRL dsrl 440 #define PTR_SRLV dsrlv 441 #define PTR_SRA dsra 442 #define PTR_SRAV dsrav 443 #endif /* _MIPS_SZPTR == 64 */ 444 445 #if _MIPS_SZINT == 32 446 #define INT_ADD add 447 #define INT_ADDI addi 448 #define INT_ADDU addu 449 #define INT_ADDIU addiu 450 #define INT_SUB subu 451 #define INT_SUBI subi 452 #define INT_SUBU subu 453 #define INT_SUBIU subu 454 #define INT_L lw 455 #define INT_LA la 456 #define INT_S sw 457 #define INT_SLL sll 458 #define INT_SLLV sllv 459 #define INT_SRL srl 460 #define INT_SRLV srlv 461 #define INT_SRA sra 462 #define INT_SRAV srav 463 #define INT_LL ll 464 #define INT_SC sc 465 #define INT_WORD .word 466 #define INT_SCALESHIFT 2 467 #else 468 #define INT_ADD dadd 469 #define INT_ADDI daddi 470 #define INT_ADDU daddu 471 #define INT_ADDIU daddiu 472 #define INT_SUB dsubu 473 #define INT_SUBI dsubi 474 #define INT_SUBU dsubu 475 #define INT_SUBIU dsubu 476 #define INT_L ld 477 #define INT_LA dla 478 #define INT_S sd 479 #define INT_SLL dsll 480 #define INT_SLLV dsllv 481 #define INT_SRL dsrl 482 #define INT_SRLV dsrlv 483 #define INT_SRA dsra 484 #define INT_SRAV dsrav 485 #define INT_LL lld 486 #define INT_SC scd 487 #define INT_WORD .dword 488 #define INT_SCALESHIFT 3 489 #endif 490 491 #if _MIPS_SZLONG == 32 492 #define LONG_ADD add 493 #define LONG_ADDI addi 494 #define LONG_ADDU addu 495 #define LONG_ADDIU addiu 496 #define LONG_SUB subu 497 #define LONG_SUBI subi 498 #define LONG_SUBU subu 499 #define LONG_SUBIU subu 500 #define LONG_L lw 501 #define LONG_LA la 502 #define LONG_S sw 503 #define LONG_SLL sll 504 #define LONG_SLLV sllv 505 #define LONG_SRL srl 506 #define LONG_SRLV srlv 507 #define LONG_SRA sra 508 #define LONG_SRAV srav 509 #define LONG_LL ll 510 #define LONG_SC sc 511 #define LONG_WORD .word 512 #define LONG_SCALESHIFT 2 513 #else 514 #define LONG_ADD dadd 515 #define LONG_ADDI daddi 516 #define LONG_ADDU daddu 517 #define LONG_ADDIU daddiu 518 #define LONG_SUB dsubu 519 #define LONG_SUBI dsubi 520 #define LONG_SUBU dsubu 521 #define LONG_SUBIU dsubu 522 #define LONG_L ld 523 #define LONG_LA dla 524 #define LONG_S sd 525 #define LONG_SLL dsll 526 #define LONG_SLLV dsllv 527 #define LONG_SRL dsrl 528 #define LONG_SRLV dsrlv 529 #define LONG_SRA dsra 530 #define LONG_SRAV dsrav 531 #define LONG_LL lld 532 #define LONG_SC scd 533 #define LONG_WORD .dword 534 #define LONG_SCALESHIFT 3 535 #endif 536 537 #if SZREG == 4 538 #define REG_L lw 539 #define REG_S sw 540 #define REG_LI li 541 #define REG_ADDU addu 542 #define REG_SLL sll 543 #define REG_SLLV sllv 544 #define REG_SRL srl 545 #define REG_SRLV srlv 546 #define REG_SRA sra 547 #define REG_SRAV srav 548 #define REG_LL ll 549 #define REG_SC sc 550 #define REG_SCALESHIFT 2 551 #else 552 #define REG_L ld 553 #define REG_S sd 554 #define REG_LI dli 555 #define REG_ADDU daddu 556 #define REG_SLL dsll 557 #define REG_SLLV dsllv 558 #define REG_SRL dsrl 559 #define REG_SRLV dsrlv 560 #define REG_SRA dsra 561 #define REG_SRAV dsrav 562 #define REG_LL lld 563 #define REG_SC scd 564 #define REG_SCALESHIFT 3 565 #endif 566 567 #if (MIPS1 + MIPS2) > 0 568 #define NOP_L nop 569 #else 570 #define NOP_L /* nothing */ 571 #endif 572 573 /* compiler define */ 574 #if defined(__OCTEON__) 575 /* early cnMIPS have erratum which means 2 */ 576 #define LLSCSYNC sync 4; sync 4 577 #define BDSYNC sync 578 #define BDSYNC_ACQ sync 579 #define SYNC_ACQ sync 580 #define SYNC_REL sync 581 #define BDSYNC_PLUNGER sync 4 582 #define SYNC_PLUNGER sync 4 583 #elif __mips >= 3 || !defined(__mips_o32) 584 #define LLSCSYNC sync 585 #define BDSYNC sync 586 #define BDSYNC_ACQ sync 587 #define SYNC_ACQ sync 588 #define SYNC_REL sync 589 #define BDSYNC_PLUNGER nop 590 #define SYNC_PLUNGER /* nothing */ 591 #else 592 #define LLSCSYNC /* nothing */ 593 #define BDSYNC nop 594 #define BDSYNC_ACQ nop 595 #define SYNC_ACQ /* nothing */ 596 #define SYNC_REL /* nothing */ 597 #define BDSYNC_PLUNGER nop 598 #define SYNC_PLUNGER /* nothing */ 599 #endif 600 601 /* CPU dependent hook for cp0 load delays */ 602 #if defined(MIPS1) || defined(MIPS2) || defined(MIPS3) 603 #define MFC0_HAZARD sll $0,$0,1 /* super scalar nop */ 604 #else 605 #define MFC0_HAZARD /* nothing */ 606 #endif 607 608 #if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \ 609 _MIPS_ISA == _MIPS_ISA_MIPS32 610 #define MFC0 mfc0 611 #define MTC0 mtc0 612 #endif 613 #if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \ 614 _MIPS_ISA == _MIPS_ISA_MIPS64 615 #define MFC0 dmfc0 616 #define MTC0 dmtc0 617 #endif 618 619 #if defined(__mips_o32) || defined(__mips_o64) 620 621 #ifdef __mips_abicalls 622 #define CPRESTORE(r) .cprestore r 623 #define CPLOAD(r) .cpload r 624 #else 625 #define CPRESTORE(r) /* not needed */ 626 #define CPLOAD(r) /* not needed */ 627 #endif 628 629 #define SETUP_GP \ 630 .set push; \ 631 .set noreorder; \ 632 .cpload t9; \ 633 .set pop 634 #define SETUP_GPX(r) \ 635 .set push; \ 636 .set noreorder; \ 637 move r,ra; /* save old ra */ \ 638 bal 7f; \ 639 nop; \ 640 7: .cpload ra; \ 641 move ra,r; \ 642 .set pop 643 #define SETUP_GPX_L(r,lbl) \ 644 .set push; \ 645 .set noreorder; \ 646 move r,ra; /* save old ra */ \ 647 bal lbl; \ 648 nop; \ 649 lbl: .cpload ra; \ 650 move ra,r; \ 651 .set pop 652 #define SAVE_GP(x) .cprestore x 653 654 #define SETUP_GP64(a,b) /* n32/n64 specific */ 655 #define SETUP_GP64_R(a,b) /* n32/n64 specific */ 656 #define SETUP_GPX64(a,b) /* n32/n64 specific */ 657 #define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */ 658 #define RESTORE_GP64 /* n32/n64 specific */ 659 #define USE_ALT_CP(a) /* n32/n64 specific */ 660 #endif /* __mips_o32 || __mips_o64 */ 661 662 #if defined(__mips_o32) || defined(__mips_o64) 663 #define REG_PROLOGUE .set push 664 #define REG_EPILOGUE .set pop 665 #endif 666 #if defined(__mips_n32) || defined(__mips_n64) 667 #define REG_PROLOGUE .set push ; .set mips3 668 #define REG_EPILOGUE .set pop 669 #endif 670 671 #if defined(__mips_n32) || defined(__mips_n64) 672 #define SETUP_GP /* o32 specific */ 673 #define SETUP_GPX(r) /* o32 specific */ 674 #define SETUP_GPX_L(r,lbl) /* o32 specific */ 675 #define SAVE_GP(x) /* o32 specific */ 676 #define SETUP_GP64(a,b) .cpsetup t9, a, b 677 #define SETUP_GPX64(a,b) \ 678 .set push; \ 679 move b,ra; \ 680 .set noreorder; \ 681 bal 7f; \ 682 nop; \ 683 7: .set pop; \ 684 .cpsetup ra, a, 7b; \ 685 move ra,b 686 #define SETUP_GPX64_L(a,b,c) \ 687 .set push; \ 688 move b,ra; \ 689 .set noreorder; \ 690 bal c; \ 691 nop; \ 692 c: .set pop; \ 693 .cpsetup ra, a, c; \ 694 move ra,b 695 #define RESTORE_GP64 .cpreturn 696 #define USE_ALT_CP(a) .cplocal a 697 #endif /* __mips_n32 || __mips_n64 */ 698 699 /* 700 * The DYNAMIC_STATUS_MASK option adds an additional masking operation 701 * when updating the hardware interrupt mask in the status register. 702 * 703 * This is useful for platforms that need to at run-time mask 704 * interrupts based on motherboard configuration or to handle 705 * slowly clearing interrupts. 706 * 707 * XXX this is only currently implemented for mips3. 708 */ 709 #ifdef MIPS_DYNAMIC_STATUS_MASK 710 #define DYNAMIC_STATUS_MASK(sr,scratch) \ 711 lw scratch, mips_dynamic_status_mask; \ 712 and sr, sr, scratch 713 714 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) \ 715 ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \ 716 DYNAMIC_STATUS_MASK(sr,scratch1) 717 #else 718 #define DYNAMIC_STATUS_MASK(sr,scratch) 719 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) 720 #endif 721 722 /* See lock_stubs.S. */ 723 #define LOG2_MIPS_LOCK_RAS_SIZE 8 724 #define MIPS_LOCK_RAS_SIZE 256 /* 16 bytes left over */ 725 726 #define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off) 727 728 #endif /* _MIPS_ASM_H */ 729
Indexes created Tue Sep 23 13:09:54 GMT 2025