cache.h revision 1.2.2.2
1 1.2.2.2 gmcgarry /* $NetBSD: cache.h,v 1.2.2.2 2002/02/01 04:57:44 gmcgarry Exp $ */ 2 1.2.2.2 gmcgarry 3 1.2.2.2 gmcgarry /* 4 1.2.2.2 gmcgarry * Copyright 2001 Wasabi Systems, Inc. 5 1.2.2.2 gmcgarry * All rights reserved. 6 1.2.2.2 gmcgarry * 7 1.2.2.2 gmcgarry * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 1.2.2.2 gmcgarry * 9 1.2.2.2 gmcgarry * Redistribution and use in source and binary forms, with or without 10 1.2.2.2 gmcgarry * modification, are permitted provided that the following conditions 11 1.2.2.2 gmcgarry * are met: 12 1.2.2.2 gmcgarry * 1. Redistributions of source code must retain the above copyright 13 1.2.2.2 gmcgarry * notice, this list of conditions and the following disclaimer. 14 1.2.2.2 gmcgarry * 2. Redistributions in binary form must reproduce the above copyright 15 1.2.2.2 gmcgarry * notice, this list of conditions and the following disclaimer in the 16 1.2.2.2 gmcgarry * documentation and/or other materials provided with the distribution. 17 1.2.2.2 gmcgarry * 3. All advertising materials mentioning features or use of this software 18 1.2.2.2 gmcgarry * must display the following acknowledgement: 19 1.2.2.2 gmcgarry * This product includes software developed for the NetBSD Project by 20 1.2.2.2 gmcgarry * Wasabi Systems, Inc. 21 1.2.2.2 gmcgarry * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 1.2.2.2 gmcgarry * or promote products derived from this software without specific prior 23 1.2.2.2 gmcgarry * written permission. 24 1.2.2.2 gmcgarry * 25 1.2.2.2 gmcgarry * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 1.2.2.2 gmcgarry * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 1.2.2.2 gmcgarry * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 1.2.2.2 gmcgarry * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 1.2.2.2 gmcgarry * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 1.2.2.2 gmcgarry * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 1.2.2.2 gmcgarry * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 1.2.2.2 gmcgarry * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 1.2.2.2 gmcgarry * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 1.2.2.2 gmcgarry * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 1.2.2.2 gmcgarry * POSSIBILITY OF SUCH DAMAGE. 36 1.2.2.2 gmcgarry */ 37 1.2.2.2 gmcgarry 38 1.2.2.2 gmcgarry /* 39 1.2.2.2 gmcgarry * Cache operations. 40 1.2.2.2 gmcgarry * 41 1.2.2.2 gmcgarry * We define the following primitives: 42 1.2.2.2 gmcgarry * 43 1.2.2.2 gmcgarry * --- Instruction cache synchronization (mandatory): 44 1.2.2.2 gmcgarry * 45 1.2.2.2 gmcgarry * icache_sync_all Synchronize I-cache 46 1.2.2.2 gmcgarry * 47 1.2.2.2 gmcgarry * icache_sync_range Synchronize I-cache range 48 1.2.2.2 gmcgarry * 49 1.2.2.2 gmcgarry * icache_sync_range_index (index ops) 50 1.2.2.2 gmcgarry * 51 1.2.2.2 gmcgarry * --- Primary data cache (mandatory): 52 1.2.2.2 gmcgarry * 53 1.2.2.2 gmcgarry * pdcache_wbinv_all Write-back Invalidate primary D-cache 54 1.2.2.2 gmcgarry * 55 1.2.2.2 gmcgarry * pdcache_wbinv_range Write-back Invalidate primary D-cache range 56 1.2.2.2 gmcgarry * 57 1.2.2.2 gmcgarry * pdcache_wbinv_range_index (index ops) 58 1.2.2.2 gmcgarry * 59 1.2.2.2 gmcgarry * pdcache_inv_range Invalidate primary D-cache range 60 1.2.2.2 gmcgarry * 61 1.2.2.2 gmcgarry * pdcache_wb_range Write-back primary D-cache range 62 1.2.2.2 gmcgarry * 63 1.2.2.2 gmcgarry * --- Secondary data cache (optional): 64 1.2.2.2 gmcgarry * 65 1.2.2.2 gmcgarry * sdcache_wbinv_all Write-back Invalidate secondary D-cache 66 1.2.2.2 gmcgarry * 67 1.2.2.2 gmcgarry * sdcache_wbinv_range Write-back Invalidate secondary D-cache range 68 1.2.2.2 gmcgarry * 69 1.2.2.2 gmcgarry * sdcache_wbinv_range_index (index ops) 70 1.2.2.2 gmcgarry * 71 1.2.2.2 gmcgarry * sdcache_inv_range Invalidate secondary D-cache range 72 1.2.2.2 gmcgarry * 73 1.2.2.2 gmcgarry * sdcache_wb_range Write-back secondary D-cache range 74 1.2.2.2 gmcgarry * 75 1.2.2.2 gmcgarry * There are some rules that must be followed: 76 1.2.2.2 gmcgarry * 77 1.2.2.2 gmcgarry * I-cache Synch (all or range): 78 1.2.2.2 gmcgarry * The goal is to synchronize the instruction stream, 79 1.2.2.2 gmcgarry * so you may need to write-back dirty data cache 80 1.2.2.2 gmcgarry * blocks first. If a range is requested, and you 81 1.2.2.2 gmcgarry * can't synchronize just a range, you have to hit 82 1.2.2.2 gmcgarry * the whole thing. 83 1.2.2.2 gmcgarry * 84 1.2.2.2 gmcgarry * D-cache Write-back Invalidate range: 85 1.2.2.2 gmcgarry * If you can't WB-Inv a range, you must WB-Inv the 86 1.2.2.2 gmcgarry * entire D-cache. 87 1.2.2.2 gmcgarry * 88 1.2.2.2 gmcgarry * D-cache Invalidate: 89 1.2.2.2 gmcgarry * If you can't Inv the D-cache without doing a 90 1.2.2.2 gmcgarry * Write-back, YOU MUST PANIC. This is to catch 91 1.2.2.2 gmcgarry * errors in calling code. Callers must be aware 92 1.2.2.2 gmcgarry * of this scenario, and must handle it appropriately 93 1.2.2.2 gmcgarry * (consider the bus_dma(9) operations). 94 1.2.2.2 gmcgarry * 95 1.2.2.2 gmcgarry * D-cache Write-back: 96 1.2.2.2 gmcgarry * If you can't Write-back without doing an invalidate, 97 1.2.2.2 gmcgarry * that's fine. Then treat this as a WB-Inv. Skipping 98 1.2.2.2 gmcgarry * the invalidate is merely an optimization. 99 1.2.2.2 gmcgarry * 100 1.2.2.2 gmcgarry * All operations: 101 1.2.2.2 gmcgarry * Valid virtual addresses must be passed to the 102 1.2.2.2 gmcgarry * cache operation. 103 1.2.2.2 gmcgarry * 104 1.2.2.2 gmcgarry * Finally, these primitives are grouped together in reasonable 105 1.2.2.2 gmcgarry * ways. For all operations described here, first the primary 106 1.2.2.2 gmcgarry * cache is frobbed, then the secondary cache frobbed, if the 107 1.2.2.2 gmcgarry * operation for the secondary cache exists. 108 1.2.2.2 gmcgarry * 109 1.2.2.2 gmcgarry * mips_icache_sync_all Synchronize I-cache 110 1.2.2.2 gmcgarry * 111 1.2.2.2 gmcgarry * mips_icache_sync_range Synchronize I-cache range 112 1.2.2.2 gmcgarry * 113 1.2.2.2 gmcgarry * mips_icache_sync_range_index (index ops) 114 1.2.2.2 gmcgarry * 115 1.2.2.2 gmcgarry * mips_dcache_wbinv_all Write-back Invalidate D-cache 116 1.2.2.2 gmcgarry * 117 1.2.2.2 gmcgarry * mips_dcache_wbinv_range Write-back Invalidate D-cache range 118 1.2.2.2 gmcgarry * 119 1.2.2.2 gmcgarry * mips_dcache_wbinv_range_index (index ops) 120 1.2.2.2 gmcgarry * 121 1.2.2.2 gmcgarry * mips_dcache_inv_range Invalidate D-cache range 122 1.2.2.2 gmcgarry * 123 1.2.2.2 gmcgarry * mips_dcache_wb_range Write-back D-cache range 124 1.2.2.2 gmcgarry */ 125 1.2.2.2 gmcgarry 126 1.2.2.2 gmcgarry struct mips_cache_ops { 127 1.2.2.2 gmcgarry void (*mco_icache_sync_all)(void); 128 1.2.2.2 gmcgarry void (*mco_icache_sync_range)(vaddr_t, vsize_t); 129 1.2.2.2 gmcgarry void (*mco_icache_sync_range_index)(vaddr_t, vsize_t); 130 1.2.2.2 gmcgarry 131 1.2.2.2 gmcgarry void (*mco_pdcache_wbinv_all)(void); 132 1.2.2.2 gmcgarry void (*mco_pdcache_wbinv_range)(vaddr_t, vsize_t); 133 1.2.2.2 gmcgarry void (*mco_pdcache_wbinv_range_index)(vaddr_t, vsize_t); 134 1.2.2.2 gmcgarry void (*mco_pdcache_inv_range)(vaddr_t, vsize_t); 135 1.2.2.2 gmcgarry void (*mco_pdcache_wb_range)(vaddr_t, vsize_t); 136 1.2.2.2 gmcgarry 137 1.2.2.2 gmcgarry void (*mco_sdcache_wbinv_all)(void); 138 1.2.2.2 gmcgarry void (*mco_sdcache_wbinv_range)(vaddr_t, vsize_t); 139 1.2.2.2 gmcgarry void (*mco_sdcache_wbinv_range_index)(vaddr_t, vsize_t); 140 1.2.2.2 gmcgarry void (*mco_sdcache_inv_range)(vaddr_t, vsize_t); 141 1.2.2.2 gmcgarry void (*mco_sdcache_wb_range)(vaddr_t, vsize_t); 142 1.2.2.2 gmcgarry }; 143 1.2.2.2 gmcgarry 144 1.2.2.2 gmcgarry #ifdef _KERNEL 145 1.2.2.2 gmcgarry extern struct mips_cache_ops mips_cache_ops; 146 1.2.2.2 gmcgarry 147 1.2.2.2 gmcgarry /* PRIMARY CACHE VARIABLES */ 148 1.2.2.2 gmcgarry extern int mips_picache_size; 149 1.2.2.2 gmcgarry extern int mips_picache_line_size; 150 1.2.2.2 gmcgarry extern int mips_picache_ways; 151 1.2.2.2 gmcgarry extern int mips_picache_way_size; 152 1.2.2.2 gmcgarry extern int mips_picache_way_mask; 153 1.2.2.2 gmcgarry 154 1.2.2.2 gmcgarry extern int mips_pdcache_size; /* and unified */ 155 1.2.2.2 gmcgarry extern int mips_pdcache_line_size; 156 1.2.2.2 gmcgarry extern int mips_pdcache_ways; 157 1.2.2.2 gmcgarry extern int mips_pdcache_way_size; 158 1.2.2.2 gmcgarry extern int mips_pdcache_way_mask; 159 1.2.2.2 gmcgarry extern int mips_pdcache_write_through; 160 1.2.2.2 gmcgarry 161 1.2.2.2 gmcgarry extern int mips_pcache_unified; 162 1.2.2.2 gmcgarry 163 1.2.2.2 gmcgarry /* SECONDARY CACHE VARIABLES */ 164 1.2.2.2 gmcgarry extern int mips_sicache_size; 165 1.2.2.2 gmcgarry extern int mips_sicache_line_size; 166 1.2.2.2 gmcgarry extern int mips_sicache_ways; 167 1.2.2.2 gmcgarry extern int mips_sicache_way_size; 168 1.2.2.2 gmcgarry extern int mips_sicache_way_mask; 169 1.2.2.2 gmcgarry 170 1.2.2.2 gmcgarry extern int mips_sdcache_size; /* and unified */ 171 1.2.2.2 gmcgarry extern int mips_sdcache_line_size; 172 1.2.2.2 gmcgarry extern int mips_sdcache_ways; 173 1.2.2.2 gmcgarry extern int mips_sdcache_way_size; 174 1.2.2.2 gmcgarry extern int mips_sdcache_way_mask; 175 1.2.2.2 gmcgarry extern int mips_sdcache_write_through; 176 1.2.2.2 gmcgarry 177 1.2.2.2 gmcgarry extern int mips_scache_unified; 178 1.2.2.2 gmcgarry 179 1.2.2.2 gmcgarry /* TERTIARY CACHE VARIABLES */ 180 1.2.2.2 gmcgarry extern int mips_tcache_size; /* always unified */ 181 1.2.2.2 gmcgarry extern int mips_tcache_line_size; 182 1.2.2.2 gmcgarry extern int mips_tcache_ways; 183 1.2.2.2 gmcgarry extern int mips_tcache_way_size; 184 1.2.2.2 gmcgarry extern int mips_tcache_way_mask; 185 1.2.2.2 gmcgarry extern int mips_tcache_write_through; 186 1.2.2.2 gmcgarry 187 1.2.2.2 gmcgarry extern int mips_dcache_align; 188 1.2.2.2 gmcgarry extern int mips_dcache_align_mask; 189 1.2.2.2 gmcgarry 190 1.2.2.2 gmcgarry extern int mips_cache_alias_mask; 191 1.2.2.2 gmcgarry extern int mips_cache_prefer_mask; 192 1.2.2.2 gmcgarry 193 1.2.2.2 gmcgarry /* 194 1.2.2.2 gmcgarry * XXX XXX XXX THIS SHOULD NOT EXIST XXX XXX XXX 195 1.2.2.2 gmcgarry */ 196 1.2.2.2 gmcgarry #define mips_cache_indexof(x) (((vaddr_t)(x)) & mips_cache_alias_mask) 197 1.2.2.2 gmcgarry 198 1.2.2.2 gmcgarry #define __mco_noargs(x) \ 199 1.2.2.2 gmcgarry do { \ 200 1.2.2.2 gmcgarry (*mips_cache_ops.mco_p ## x )(); \ 201 1.2.2.2 gmcgarry if (*mips_cache_ops.mco_s ## x ) \ 202 1.2.2.2 gmcgarry (*mips_cache_ops.mco_s ## x )(); \ 203 1.2.2.2 gmcgarry } while (/*CONSTCOND*/0) 204 1.2.2.2 gmcgarry 205 1.2.2.2 gmcgarry #define __mco_2args(x, a, b) \ 206 1.2.2.2 gmcgarry do { \ 207 1.2.2.2 gmcgarry (*mips_cache_ops.mco_p ## x )((a), (b)); \ 208 1.2.2.2 gmcgarry if (*mips_cache_ops.mco_s ## x ) \ 209 1.2.2.2 gmcgarry (*mips_cache_ops.mco_s ## x )((a), (b)); \ 210 1.2.2.2 gmcgarry } while (/*CONSTCOND*/0) 211 1.2.2.2 gmcgarry 212 1.2.2.2 gmcgarry #define mips_icache_sync_all() \ 213 1.2.2.2 gmcgarry (*mips_cache_ops.mco_icache_sync_all)() 214 1.2.2.2 gmcgarry 215 1.2.2.2 gmcgarry #define mips_icache_sync_range(v, s) \ 216 1.2.2.2 gmcgarry (*mips_cache_ops.mco_icache_sync_range)((v), (s)) 217 1.2.2.2 gmcgarry 218 1.2.2.2 gmcgarry #define mips_icache_sync_range_index(v, s) \ 219 1.2.2.2 gmcgarry (*mips_cache_ops.mco_icache_sync_range_index)((v), (s)) 220 1.2.2.2 gmcgarry 221 1.2.2.2 gmcgarry #define mips_dcache_wbinv_all() \ 222 1.2.2.2 gmcgarry __mco_noargs(dcache_wbinv_all) 223 1.2.2.2 gmcgarry 224 1.2.2.2 gmcgarry #define mips_dcache_wbinv_range(v, s) \ 225 1.2.2.2 gmcgarry __mco_2args(dcache_wbinv_range, (v), (s)) 226 1.2.2.2 gmcgarry 227 1.2.2.2 gmcgarry #define mips_dcache_wbinv_range_index(v, s) \ 228 1.2.2.2 gmcgarry __mco_2args(dcache_wbinv_range_index, (v), (s)) 229 1.2.2.2 gmcgarry 230 1.2.2.2 gmcgarry #define mips_dcache_inv_range(v, s) \ 231 1.2.2.2 gmcgarry __mco_2args(dcache_inv_range, (v), (s)) 232 1.2.2.2 gmcgarry 233 1.2.2.2 gmcgarry #define mips_dcache_wb_range(v, s) \ 234 1.2.2.2 gmcgarry __mco_2args(dcache_wb_range, (v), (s)) 235 1.2.2.2 gmcgarry 236 1.2.2.2 gmcgarry void mips_config_cache(void); 237 1.2.2.2 gmcgarry void mips_dcache_compute_align(void); 238 1.2.2.2 gmcgarry 239 1.2.2.2 gmcgarry #endif /* _KERNEL */ 240
Indexes created Tue Sep 30 17:09:57 GMT 2025