locore.h revision 1.3 1 /* $NetBSD: locore.h,v 1.3 1996/10/13 21:37:35 jonathan Exp $ */
2
3 /*
4 * Copyright 1996 The Board of Trustees of The Leland Stanford
5 * Junior University. All Rights Reserved.
6 *
7 * Permission to use, copy, modify, and distribute this
8 * software and its documentation for any purpose and without
9 * fee is hereby granted, provided that the above copyright
10 * notice appear in all copies. Stanford University
11 * makes no representations about the suitability of this
12 * software for any purpose. It is provided "as is" without
13 * express or implied warranty.
14 */
15
16 /*
17 * Jump table for MIPS cpu locore functions that are implemented
18 * differently on different generations, or instruction-level
19 * archtecture (ISA) level, the Mips family.
20 * The following functions must be provided for each mips ISA level:
21 *
22 *
23 * MachConfigCache
24 * MachFlushCache
25 * MachFlushDCache
26 * MachFlushICache
27 * MachForceCacheUpdate
28 * MachSetPID
29 * MachTLBFlush
30 * MachTLBFlushAddr __P()
31 * MachTLBUpdate (u_int, (pt_entry_t?) u_int);
32 * MachTLBWriteIndexed
33 *
34 * We currently provide support for:
35 *
36 * r2000 and r3000 (mips ISA-I)
37 * r4000 and r4400 in 32-bit mode (mips ISA-III?)
38 */
39
40 #ifndef _MIPS_LOCORE_H
41 #define _MIPS_LOCORE_H
42
43 /*
44 * locore functions used by vm_machdep.c.
45 * These are not yet CPU-model specific.
46 */
47
48 struct user;
49 extern int copykstack __P((struct user *up));
50 extern void MachSaveCurFPState __P((struct proc *p));
51 extern int switch_exit __P((void)); /* XXX never really returns? */
52
53 /* MIPS-generic locore functions used by trap.c */
54 extern void MachFPTrap __P((u_int statusReg, u_int CauseReg, u_int pc));
55
56 /*
57 * locore service routine for exeception vectors. Used outside locore
58 * only to print them by name in stack tracebacks
59 */
60
61 extern void mips1_KernIntr __P((void));
62
63 extern void mips1_ConfigCache __P((void));
64 extern void mips1_FlushCache __P((void));
65 extern void mips1_FlushDCache __P((vm_offset_t addr, vm_offset_t len));
66 extern void mips1_FlushICache __P((vm_offset_t addr, vm_offset_t len));
67 extern void mips1_ForceCacheUpdate __P((void));
68 extern void mips1_SetPID __P((int pid));
69 extern void mips1_TLBFlush __P((void));
70 extern void mips1_TLBFlushAddr __P( /* XXX Really pte highpart ? */
71 (vm_offset_t addr));
72 extern void mips1_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int));
73 extern void mips1_TLBWriteIndexed __P((u_int index, u_int high,
74 u_int low));
75
76 extern void mips3_KernIntr __P((void));
77 extern void mips3_ConfigCache __P((void));
78 extern void mips3_FlushCache __P((void));
79 extern void mips3_FlushDCache __P((vm_offset_t addr, vm_offset_t len));
80 extern void mips3_FlushICache __P((vm_offset_t addr, vm_offset_t len));
81 extern void mips3_ForceCacheUpdate __P((void));
82 extern void mips3_SetPID __P((int pid));
83 extern void mips3_TLBFlush __P((void));
84 extern void mips3_TLBFlushAddr __P( /* XXX Really pte highpart ? */
85 (vm_offset_t addr));
86 extern void mips3_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int));
87 extern void mips3_TLBWriteIndexed __P((u_int index, u_int high,
88 u_int low));
89
90 /*
91 * A vector with an entry for each mips-ISA-level dependent
92 * locore function, and macros which jump through it.
93 * XXX the macro names are chosen to be compatible with the old
94 * Sprite coding-convention names used in 4.4bsd/pmax.
95 */
96 typedef struct {
97 void (*configCache) __P((void));
98 void (*flushCache) __P((void));
99 void (*flushDCache) __P((vm_offset_t addr, vm_offset_t len));
100 void (*flushICache) __P((vm_offset_t addr, vm_offset_t len));
101 void (*forceCacheUpdate) __P((void));
102 void (*setTLBpid) __P((int pid));
103 void (*tlbFlush) __P((void));
104 void (*tlbFlushAddr) __P((vm_offset_t)); /* XXX Really pte highpart ? */
105 void (*tlbUpdate) __P((u_int highreg, u_int lowreg));
106 void (*tlbWriteIndexed) __P((u_int, u_int, u_int));
107 } mips_locore_jumpvec_t;
108
109
110 /*
111 * The "active" locore-fuction vector, and
112
113 */
114 extern mips_locore_jumpvec_t mips_locore_jumpvec;
115 extern mips_locore_jumpvec_t r2000_locore_vec;
116 extern mips_locore_jumpvec_t r4000_locore_vec;
117
118 #define MachConfigCache (*(mips_locore_jumpvec.configCache))
119 #define MachFlushCache (*(mips_locore_jumpvec.flushCache))
120 #define MachFlushDCache (*(mips_locore_jumpvec.flushDCache))
121 #define MachFlushICache (*(mips_locore_jumpvec.flushICache))
122 #define MachForceCacheUpdate (*(mips_locore_jumpvec.forceCacheUpdate))
123 #define MachSetPID (*(mips_locore_jumpvec.setTLBpid))
124 #define MachTLBFlush (*(mips_locore_jumpvec.tlbFlush))
125 #define MachTLBFlushAddr (*(mips_locore_jumpvec.tlbFlushAddr))
126 #define MachTLBUpdate (*(mips_locore_jumpvec.tlbUpdate))
127 #define MachTLBWriteIndexed (*(mips_locore_jumpvec.tlbWriteIndexed))
128
129 #endif /* _MIPS_LOCORE_H */
130