Home | History | Annotate | Line # | Download | only in include
locore.h revision 1.4 
      1 /*	$NetBSD: locore.h,v 1.4 1997/05/25 23:00:40 jonathan Exp $	*/
      2 
      3 /*
      4  * Copyright 1996 The Board of Trustees of The Leland Stanford
      5  * Junior University. All Rights Reserved.
      6  *
      7  * Permission to use, copy, modify, and distribute this
      8  * software and its documentation for any purpose and without
      9  * fee is hereby granted, provided that the above copyright
     10  * notice appear in all copies.  Stanford University
     11  * makes no representations about the suitability of this
     12  * software for any purpose.  It is provided "as is" without
     13  * express or implied warranty.
     14  */
     15 
     16 /*
     17  * Jump table for MIPS cpu locore functions that are implemented
     18  * differently on different generations, or instruction-level
     19  * archtecture (ISA) level, the Mips family.
     20  * The following functions must be provided for each mips ISA level:
     21  *
     22  *
     23  *	MachConfigCache
     24  *	MachFlushCache
     25  *	MachFlushDCache
     26  *	MachFlushICache
     27  *	MachForceCacheUpdate
     28  *	MachSetPID
     29  *	MachTLBFlush
     30  *	MachTLBFlushAddr __P()
     31  *	MachTLBUpdate (u_int, (pt_entry_t?) u_int);
     32  *	MachTLBWriteIndexed
     33  *
     34  * We currently provide support for:
     35  *
     36  *	r2000 and r3000 (mips ISA-I)
     37  *	r4000 and r4400 in 32-bit mode (mips ISA-III?)
     38  */
     39 
     40 #ifndef _MIPS_LOCORE_H
     41 #define  _MIPS_LOCORE_H
     42 
     43 /*
     44  * locore functions used by vm_machdep.c.
     45  * These are not yet CPU-model specific.
     46  */
     47 
     48 struct user;
     49 extern int  copykstack __P((struct user *up));
     50 extern void MachSaveCurFPState __P((struct proc *p));
     51 extern int switch_exit __P((void)); /* XXX never really returns? */
     52 extern void blkclr __P((caddr_t val, int size));   /* bulk aligned bzero */
     53 
     54 
     55 /* MIPS-generic locore functions used by trap.c */
     56  extern void MachFPTrap __P((u_int statusReg, u_int CauseReg, u_int pc));
     57 
     58 /*
     59  * locore service routine for exeception vectors. Used outside locore
     60  * only to print them by name in stack tracebacks
     61  */
     62 
     63 extern void mips1_KernIntr __P((void));
     64 
     65 extern void mips1_ConfigCache  __P((void));
     66 extern void mips1_FlushCache  __P((void));
     67 extern void mips1_FlushDCache  __P((vm_offset_t addr, vm_offset_t len));
     68 extern void mips1_FlushICache  __P((vm_offset_t addr, vm_offset_t len));
     69 extern void mips1_ForceCacheUpdate __P((void));
     70 extern void mips1_SetPID   __P((int pid));
     71 extern void mips1_TLBFlush __P((void));
     72 extern void mips1_TLBFlushAddr   __P( /* XXX Really pte highpart ? */
     73 					  (vm_offset_t addr));
     74 extern void mips1_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int));
     75 extern void mips1_TLBWriteIndexed  __P((u_int index, u_int high,
     76 					    u_int low));
     77 
     78 extern void mips3_KernIntr __P((void));
     79 extern void mips3_ConfigCache __P((void));
     80 extern void mips3_FlushCache  __P((void));
     81 extern void mips3_FlushDCache __P((vm_offset_t addr, vm_offset_t len));
     82 extern void mips3_FlushICache __P((vm_offset_t addr, vm_offset_t len));
     83 extern void mips3_ForceCacheUpdate __P((void));
     84 extern void mips3_SetPID  __P((int pid));
     85 extern void mips3_TLBFlush __P((void));
     86 extern void mips3_TLBFlushAddr __P( /* XXX Really pte highpart ? */
     87 					  (vm_offset_t addr));
     88 extern void mips3_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int));
     89 extern void mips3_TLBWriteIndexed __P((u_int index, u_int high,
     90 					    u_int low));
     91 
     92 /*
     93  *  A vector with an entry for each mips-ISA-level dependent
     94  * locore function, and macros which jump through it.
     95  * XXX the macro names are chosen to be compatible with the old
     96  * Sprite  coding-convention names used in 4.4bsd/pmax.
     97  */
     98 typedef struct  {
     99 	void (*configCache) __P((void));
    100 	void (*flushCache)  __P((void));
    101 	void (*flushDCache) __P((vm_offset_t addr, vm_offset_t len));
    102 	void (*flushICache) __P((vm_offset_t addr, vm_offset_t len));
    103 	void (*forceCacheUpdate)  __P((void));
    104 	void (*setTLBpid)  __P((int pid));
    105 	void (*tlbFlush)  __P((void));
    106 	void (*tlbFlushAddr)  __P((vm_offset_t)); /* XXX Really pte highpart ? */
    107 	void (*tlbUpdate)  __P((u_int highreg, u_int lowreg));
    108 	void (*tlbWriteIndexed)  __P((u_int, u_int, u_int));
    109 } mips_locore_jumpvec_t;
    110 
    111 
    112 /*
    113  * The "active" locore-fuction vector, and
    114 
    115  */
    116 extern mips_locore_jumpvec_t mips_locore_jumpvec;
    117 extern mips_locore_jumpvec_t r2000_locore_vec;
    118 extern mips_locore_jumpvec_t r4000_locore_vec;
    119 
    120 #define MachConfigCache		(*(mips_locore_jumpvec.configCache))
    121 #define MachFlushCache		(*(mips_locore_jumpvec.flushCache))
    122 #define MachFlushDCache		(*(mips_locore_jumpvec.flushDCache))
    123 #define MachFlushICache		(*(mips_locore_jumpvec.flushICache))
    124 #define MachForceCacheUpdate	(*(mips_locore_jumpvec.forceCacheUpdate))
    125 #define MachSetPID		(*(mips_locore_jumpvec.setTLBpid))
    126 #define MachTLBFlush		(*(mips_locore_jumpvec.tlbFlush))
    127 #define MachTLBFlushAddr	(*(mips_locore_jumpvec.tlbFlushAddr))
    128 #define MachTLBUpdate		(*(mips_locore_jumpvec.tlbUpdate))
    129 #define MachTLBWriteIndexed	(*(mips_locore_jumpvec.tlbWriteIndexed))
    130 
    131 #endif	/* _MIPS_LOCORE_H */
    132