mips_opcode.h revision 1.22
1 /* $NetBSD: mips_opcode.h,v 1.22 2020/07/26 08:08:41 simonb Exp $ */ 2 3 /*- 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)mips_opcode.h 8.1 (Berkeley) 6/10/93 35 */ 36 37 #ifndef _MIPS_MIPS_OPCODE_H_ 38 #define _MIPS_MIPS_OPCODE_H_ 39 40 /* 41 * Define the instruction formats and opcode values for the 42 * MIPS instruction set. 43 */ 44 45 /* 46 * Define the instruction formats. 47 */ 48 typedef union { 49 unsigned word; 50 51 #if BYTE_ORDER == LITTLE_ENDIAN 52 struct { 53 unsigned imm: 16; 54 unsigned rt: 5; 55 unsigned rs: 5; 56 unsigned op: 6; 57 } IType; 58 59 struct { 60 unsigned target: 26; 61 unsigned op: 6; 62 } JType; 63 64 struct { 65 unsigned func: 6; 66 unsigned shamt: 5; 67 unsigned rd: 5; 68 unsigned rt: 5; 69 unsigned rs: 5; 70 unsigned op: 6; 71 } RType; 72 73 struct { 74 unsigned func: 6; 75 unsigned fd: 5; 76 unsigned fs: 5; 77 unsigned ft: 5; 78 unsigned fmt: 4; 79 unsigned : 1; /* always '1' */ 80 unsigned op: 6; /* always '0x11' */ 81 } FRType; 82 #endif 83 #if BYTE_ORDER == BIG_ENDIAN 84 struct { 85 unsigned op: 6; 86 unsigned rs: 5; 87 unsigned rt: 5; 88 unsigned imm: 16; 89 } IType; 90 91 struct { 92 unsigned op: 6; 93 unsigned target: 26; 94 } JType; 95 96 struct { 97 unsigned op: 6; 98 unsigned rs: 5; 99 unsigned rt: 5; 100 unsigned rd: 5; 101 unsigned shamt: 5; 102 unsigned func: 6; 103 } RType; 104 105 struct { 106 unsigned op: 6; /* always '0x11' */ 107 unsigned : 1; /* always '1' */ 108 unsigned fmt: 4; 109 unsigned ft: 5; 110 unsigned fs: 5; 111 unsigned fd: 5; 112 unsigned func: 6; 113 } FRType; 114 #endif 115 } InstFmt; 116 117 /* 118 * Values for the 'op' field. 119 */ 120 #define OP_SPECIAL 000 121 #define OP_REGIMM 001 122 #define OP_J 002 123 #define OP_JAL 003 124 #define OP_BEQ 004 125 #define OP_BNE 005 126 #define OP_BLEZ 006 127 #define OP_BGTZ 007 128 129 #define OP_ADDI 010 130 #define OP_ADDIU 011 131 #define OP_SLTI 012 132 #define OP_SLTIU 013 133 #define OP_ANDI 014 134 #define OP_ORI 015 135 #define OP_XORI 016 136 #define OP_LUI 017 137 138 #define OP_COP0 020 139 #define OP_COP1 021 140 #define OP_COP2 022 141 #define OP_COP3 023 142 #define OP_BEQL 024 /* MIPS-II, for r4000 port */ 143 #define OP_BNEL 025 /* MIPS-II, for r4000 port */ 144 #define OP_BLEZL 026 /* MIPS-II, for r4000 port */ 145 #define OP_BGTZL 027 /* MIPS-II, for r4000 port */ 146 147 #define OP_DADDI 030 /* MIPS-II, for r4000 port */ 148 #define OP_DADDIU 031 /* MIPS-II, for r4000 port */ 149 #define OP_LDL 032 /* MIPS-II, for r4000 port */ 150 #define OP_LDR 033 /* MIPS-II, for r4000 port */ 151 152 #define OP_SPECIAL2 034 /* QED opcodes */ 153 #define OP_JALX 035 154 #define OP_MDMX 036 155 #define OP_SPECIAL3 037 156 157 #define OP_LB 040 158 #define OP_LH 041 159 #define OP_LWL 042 160 #define OP_LW 043 161 #define OP_LBU 044 162 #define OP_LHU 045 163 #define OP_LWR 046 164 #define OP_LHU 045 165 #define OP_LWR 046 166 #define OP_LWU 047 /* MIPS-II, for r4000 port */ 167 168 #define OP_SB 050 169 #define OP_SH 051 170 #define OP_SWL 052 171 #define OP_SW 053 172 #define OP_SDL 054 /* MIPS-II, for r4000 port */ 173 #define OP_SDR 055 /* MIPS-II, for r4000 port */ 174 #define OP_SWR 056 175 #define OP_CACHE 057 /* MIPS-II, for r4000 port */ 176 177 #define OP_LL 060 178 #define OP_LWC0 OP_LL /* backwards source compatibility */ 179 #define OP_LWC1 061 180 #define OP_LWC2 062 181 #define OP_PREF 063 182 #define OP_LLD 064 /* MIPS-II, for r4000 port */ 183 #define OP_LDC1 065 184 #define OP_LDC2 066 185 #define OP_LD 067 /* MIPS-II, for r4000 port */ 186 #define OP_CVM_BBIT0 OP_LWC2 187 #define OP_CVM_BBIT032 OP_LDC2 188 189 #define OP_SC 070 190 #define OP_SWC0 OP_SC /* backwards source compatibility */ 191 #define OP_SWC1 071 192 #define OP_SWC2 072 193 #define OP_RSVD073 073 194 #define OP_SCD 074 /* MIPS-II, for r4000 port */ 195 #define OP_SDC1 075 196 #define OP_SDC2 076 197 #define OP_SD 077 /* MIPS-II, for r4000 port */ 198 #define OP_CVM_BBIT1 OP_SWC2 199 #define OP_CVM_BBIT132 OP_SDC2 200 201 /* 202 * Values for the 'func' field when 'op' == OP_SPECIAL. 203 */ 204 #define OP_SLL 000 205 #define OP_SRL 002 206 #define OP_SRA 003 207 #define OP_SLLV 004 208 #define OP_SRLV 006 209 #define OP_SRAV 007 210 211 #define OP_JR 010 212 #define OP_JALR 011 213 #define OP_SYSCALL 014 214 #define OP_BREAK 015 215 #define OP_SYNC 017 /* MIPS-II, for r4000 port */ 216 217 #define SYNC_CVM_IODBDMA 0x02 218 #define SYNC_WMB 0x04 219 #define SYNC_CVM_W SYNC_WMB 220 #define SYNC_CVM_WS 0x05 221 #define SYNC_CVM_S 0x06 222 #define SYNC_MB 0x10 223 #define SYNC_ACQUIRE 0x11 224 #define SYNC_RELEASE 0x12 225 #define SYNC_RMB 0x13 226 227 #define OP_MFHI 020 228 #define OP_MTHI 021 229 #define OP_MFLO 022 230 #define OP_MTLO 023 231 #define OP_DSLLV 024 /* MIPS-II, for r4000 port */ 232 #define OP_DSRLV 026 /* MIPS-II, for r4000 port */ 233 #define OP_DSRAV 027 /* MIPS-II, for r4000 port */ 234 235 #define OP_MULT 030 236 #define OP_MULTU 031 237 #define OP_DIV 032 238 #define OP_DIVU 033 239 #define OP_DMULT 034 /* MIPS-II, for r4000 port */ 240 #define OP_DMULTU 035 /* MIPS-II, for r4000 port */ 241 #define OP_DDIV 036 /* MIPS-II, for r4000 port */ 242 #define OP_DDIVU 037 /* MIPS-II, for r4000 port */ 243 244 #define OP_ADD 040 245 #define OP_ADDU 041 246 #define OP_SUB 042 247 #define OP_SUBU 043 248 #define OP_AND 044 249 #define OP_OR 045 250 #define OP_XOR 046 251 #define OP_NOR 047 252 253 #define OP_SLT 052 254 #define OP_SLTU 053 255 #define OP_DADD 054 /* MIPS-II, for r4000 port */ 256 #define OP_DADDU 055 /* MIPS-II, for r4000 port */ 257 #define OP_DSUB 056 /* MIPS-II, for r4000 port */ 258 #define OP_DSUBU 057 /* MIPS-II, for r4000 port */ 259 260 #define OP_TGE 060 /* MIPS-II, for r4000 port */ 261 #define OP_TGEU 061 /* MIPS-II, for r4000 port */ 262 #define OP_TLT 062 /* MIPS-II, for r4000 port */ 263 #define OP_TLTU 063 /* MIPS-II, for r4000 port */ 264 #define OP_TEQ 064 /* MIPS-II, for r4000 port */ 265 #define OP_TNE 066 /* MIPS-II, for r4000 port */ 266 267 #define OP_DSLL 070 /* MIPS-II, for r4000 port */ 268 #define OP_DSRL 072 /* MIPS-II, for r4000 port */ 269 #define OP_DSRA 073 /* MIPS-II, for r4000 port */ 270 #define OP_DSLL32 074 /* MIPS-II, for r4000 port */ 271 #define OP_DSRL32 076 /* MIPS-II, for r4000 port */ 272 #define OP_DSRA32 077 /* MIPS-II, for r4000 port */ 273 274 /* 275 * Values for the 'func' field when 'op' == OP_SPECIAL2. 276 */ 277 #define OP_MADD 000 /* QED */ 278 #define OP_MADDU 001 /* QED */ 279 #define OP_MUL 002 /* QED */ 280 #define OP_CVM_DMUL 003 /* OCTEON */ 281 #define OP_MSUB 004 /* MIPS32/64 */ 282 #define OP_MSUBU 005 /* MIPS32/64 */ 283 #define OP_CVM_SAA 030 /* OCTEON */ 284 #define OP_CVM_SAAD 031 /* OCTEON */ 285 #define OP_CLZ 040 /* MIPS32/64 */ 286 #define OP_CLO 041 /* MIPS32/64 */ 287 #define OP_DCLZ 044 /* MIPS32/64 */ 288 #define OP_DCLO 045 /* MIPS32/64 */ 289 #define OP_CVM_BADDU 050 /* OCTEON */ 290 #define OP_CVM_SEQ 052 /* OCTEON */ 291 #define OP_CVM_SNE 053 /* OCTEON */ 292 #define OP_CVM_SEQI 056 /* OCTEON */ 293 #define OP_CVM_SNEI 057 /* OCTEON */ 294 #define OP_CVM_POP 054 /* OCTEON */ 295 #define OP_CVM_DPOP 055 /* OCTEON */ 296 #define OP_CVM_CINS 062 /* OCTEON */ 297 #define OP_CVM_CINS32 063 /* OCTEON */ 298 #define OP_CVM_EXTS 072 /* OCTEON */ 299 #define OP_CVM_EXTS32 073 /* OCTEON */ 300 #define OP_SDBBP 077 /* MIPS32/MIPS64 */ 301 302 /* 303 * Values for the 'func' field when 'op' == OP_SPECIAL3. 304 */ 305 #define OP_EXT 000 /* MIPS32/64 r2 */ 306 #define OP_DEXTM 001 /* MIPS32/64 r2 */ 307 #define OP_DEXTU 002 /* MIPS32/64 r2 */ 308 #define OP_DEXT 003 /* MIPS32/64 r2 */ 309 #define OP_INS 004 /* MIPS32/64 r2 */ 310 #define OP_DINSM 005 /* MIPS32/64 r2 */ 311 #define OP_DINSU 006 /* MIPS32/64 r2 */ 312 #define OP_DINS 007 /* MIPS32/64 r2 */ 313 #define OP_LX 012 /* DSP */ 314 #define OP_LWLE 031 /* EVA */ 315 #define OP_LWRE 032 /* EVA */ 316 #define OP_CACHEE 033 /* EVA */ 317 #define OP_SBE 034 /* EVA */ 318 #define OP_SHE 035 /* EVA */ 319 #define OP_SCE 035 /* EVA */ 320 #define OP_SWE 035 /* EVA */ 321 #define OP_BSHFL 040 /* MIPS32/64 r2 */ 322 #define OP_SWLE 041 /* EVA */ 323 #define OP_SWRE 042 /* EVA */ 324 #define OP_PREFE 043 /* EVA */ 325 #define OP_DBSHFL 044 /* MIPS32/64 r2 */ 326 #define OP_LBUE 050 /* EVA */ 327 #define OP_LHUE 051 /* EVA */ 328 #define OP_LBE 054 /* EVA */ 329 #define OP_LHE 055 /* EVA */ 330 #define OP_LLE 056 /* EVA */ 331 #define OP_LWE 057 /* EVA */ 332 #define OP_RDHWR 073 /* MIPS32/64 r2 */ 333 334 #define OP_BSHFL_SBH 002 /* swap bytes within halfwords */ 335 #define OP_BSHFL_SHD 005 /* swap halfworks within double */ 336 #define OP_BSHFL_SEB 020 /* sign extend byte */ 337 #define OP_BSHFL_SEH 030 /* sign extend halfword */ 338 339 #define OP_LX_LWX 0 /* lwx */ 340 #define OP_LX_LHX 4 /* lhx */ 341 #define OP_LX_LBUX 6 /* lbux */ 342 #define OP_LX_LDX 8 /* ldx */ 343 344 /* 345 * Values for the 'func' field when 'op' == OP_REGIMM. 346 */ 347 #define OP_BLTZ 000 348 #define OP_BGEZ 001 349 #define OP_BLTZL 002 /* MIPS-II, for r4000 port */ 350 #define OP_BGEZL 003 /* MIPS-II, for r4000 port */ 351 352 #define OP_TGEI 010 /* MIPS-II, for r4000 port */ 353 #define OP_TGEIU 011 /* MIPS-II, for r4000 port */ 354 #define OP_TLTI 012 /* MIPS-II, for r4000 port */ 355 #define OP_TLTIU 013 /* MIPS-II, for r4000 port */ 356 #define OP_TEQI 014 /* MIPS-II, for r4000 port */ 357 #define OP_TNEI 016 /* MIPS-II, for r4000 port */ 358 359 #define OP_BLTZAL 020 /* MIPS-II, for r4000 port */ 360 #define OP_BGEZAL 021 361 #define OP_BLTZALL 022 362 #define OP_BGEZALL 023 363 364 /* 365 * Values for the 'rs' field when 'op' == OP_COPz. 366 */ 367 #define OP_MF 000 368 #define OP_DMF 001 /* MIPS-II, for r4000 port */ 369 #define OP_CF 002 370 #define OP_MFH 003 371 #define OP_MT 004 372 #define OP_DMT 005 /* MIPS-II, for r4000 port */ 373 #define OP_CT 006 374 #define OP_MTH 007 375 #define OP_BCx 010 376 #define OP_MFM 013 /* MIPS32/64 r2 */ 377 #define OP_BCy 014 378 379 /* 380 * Values for the 'rt' field when 'op' == OP_COPz. 381 */ 382 #define COPz_BC_TF_MASK 0x01 383 #define COPz_BC_TRUE 0x01 384 #define COPz_BC_FALSE 0x00 385 #define COPz_BCL_TF_MASK 0x02 /* MIPS-II, for r4000 port */ 386 #define COPz_BCL_TRUE 0x02 /* MIPS-II, for r4000 port */ 387 #define COPz_BCL_FALSE 0x00 /* MIPS-II, for r4000 port */ 388 389 #define INSN_LUI_P(insn) (((insn) >> 26) == OP_LUI) 390 #define INSN_LW_P(insn) (((insn) >> 26) == OP_LW) 391 #define INSN_SW_P(insn) (((insn) >> 26) == OP_SW) 392 #define INSN_LD_P(insn) (((insn) >> 26) == OP_LD) 393 #define INSN_SD_P(insn) (((insn) >> 26) == OP_SD) 394 395 #define INSN_LOAD_P(insn) (INSN_LD_P(insn) || INSN_LW_P(insn)) 396 #define INSN_STORE_P(insn) (INSN_SD_P(insn) || INSN_SW_P(insn)) 397 398 #endif /* _MIPS_MIPS_OPCODE_H_ */ 399
Indexes created Mon Sep 22 10:09:38 GMT 2025