rmixl_intr.h revision 1.2.2.2
1 1.2.2.2 rmind /* $NetBSD: rmixl_intr.h,v 1.2.2.2 2011/03/05 20:51:10 rmind Exp $ */ 2 1.2.2.2 rmind /*- 3 1.2.2.2 rmind * Copyright (c) 2010 The NetBSD Foundation, Inc. 4 1.2.2.2 rmind * All rights reserved. 5 1.2.2.2 rmind * 6 1.2.2.2 rmind * This code is derived from software contributed to The NetBSD Foundation 7 1.2.2.2 rmind * by Cliff Neighbors. 8 1.2.2.2 rmind * 9 1.2.2.2 rmind * Redistribution and use in source and binary forms, with or without 10 1.2.2.2 rmind * modification, are permitted provided that the following conditions 11 1.2.2.2 rmind * are met: 12 1.2.2.2 rmind * 1. Redistributions of source code must retain the above copyright 13 1.2.2.2 rmind * notice, this list of conditions and the following disclaimer. 14 1.2.2.2 rmind * 2. Redistributions in binary form must reproduce the above copyright 15 1.2.2.2 rmind * notice, this list of conditions and the following disclaimer in the 16 1.2.2.2 rmind * documentation and/or other materials provided with the distribution. 17 1.2.2.2 rmind * 18 1.2.2.2 rmind * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 1.2.2.2 rmind * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 1.2.2.2 rmind * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 1.2.2.2 rmind * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 1.2.2.2 rmind * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 1.2.2.2 rmind * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 1.2.2.2 rmind * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 1.2.2.2 rmind * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 1.2.2.2 rmind * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 1.2.2.2 rmind * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 1.2.2.2 rmind * POSSIBILITY OF SUCH DAMAGE. 29 1.2.2.2 rmind */ 30 1.2.2.2 rmind 31 1.2.2.2 rmind #ifndef _MIPS_RMI_RMIXL_INTR_H_ 32 1.2.2.2 rmind #define _MIPS_RMI_RMIXL_INTR_H_ 33 1.2.2.2 rmind 34 1.2.2.2 rmind #ifdef _KERNEL_OPT 35 1.2.2.2 rmind #include "opt_multiprocessor.h" 36 1.2.2.2 rmind #endif 37 1.2.2.2 rmind 38 1.2.2.2 rmind /* 39 1.2.2.2 rmind * A 'vector' is bit number in EIRR/EIMR 40 1.2.2.2 rmind * - non-IRT-based interrupts use vectors 0..31 41 1.2.2.2 rmind * - IRT-based interrupts use vectors 32..63 42 1.2.2.2 rmind * - RMIXL_VECTOR_IRT(vec) is used to index into the IRT 43 1.2.2.2 rmind * - IRT entry n always routes to vector RMIXL_IRT_VECTOR(n) 44 1.2.2.2 rmind * - only 1 intrhand_t per vector 45 1.2.2.2 rmind */ 46 1.2.2.2 rmind #define NINTRVECS 64 /* bit width of the EIRR */ 47 1.2.2.2 rmind #define NIRTS 32 /* #entries in the Interrupt Redirection Table */ 48 1.2.2.2 rmind 49 1.2.2.2 rmind /* 50 1.2.2.2 rmind * mapping between IRT index and vector number 51 1.2.2.2 rmind */ 52 1.2.2.2 rmind #define RMIXL_VECTOR_IS_IRT(vec) ((vec) >= 32) 53 1.2.2.2 rmind #define RMIXL_IRT_VECTOR(irt) ((irt) + 32) 54 1.2.2.2 rmind #define RMIXL_VECTOR_IRT(vec) ((vec) - 32) 55 1.2.2.2 rmind 56 1.2.2.2 rmind /* 57 1.2.2.2 rmind * vectors (0 <= vec < 8) are CAUSE[8..15] (including softintrs and count/compare) 58 1.2.2.2 rmind * vectors (8 <= vec < 31) are for other non-IRT based interrupts 59 1.2.2.2 rmind */ 60 1.2.2.2 rmind #define RMIXL_INTRVEC_IPI 8 61 1.2.2.2 rmind #define RMIXL_INTRVEC_FMN (RMIXL_INTRVEC_IPI + NIPIS) 62 1.2.2.2 rmind 63 1.2.2.2 rmind typedef enum { 64 1.2.2.2 rmind RMIXL_TRIG_NONE=0, 65 1.2.2.2 rmind RMIXL_TRIG_EDGE, 66 1.2.2.2 rmind RMIXL_TRIG_LEVEL, 67 1.2.2.2 rmind } rmixl_intr_trigger_t; 68 1.2.2.2 rmind 69 1.2.2.2 rmind typedef enum { 70 1.2.2.2 rmind RMIXL_POLR_NONE=0, 71 1.2.2.2 rmind RMIXL_POLR_RISING, 72 1.2.2.2 rmind RMIXL_POLR_HIGH, 73 1.2.2.2 rmind RMIXL_POLR_FALLING, 74 1.2.2.2 rmind RMIXL_POLR_LOW, 75 1.2.2.2 rmind } rmixl_intr_polarity_t; 76 1.2.2.2 rmind 77 1.2.2.2 rmind 78 1.2.2.2 rmind /* 79 1.2.2.2 rmind * iv_list and ref count manage sharing of each vector 80 1.2.2.2 rmind */ 81 1.2.2.2 rmind typedef struct rmixl_intrhand { 82 1.2.2.2 rmind int (*ih_func)(void *); 83 1.2.2.2 rmind void *ih_arg; 84 1.2.2.2 rmind int ih_mpsafe; /* true if does not need kernel lock */ 85 1.2.2.2 rmind int ih_vec; /* vector is bit number in EIRR/EIMR */ 86 1.2.2.2 rmind int ih_ipl; /* interrupt priority */ 87 1.2.2.2 rmind int ih_cpumask; /* CPUs which may handle this irpt */ 88 1.2.2.2 rmind } rmixl_intrhand_t; 89 1.2.2.2 rmind 90 1.2.2.2 rmind /* 91 1.2.2.2 rmind * stuff exported from rmixl_spl.S 92 1.2.2.2 rmind */ 93 1.2.2.2 rmind extern const struct splsw rmixl_splsw; 94 1.2.2.2 rmind extern uint64_t ipl_eimr_map[]; 95 1.2.2.2 rmind 96 1.2.2.2 rmind extern void *rmixl_intr_establish(int, int, int, 97 1.2.2.2 rmind rmixl_intr_trigger_t, rmixl_intr_polarity_t, 98 1.2.2.2 rmind int (*)(void *), void *, bool); 99 1.2.2.2 rmind extern void rmixl_intr_disestablish(void *); 100 1.2.2.2 rmind extern void *rmixl_vec_establish(int, int, int, 101 1.2.2.2 rmind int (*)(void *), void *, bool); 102 1.2.2.2 rmind extern void rmixl_vec_disestablish(void *); 103 1.2.2.2 rmind extern const char *rmixl_intr_string(int); 104 1.2.2.2 rmind extern void rmixl_intr_init_cpu(struct cpu_info *); 105 1.2.2.2 rmind extern void rmixl_intr_init_clk(void); 106 1.2.2.2 rmind #ifdef MULTIPROCESSOR 107 1.2.2.2 rmind extern void rmixl_intr_init_ipi(void); 108 1.2.2.2 rmind #endif 109 1.2.2.2 rmind 110 1.2.2.2 rmind #endif /* _MIPS_RMI_RMIXL_INTR_H_ */ 111
Indexes created Thu Oct 23 22:10:10 GMT 2025