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rmixl_intr.h revision 1.1.2.12 
      1 /*	$NetBSD: rmixl_intr.h,v 1.1.2.12 2012/01/04 16:17:53 matt Exp $	*/
      2 /*-
      3  * Copyright (c) 2010 The NetBSD Foundation, Inc.
      4  * All rights reserved.
      5  *
      6  * This code is derived from software contributed to The NetBSD Foundation
      7  * by Cliff Neighbors.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  *
     18  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     28  * POSSIBILITY OF SUCH DAMAGE.
     29  */
     30 
     31 #ifndef _MIPS_RMI_RMIXL_INTR_H_
     32 #define _MIPS_RMI_RMIXL_INTR_H_
     33 
     34 #ifdef _KERNEL_OPT
     35 #include "opt_multiprocessor.h"
     36 #endif
     37 
     38 /*
     39  * A 'vector' is bit number in EIRR/EIMR
     40  * - IRT or non-IRT interrupts use vectors 8..63
     41  * - vector or dynamically assigned (except for IPI and FMN)
     42  */
     43 #define	NINTRVECS	64	/* bit width of the EIRR */
     44 #define	RMIXLP_NIRTS	160	/* #entries in Interrupt Redirection Table */
     45 #define	RMIXLR_NIRTS	32	/* #entries in Interrupt Redirection Table */
     46 #define	RMIXLS_NIRTS	32	/* #entries in Interrupt Redirection Table */
     47 
     48 /*
     49  * vectors (0 <= vec < 8)  are CAUSE[8..15] (including softintrs and count/compare)
     50  */
     51 #define RMIXL_INTRVEC_IPI	8
     52 
     53 #define	RMIXLP_IRT_PCIE_MSIX	46
     54 
     55 /*
     56  * iv_list and ref count manage sharing of each vector
     57  */
     58 typedef struct rmixl_intrhand {
     59 	LIST_ENTRY(rmixl_intrhand) ih_link;
     60         int (*ih_func)(void *);
     61         void *ih_arg;
     62         bool ih_mpsafe; 		/* true if does not need kernel lock */
     63         uint8_t ih_vec;			/* vector is bit number in EIRR/EIMR */
     64 } rmixl_intrhand_t;
     65 
     66 typedef struct rmixl_intrvec {
     67 	LIST_HEAD(, rmixl_intrhand) iv_hands;
     68 	TAILQ_ENTRY(rmixl_intrvec) iv_lruq_link;
     69 	rmixl_intrhand_t iv_intrhand;
     70         uint8_t iv_ipl; 		/* interrupt priority */
     71 } rmixl_intrvec_t;
     72 
     73 typedef TAILQ_HEAD(rmixl_intrvecq, rmixl_intrvec) rmixl_intrvecq_t;
     74 
     75 static inline int
     76 rmixl_intr_deliver(int (*func)(void *), void *arg, bool mpsafe_p,
     77 	struct evcnt *ev, int ipl)
     78 {
     79 	int rv;
     80 #ifndef MULTIPROCESSOR
     81 	mpsafe_p = true;
     82 #endif
     83 	if (mpsafe_p) {
     84 		rv = (*func)(arg);
     85 	} else {
     86 		KASSERTMSG(ipl == IPL_VM,
     87 		    ("%s: %s: ipl (%d) != IPL_VM for KERNEL_LOCK",
     88 		    __func__, ev->ev_name, ipl));
     89 		KERNEL_LOCK(1, NULL);
     90 		rv = (*func)(arg);
     91 		KERNEL_UNLOCK_ONE(NULL);
     92 	}
     93 	ev->ev_count++;
     94 	return rv;
     95 }
     96 
     97 /*
     98  * stuff exported from rmixl_spl.S
     99  */
    100 extern const struct splsw rmixl_splsw;
    101 extern uint64_t ipl_eimr_map[];
    102 extern kmutex_t *rmixl_intr_lock;
    103 
    104 void *	rmixl_intr_establish(size_t /* irt */, int /* ipl */, int /* ist */,
    105 	    int (*)(void *), void *, bool);
    106 void	rmixl_intr_disestablish(void *);
    107 void *	rmixl_vec_establish(size_t /* vec */, rmixl_intrhand_t *, int /* ipl */,
    108 	    int (*)(void *), void *, bool);
    109 void	rmixl_vec_disestablish(void *);
    110 size_t	rmixl_intr_get_vec(int /* ipl */);
    111 const char *
    112 	rmixl_intr_string(size_t);
    113 const char *
    114 	rmixl_irt_string(size_t);
    115 void	rmixl_intr_init_cpu(struct cpu_info *);
    116 void	rmixl_intr_init_clk(void);
    117 #ifdef MULTIPROCESSOR
    118 void	rmixl_intr_init_ipi(void);
    119 #endif
    120 
    121 void *	gpio_intr_establish(size_t /* pin */, int /* ipl */, int /* ist */,
    122 	    int (*)(void *), void *, bool);
    123 
    124 void	gpio_intr_disestablish(void *);
    125 #endif	/* _MIPS_RMI_RMIXL_INTR_H_ */
    126