1 /* ********************************************************************* 2 * BCM1280/BCM1480 Board Support Package 3 * 4 * Packet manager constants and macros File: bcm1480_pm.h 5 * 6 * This module contains constants useful for manipulating the 7 * BCM1280/BCM1480 packet manager. 8 * 9 * BCM1400 specification level: 1X55_1X80-UM100-D4 (11/24/03) 10 * 11 ********************************************************************* 12 * 13 * Copyright 2000,2001,2002,2003,2004 14 * Broadcom Corporation. All rights reserved. 15 * 16 * This software is furnished under license and may be used and 17 * copied only in accordance with the following terms and 18 * conditions. Subject to these conditions, you may download, 19 * copy, install, use, modify and distribute modified or unmodified 20 * copies of this software in source and/or binary form. No title 21 * or ownership is transferred hereby. 22 * 23 * 1) Any source code used, modified or distributed must reproduce 24 * and retain this copyright notice and list of conditions 25 * as they appear in the source file. 26 * 27 * 2) No right is granted to use any trade name, trademark, or 28 * logo of Broadcom Corporation. The "Broadcom Corporation" 29 * name may not be used to endorse or promote products derived 30 * from this software without the prior written permission of 31 * Broadcom Corporation. 32 * 33 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 34 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 35 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 36 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 37 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 38 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 39 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 40 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 41 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 42 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 43 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 44 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 45 * THE POSSIBILITY OF SUCH DAMAGE. 46 ********************************************************************* */ 47 48 #ifndef _BCM1480_PM_H 49 #define _BCM1480_PM_H 50 51 #include "sb1250_defs.h" 52 53 /* ********************************************************************* 54 * DMA Registers 55 ********************************************************************* */ 56 57 /* 58 * Base and Size Register (Table 294) 59 */ 60 61 #define S_BCM1480_PM_BASE 0 62 #define M_BCM1480_PM_BASE _SB_MAKEMASK(40,S_BCM1480_PM_BASE) 63 #define V_BCM1480_PM_BASE(x) _SB_MAKEVALUE(x,S_BCM1480_PM_BASE) 64 #define G_BCM1480_PM_BASE(x) _SB_GETVALUE(x,S_BCM1480_PM_BASE,M_BCM1480_PM_BASE) 65 66 #define S_BCM1480_PM_SIZE 40 67 #define M_BCM1480_PM_SIZE _SB_MAKEMASK(20,S_BCM1480_PM_SIZE) 68 #define V_BCM1480_PM_SIZE(x) _SB_MAKEVALUE(x,S_BCM1480_PM_SIZE) 69 #define G_BCM1480_PM_SIZE(x) _SB_GETVALUE(x,S_BCM1480_PM_SIZE,M_BCM1480_PM_SIZE) 70 71 /* 72 * Descriptor Merge Timer (Table 295) 73 */ 74 75 #define S_BCM1480_PM_DS_MT_CNT 0 76 #define M_BCM1480_PM_DS_MT_CNT _SB_MAKEMASK(6,S_BCM1480_PM_DS_MT_CNT) 77 #define V_BCM1480_PM_DS_MT_CNT(x) _SB_MAKEVALUE(x,S_BCM1480_PM_DS_MT_CNT) 78 #define G_BCM1480_PM_DS_MT_CNT(x) _SB_GETVALUE(x,S_BCM1480_PM_DS_MT_CNT,M_BCM1480_PM_DS_MT_CNT) 79 80 /* 81 * L2 Cache Attribute (Table 296) 82 */ 83 84 #define S_BCM1480_PM_HDR_SIZE 0 85 #define M_BCM1480_PM_HDR_SIZE _SB_MAKEMASK(9,S_BCM1480_PM_HDR_SIZE) 86 #define V_BCM1480_PM_HDR_SIZE(x) _SB_MAKEVALUE(x,S_BCM1480_PM_HDR_SIZE) 87 #define G_BCM1480_PM_HDR_SIZE(x) _SB_GETVALUE(x,S_BCM1480_PM_HDR_SIZE,M_BCM1480_PM_HDR_SIZE) 88 89 /* 90 * Descriptor Count Register (Table 297) 91 */ 92 93 #define S_BCM1480_PM_COUNT 0 94 #define M_BCM1480_PM_COUNT _SB_MAKEMASK(20,S_BCM1480_PM_COUNT) 95 #define V_BCM1480_PM_COUNT(x) _SB_MAKEVALUE(x,S_BCM1480_PM_COUNT) 96 #define G_BCM1480_PM_COUNT(x) _SB_GETVALUE(x,S_BCM1480_PM_COUNT,M_BCM1480_PM_COUNT) 97 98 /* 99 * Current Descriptor Index Register (Table 298) 100 */ 101 102 #define S_BCM1480_PM_LAST 0 103 #define M_BCM1480_PM_LAST _SB_MAKEMASK(20,S_BCM1480_PM_LAST) 104 #define V_BCM1480_PM_LAST(x) _SB_MAKEVALUE(x,S_BCM1480_PM_LAST) 105 #define G_BCM1480_PM_LAST(x) _SB_GETVALUE(x,S_BCM1480_PM_LAST,M_BCM1480_PM_LAST) 106 107 /* 108 * Packet Manager Queue Configuration (Table 299) 109 */ 110 111 #define M_BCM1480_PM_QUEUE_ENABLE _SB_MAKEMASK1(0) 112 #define M_BCM1480_PM_DS_CACHE_EN _SB_MAKEMASK1(1) 113 #define M_BCM1480_PM_HW_ASSERT _SB_MAKEMASK1(2) 114 #define M_BCM1480_PM_HW_ERROR _SB_MAKEMASK1(3) 115 116 #define S_BCM1480_PM_SW_ERROR 4 117 #define M_BCM1480_PM_SW_ERROR _SB_MAKEMASK(3,S_BCM1480_PM_SW_ERROR) 118 #define V_BCM1480_PM_SW_ERROR(x) _SB_MAKEVALUE(x,S_BCM1480_PM_SW_ERROR) 119 #define G_BCM1480_PM_SW_ERROR(x) _SB_GETVALUE(x,S_BCM1480_PM_SW_ERROR,M_BCM1480_PM_SW_ERROR) 120 #define K_BCM1480_PM_SW_ERROR_NONE 0x0 121 #define K_BCM1480_PM_SW_ERROR_HWBIT 0x1 122 123 #define M_BCM1480_PM_FLUSH _SB_MAKEMASK1(7) 124 125 /* 126 * Interrupt Configuration (Table 300) 127 */ 128 129 #define S_BCM1480_PM_INT_CORE_ID 0 130 #define M_BCM1480_PM_INT_CORE_ID _SB_MAKEMASK(2,S_BCM1480_PM_INT_CORE_ID) 131 #define V_BCM1480_PM_INT_CORE_ID(x) _SB_MAKEVALUE(x,S_BCM1480_PM_INT_CORE_ID) 132 #define G_BCM1480_PM_INT_CORE_ID(x) _SB_GETVALUE(x,S_BCM1480_PM_INT_CORE_ID,M_BCM1480_PM_INT_CORE_ID) 133 134 #define M_BCM1480_PM_INT_PRIORITY _SB_MAKEMASK1(4) 135 136 #define S_BCM1480_PM_INT_TIMEOUT 5 137 #define M_BCM1480_PM_INT_TIMEOUT _SB_MAKEMASK(5,S_BCM1480_PM_INT_TIMEOUT) 138 #define V_BCM1480_PM_INT_TIMEOUT(x) _SB_MAKEVALUE(x,S_BCM1480_PM_INT_TIMEOUT) 139 #define G_BCM1480_PM_INT_TIMEOUT(x) _SB_GETVALUE(x,S_BCM1480_PM_INT_TIMEOUT,M_BCM1480_PM_INT_TIMEOUT) 140 141 #define S_BCM1480_PM_INT_PKT_CNT 11 142 #define M_BCM1480_PM_INT_PKT_CNT _SB_MAKEMASK(12,S_BCM1480_PM_INT_PKT_CNT) 143 #define V_BCM1480_PM_INT_PKT_CNT(x) _SB_MAKEVALUE(x,S_BCM1480_PM_INT_PKT_CNT) 144 #define G_BCM1480_PM_INT_PKT_CNT(x) _SB_GETVALUE(x,S_BCM1480_PM_INT_PKT_CNT,M_BCM1480_PM_INT_PKT_CNT) 145 146 /* 147 * Interrupt Watermark (Table 301) 148 */ 149 150 #define S_BCM1480_PM_LOW_WATERMARK 0 151 #define M_BCM1480_PM_LOW_WATERMARK _SB_MAKEMASK(20,S_BCM1480_PM_LOW_WATERMARK) 152 #define V_BCM1480_PM_LOW_WATERMARK(x) _SB_MAKEVALUE(x,S_BCM1480_PM_LOW_WATERMARK) 153 #define G_BCM1480_PM_LOW_WATERMARK(x) _SB_GETVALUE(x,S_BCM1480_PM_LOW_WATERMARK,M_BCM1480_PM_LOW_WATERMARK) 154 155 #define S_BCM1480_PM_HIGH_WATERMARK 20 156 #define M_BCM1480_PM_HIGH_WATERMARK _SB_MAKEMASK(20,S_BCM1480_PM_HIGH_WATERMARK) 157 #define V_BCM1480_PM_HIGH_WATERMARK(x) _SB_MAKEVALUE(x,S_BCM1480_PM_HIGH_WATERMARK) 158 #define G_BCM1480_PM_HIGH_WATERMARK(x) _SB_GETVALUE(x,S_BCM1480_PM_HIGH_WATERMARK,M_BCM1480_PM_HIGH_WATERMARK) 159 160 161 /* 162 * NOTE: Interrupt Bits (Tables 9-36 to 9-38) are packed 8 per word 163 * per Table 9-39. 164 */ 165 166 167 #define S_BCM1480_PM_INT(q) ((q%8)<<8) 168 #define M_BCM1480_PM_INT(q) _SB_MAKEMASK(8,S_BCM1480_PM_INT(q)) 169 #define V_BCM1480_PM_INT(x,q) _SB_MAKEVALUE((x&((1<<8)-1)),S_BCM1480_PM_INT(q)) 170 #define G_BCM1480_PM_INT(x,q) _SB_GETVALUE(x,S_BCM1480_PM_INT(q),M_BCM1480_PM_INT(q)) 171 172 173 /* 174 * Input/Output Queue Interrupt Status Register (Table 302) 175 */ 176 177 #define M_BCM1480_PM_EOP_COUNT _SB_MAKEMASK1(0) 178 #define M_BCM1480_PM_EOP_SEEN _SB_MAKEMASK1(1) 179 #define M_BCM1480_PM_RCV_TIMER _SB_MAKEMASK1(2) 180 #define M_BCM1480_PM_DE _SB_MAKEMASK1(3) 181 #define M_BCM1480_PM_HWM _SB_MAKEMASK1(4) 182 #define M_BCM1480_PM_LWM _SB_MAKEMASK1(5) 183 #define M_BCM1480_PM_RX_ERR _SB_MAKEMASK1(6) 184 #define M_BCM1480_PM_PE_ERR _SB_MAKEMASK1(7) 185 186 /* 187 * Input/Output Queue Interrupt Mask Register (Table 303) 188 */ 189 190 #define M_BCM1480_PM_EOP_COUNT_MSK _SB_MAKEMASK1(0) 191 #define M_BCM1480_PM_EOP_SEEN_MSK _SB_MAKEMASK1(1) 192 #define M_BCM1480_PM_RCV_TIMER_MSK _SB_MAKEMASK1(2) 193 #define M_BCM1480_PM_DE_MSK _SB_MAKEMASK1(3) 194 #define M_BCM1480_PM_HWM_MSK _SB_MAKEMASK1(4) 195 #define M_BCM1480_PM_LWM_MSK _SB_MAKEMASK1(5) 196 #define M_BCM1480_PM_RX_ERR_MSK _SB_MAKEMASK1(6) 197 #define M_BCM1480_PM_PE_ERR_MSK _SB_MAKEMASK1(7) 198 199 /* 200 * Input/Output Queue Interrupt Clear Register (Table 304) 201 */ 202 203 #define M_BCM1480_PM_EOP_COUNT_CLR _SB_MAKEMASK1(0) 204 #define M_BCM1480_PM_EOP_SEEN_CLR _SB_MAKEMASK1(1) 205 #define M_BCM1480_PM_RCV_TIMER_CLR _SB_MAKEMASK1(2) 206 #define M_BCM1480_PM_DE_CLR _SB_MAKEMASK1(3) 207 #define M_BCM1480_PM_RX_ERR_CLR _SB_MAKEMASK1(6) 208 #define M_BCM1480_PM_PE_ERR_CLR _SB_MAKEMASK1(7) 209 210 /* 211 * Merged Interrupt Status Register (Table 306) 212 */ 213 214 #define M_INT_N(n) _SB_MAKEMASK1(n) 215 216 217 /* 218 * PMO Mapping Register (Table 279) 219 */ 220 221 #define S_BCM1480_PM_MAP_DEST_ID0 0 222 #define M_BCM1480_PM_MAP_DEST_ID0 _SB_MAKEMASK(2,S_BCM1480_PM_MAP_DEST_ID0) 223 #define V_BCM1480_PM_MAP_DEST_ID0(x) _SB_MAKEVALUE(x,S_BCM1480_PM_MAP_DEST_ID0) 224 #define G_BCM1480_PM_MAP_DEST_ID0(x) _SB_GETVALUE(x,S_BCM1480_PM_MAP_DEST_ID0,M_BCM1480_PM_MAP_DEST_ID0) 225 226 #define S_BCM1480_PM_MAP_DEST_ID8 4 227 #define M_BCM1480_PM_MAP_DEST_ID8 _SB_MAKEMASK(2,S_BCM1480_PM_MAP_DEST_ID8) 228 #define V_BCM1480_PM_MAP_DEST_ID8(x) _SB_MAKEVALUE(x,S_BCM1480_PM_MAP_DEST_ID8) 229 #define G_BCM1480_PM_MAP_DEST_ID8(x) _SB_GETVALUE(x,S_BCM1480_PM_MAP_DEST_ID8,M_BCM1480_PM_MAP_DEST_ID8) 230 231 #define S_BCM1480_PM_MAP_DEST_ID16 8 232 #define M_BCM1480_PM_MAP_DEST_ID16 _SB_MAKEMASK(2,S_BCM1480_PM_MAP_DEST_ID16) 233 #define V_BCM1480_PM_MAP_DEST_ID16(x) _SB_MAKEVALUE(x,S_BCM1480_PM_MAP_DEST_ID16) 234 #define G_BCM1480_PM_MAP_DEST_ID16(x) _SB_GETVALUE(x,S_BCM1480_PM_MAP_DEST_ID16,M_BCM1480_PM_MAP_DEST_ID16) 235 236 #define S_BCM1480_PM_MAP_DEST_ID24 12 237 #define M_BCM1480_PM_MAP_DEST_ID24 _SB_MAKEMASK(2,S_BCM1480_PM_MAP_DEST_ID24) 238 #define V_BCM1480_PM_MAP_DEST_ID24(x) _SB_MAKEVALUE(x,S_BCM1480_PM_MAP_DEST_ID24) 239 #define G_BCM1480_PM_MAP_DEST_ID24(x) _SB_GETVALUE(x,S_BCM1480_PM_MAP_DEST_ID24,M_BCM1480_PM_MAP_DEST_ID24) 240 241 #define M_BCM1480_PM_MAP_DEST_HALF0 _SB_MAKEMASK1(2) 242 #define M_BCM1480_PM_MAP_DEST_HALF8 _SB_MAKEMASK1(6) 243 #define M_BCM1480_PM_MAP_DEST_HALF16 _SB_MAKEMASK1(10) 244 #define M_BCM1480_PM_MAP_DEST_HALF24 _SB_MAKEMASK1(14) 245 246 #define K_BCM1480_PM_MAP_DEST_ID_TX0 0 247 #define K_BCM1480_PM_MAP_DEST_ID_TX1 1 248 #define K_BCM1480_PM_MAP_DEST_ID_TX2 2 249 250 251 252 /* 253 * Global Debug Mode Register (Table 307) 254 */ 255 256 #define M_BCM1480_PM_DEBUG_MODE _SB_MAKEMASK1(0) 257 #define M_BCM1480_PM_READ_PRIORITY _SB_MAKEMASK1(1) 258 #define M_BCM1480_PM_WRITE_PRIORITY _SB_MAKEMASK1(2) 259 260 /* 261 * PxD Global Debug Register (Table 308) 262 */ 263 264 /* 265 * PIB Global Debug Register (Table 310) 266 */ 267 268 /* 269 * PxD Local Debug Register (Table 311) 270 */ 271 272 /* 273 * PIB Local Debug Register (Table 312) 274 */ 275 276 /* 277 * POB Local Debug Register (Table 313) 278 */ 279 280 /* 281 * Prefetch Count Register (Table 314) 282 */ 283 284 #define S_BCM1480_PM_PREF_COUNT 0 285 #define M_BCM1480_PM_PREF_COUNT _SB_MAKEMASK(20,S_BCM1480_PM_PREF_COUNT) 286 #define V_BCM1480_PM_PREF_COUNT(x) _SB_MAKEVALUE(x,S_BCM1480_PM_PREF_COUNT) 287 #define G_BCM1480_PM_PREF_COUNT(x) _SB_GETVALUE(x,S_BCM1480_PM_PREF_COUNT,M_BCM1480_PM_PREF_COUNT) 288 289 /* 290 * Descriptor Prefetch Index Register (Table 315) 291 */ 292 293 #define S_BCM1480_PM_PREFETCH 0 294 #define M_BCM1480_PM_PREFETCH _SB_MAKEMASK(20,S_BCM1480_PM_PREFETCH) 295 #define V_BCM1480_PM_PREFETCH(x) _SB_MAKEVALUE(x,S_BCM1480_PM_PREFETCH) 296 #define G_BCM1480_PM_PREFETCH(x) _SB_GETVALUE(x,S_BCM1480_PM_PREFETCH,M_BCM1480_PM_PREFETCH) 297 298 299 /* ********************************************************************* 300 * DMA Descriptors 301 ********************************************************************* */ 302 303 /* 304 * Packet Manager descriptor, doubleword 0 (Figure 74) 305 */ 306 307 #define S_BCM1480_PM_DSCR0_RSVD _SB_MAKE64(0) 308 #define M_BCM1480_PM_DSCR0_RSVD _SB_MAKEMASK(32,S_BCM1480_PM_DSCR0_RSVD) 309 310 #define S_BCM1480_PM_DSCR0_BUFFER_LENGTH _SB_MAKE64(32) 311 #define M_BCM1480_PM_DSCR0_BUFFER_LENGTH _SB_MAKEMASK(16,S_BCM1480_PM_DSCR0_BUFFER_LENGTH) 312 #define V_BCM1480_PM_DSCR0_BUFFER_LENGTH(x) _SB_MAKEVALUE(x,S_BCM1480_PM_DSCR0_BUFFER_LENGTH) 313 #define G_BCM1480_PM_DSCR0_BUFFER_LENGTH(x) _SB_GETVALUE(x,S_BCM1480_PM_DSCR0_BUFFER_LENGTH,M_BCM1480_PM_DSCR0_BUFFER_LENGTH) 314 315 /* status/control (Table 292) */ 316 #define M_BCM1480_PM_DSCR0_PE _SB_MAKEMASK1(55) 317 #define M_BCM1480_PM_DSCR0_SE _SB_MAKEMASK1(56) 318 #define M_BCM1480_PM_DSCR0_LE _SB_MAKEMASK1(57) 319 #define M_BCM1480_PM_DSCR0_INT _SB_MAKEMASK1(60) 320 #define M_BCM1480_PM_DSCR0_EOP _SB_MAKEMASK1(61) 321 #define M_BCM1480_PM_DSCR0_SOP _SB_MAKEMASK1(62) 322 #define M_BCM1480_PM_DSCR0_HW _SB_MAKEMASK1(63) 323 324 /* source port (rx only) */ 325 #define S_BCM1480_PM_DSCR0_SWID _SB_MAKE64(58) 326 #define M_BCM1480_PM_DSCR0_SWID _SB_MAKEMASK(2,S_BCM1480_PM_DSCR0_SWID) 327 #define V_BCM1480_PM_DSCR0_SWID(x) _SB_MAKEVALUE(x,S_BCM1480_PM_DSRC0_SWID) 328 #define G_BCM1480_PM_DSCR0_SWID(x) _SB_GETVALUE(x,S_BCM1480_PM_DSCR0_SWID,M_BCM1480_PM_DSCR0_SWID) 329 #define K_BCM1480_PM_DSCR0_SWID_RX0 0 330 #define K_BCM1480_PM_DSCR0_SWID_RX1 1 331 #define K_BCM1480_PM_DSCR0_SWID_RX2 2 332 333 /* 334 * Packet Manager descriptor, doubleword 1 (Figure 74) 335 */ 336 337 #define S_BCM1480_PM_DSCR1_BUFFER_ADDR _SB_MAKE64(0) 338 #define M_BCM1480_PM_DSCR1_BUFFER_ADDR _SB_MAKEMASK(40,S_BCM1480_PM_DSCR1_BUFFER_ADDR) 339 #define V_BCM1480_PM_DSCR1_BUFFER_ADDR(x) _SB_MAKEVALUE(x,S_BCM1480_PM_DSCR1_BUFFER_ADDR) 340 #define G_BCM1480_PM_DSCR1_BUFFER_ADDR(x) _SB_GETVALUE(x,S_BCM1480_PM_DSCR1_BUFFER_ADDR,M_BCM1480_PM_DSCR1_BUFFER_ADDR) 341 342 #define S_BCM1480_PM_DSCR1_IVC _SB_MAKE64(40) 343 #define M_BCM1480_PM_DSCR1_IVC _SB_MAKEMASK(8,S_BCM1480_PM_DSCR1_IVC) 344 #define V_BCM1480_PM_DSCR1_IVC(x) _SB_MAKEVALUE(x,S_BCM1480_PM_DSCR1_IVC) 345 #define G_BCM1480_PM_DSCR1_IVC(x) _SB_GETVALUE(x,S_BCM1480_PM_DSCR1_IVC,M_BCM1480_PM_DSCR1_IVC) 346 347 #define S_BCM1480_PM_DSCR1_NEXT_DEST _SB_MAKE64(48) 348 #define M_BCM1480_PM_DSCR1_NEXT_DEST _SB_MAKEMASK(4,S_BCM1480_PM_DSCR1_NEXT_DEST) 349 #define V_BCM1480_PM_DSCR1_NEXT_DEST(x) _SB_MAKEVALUE(x,S_BCM1480_PM_DSCR1_NEXT_DEST) 350 #define G_BCM1480_PM_DSCR1_NEXT_DEST(x) _SB_GETVALUE(x,S_BCM1480_PM_DSCR1_NEXT_DEST,M_BCM1480_PM_DSCR1_NEXT_DEST) 351 352 #define S_BCM1480_PM_DSCR1_RSVD _SB_MAKE64(52) 353 #define M_BCM1480_PM_DSCR1_RSVD _SB_MAKEMASK(12,S_BCM1480_PM_DSCR1_RSVD) 354 355 /* ********************************************************************* 356 * Switch performance counters 357 ********************************************************************* */ 358 359 #define M_BCM1480_SWPERF_CFG_CLEAR _SB_MAKEMASK1(62) 360 #define M_BCM1480_SWPERF_CFG_ENABLE _SB_MAKEMASK1(63) 361 362 #define S_BCM1480_SWPERF_CFG_C0SRC 0 363 #define M_BCM1480_SWPERF_CFG_C0SRC _SB_MAKEMASK(8,S_BCM1480_SWPERF_CFG_C0SRC) 364 #define V_BCM1480_SWPERF_CFG_C0SRC(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C0SRC) 365 #define G_BCM1480_SWPERF_CFG_C0SRC(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C0SRC,M_BCM1480_SWPERF_CFG_C0SRC) 366 367 #define S_BCM1480_SWPERF_CFG_C0FILT 8 368 #define M_BCM1480_SWPERF_CFG_C0FILT _SB_MAKEMASK(3,S_BCM1480_SWPERF_CFG_C0FILT) 369 #define V_BCM1480_SWPERF_CFG_C0FILT(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C0FILT) 370 #define G_BCM1480_SWPERF_CFG_C0FILT(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C0FILT,M_BCM1480_SWPERF_CFG_C0FILT) 371 372 #define M_BCM1480_SWPERF_CFG_C0FENA _SB_MAKEMASK1(11) 373 374 #define S_BCM1480_SWPERF_CFG_C1SRC 16 375 #define M_BCM1480_SWPERF_CFG_C1SRC _SB_MAKEMASK(8,S_BCM1480_SWPERF_CFG_C1SRC) 376 #define V_BCM1480_SWPERF_CFG_C1SRC(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C1SRC) 377 #define G_BCM1480_SWPERF_CFG_C1SRC(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C1SRC,M_BCM1480_SWPERF_CFG_C1SRC) 378 379 #define S_BCM1480_SWPERF_CFG_C1FILT 24 380 #define M_BCM1480_SWPERF_CFG_C1FILT _SB_MAKEMASK(3,S_BCM1480_SWPERF_CFG_C1FILT) 381 #define V_BCM1480_SWPERF_CFG_C1FILT(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C1FILT) 382 #define G_BCM1480_SWPERF_CFG_C1FILT(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C1FILT,M_BCM1480_SWPERF_CFG_C1FILT) 383 384 #define M_BCM1480_SWPERF_CFG_C1FENA _SB_MAKEMASK1(27) 385 386 #define S_BCM1480_SWPERF_CFG_C2SRC 32 387 #define M_BCM1480_SWPERF_CFG_C2SRC _SB_MAKEMASK(8,S_BCM1480_SWPERF_CFG_C2SRC) 388 #define V_BCM1480_SWPERF_CFG_C2SRC(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C2SRC) 389 #define G_BCM1480_SWPERF_CFG_C2SRC(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C2SRC,M_BCM1480_SWPERF_CFG_C2SRC) 390 391 #define S_BCM1480_SWPERF_CFG_C2FILT 40 392 #define M_BCM1480_SWPERF_CFG_C2FILT _SB_MAKEMASK(3,S_BCM1480_SWPERF_CFG_C2FILT) 393 #define V_BCM1480_SWPERF_CFG_C2FILT(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C2FILT) 394 #define G_BCM1480_SWPERF_CFG_C2FILT(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C2FILT,M_BCM1480_SWPERF_CFG_C2FILT) 395 396 #define M_BCM1480_SWPERF_CFG_C2FENA _SB_MAKEMASK1(43) 397 398 #define S_BCM1480_SWPERF_CFG_C3SRC 48 399 #define M_BCM1480_SWPERF_CFG_C3SRC _SB_MAKEMASK(8,S_BCM1480_SWPERF_CFG_C3SRC) 400 #define V_BCM1480_SWPERF_CFG_C3SRC(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C3SRC) 401 #define G_BCM1480_SWPERF_CFG_C3SRC(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C3SRC,M_BCM1480_SWPERF_CFG_C3SRC) 402 403 #define S_BCM1480_SWPERF_CFG_C3FILT 56 404 #define M_BCM1480_SWPERF_CFG_C3FILT _SB_MAKEMASK(3,S_BCM1480_SWPERF_CFG_C3FILT) 405 #define V_BCM1480_SWPERF_CFG_C3FILT(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C3FILT) 406 #define G_BCM1480_SWPERF_CFG_C3FILT(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C3FILT,M_BCM1480_SWPERF_CFG_C3FILT) 407 408 #define M_BCM1480_SWPERF_CFG_C3FENA _SB_MAKEMASK1(59) 409 410 /* This macro lets you specify counters by index */ 411 412 #define S_BCM1480_SWPERF_CFG_CXSRC(c) (0+(c)*16) 413 #define M_BCM1480_SWPERF_CFG_CXSRC(c) _SB_MAKEMASK(8,S_BCM1480_SWPERF_CFG_CXSRC(c)) 414 #define V_BCM1480_SWPERF_CFG_CXSRC(c,x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_CXSRC(c)) 415 #define G_BCM1480_SWPERF_CFG_CXSRC(c,x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_CXSRC(c),M_BCM1480_SWPERF_CFG_CXSRC(c)) 416 417 #define S_BCM1480_SWPERF_CFG_CXFILT(c) (8+(c)*16) 418 #define M_BCM1480_SWPERF_CFG_CXFILT(c) _SB_MAKEMASK(3,S_BCM1480_SWPERF_CFG_CXFILT(c)) 419 #define V_BCM1480_SWPERF_CFG_CXFILT(c,x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_CXFILT(c)) 420 #define G_BCM1480_SWPERF_CFG_CXFILT(c,x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_CXFILT(c),M_BCM1480_SWPERF_CFG_CXFILT(c)) 421 422 #define M_BCM1480_SWPERF_CFG_CXFENA(c) _SB_MAKEMASK1(11+(c)*16) 423 424 /* 425 * List of available counters 426 */ 427 428 #define K_BCM1480_SWPERF_CFG_CXSRC_NONE 0 429 #define K_BCM1480_SWPERF_CFG_CXSRC_SWCYCLES 1 430 #define K_BCM1480_SWPERF_CFG_CXSRC_FILTPORTS 2 431 #define K_BCM1480_SWPERF_CFG_CXSRC_SGNT 3 432 #define K_BCM1480_SWPERF_CFG_CXSRC_SREQ 4 433 #define K_BCM1480_SWPERF_CFG_CXSRC_SRELOA 5 434 #define K_BCM1480_SWPERF_CFG_CXSRC_DGNT 6 435 #define K_BCM1480_SWPERF_CFG_CXSRC_DREQ 7 436 #define K_BCM1480_SWPERF_CFG_CXSRC_DRELOAD 8 437 438 /* 439 * Switch agents 440 */ 441 442 #define K_BCM1480_SWAGENT_HSP0 0 443 #define K_BCM1480_SWAGENT_HSP1 1 444 #define K_BCM1480_SWAGENT_HSP2 2 445 #define K_BCM1480_SWAGENT_NC 4 446 #define K_BCM1480_SWAGENT_HT 5 447 #define K_BCM1480_SWAGENT_PM 6 448 449 450 /* ********************************************************************* 451 * Switch Trace Registers 452 ********************************************************************* */ 453 454 /* 455 * Switch trigger control match (Table 322) 456 */ 457 458 #define S_BCM1480_SWTRC_MATCHCTL_VC 0 459 #define M_BCM1480_SWTRC_MATCHCTL_VC _SB_MAKEMASK(32,S_BCM1480_SWTRC_MATCHCTL_VC) 460 #define V_BCM1480_SWTRC_MATCHCTL_VC(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_MATCHCTL_VC) 461 #define G_BCM1480_SWTRC_MATCHCTL_VC(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_MATCHCTL_VC,M_BCM1480_SWTRC_MATCHCTL_VC) 462 463 #define M_BCM1480_SWTRC_MATCHCTL_VC_X(x) _SB_MAKEMASK1(S_BCM1480_SWTRC_MATCHCTL_VC+(x)) 464 465 466 #define S_BCM1480_SWTRC_MATCHCTL_SRC 32 467 #define M_BCM1480_SWTRC_MATCHCTL_SRC _SB_MAKEMASK(8,S_BCM1480_SWTRC_MATCHCTL_SRC) 468 #define V_BCM1480_SWTRC_MATCHCTL_SRC(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_MATCHCTL_SRC) 469 #define G_BCM1480_SWTRC_MATCHCTL_SRC(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_MATCHCTL_SRC,M_BCM1480_SWTRC_MATCHCTL_SRC) 470 471 #define M_BCM1480_SWTRC_MATCHCTL_SRC_X(x) _SB_MAKEMASK1(S_BCM1480_MATCHCTL_SRC+(x)) 472 473 474 #define S_BCM1480_SWTRC_MATCHCTL_DEST 40 475 #define M_BCM1480_SWTRC_MATCHCTL_DEST _SB_MAKEMASK(8,S_BCM1480_SWTRC_MATCHCTL_DEST) 476 #define V_BCM1480_SWTRC_MATCHCTL_DEST(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_MATCHCTL_DEST) 477 #define G_BCM1480_SWTRC_MATCHCTL_DEST(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_MATCHCTL_DEST,M_BCM1480_SWTRC_MATCHCTL_DEST) 478 479 #define M_BCM1480_SWTRC_MATCHCTL_DEST_X(x) _SB_MAKEMASK1(S_BCM1480_MATCHCTL_DEST+(x)) 480 481 #define S_BCM1480_SWTRC_MATCHCTL_TYPE 48 482 #define M_BCM1480_SWTRC_MATCHCTL_TYPE _SB_MAKEMASK(2,S_BCM1480_SWTRC_MATCHCTL_TYPE) 483 #define V_BCM1480_SWTRC_MATCHCTL_TYPE(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_MATCHCTL_TYPE) 484 #define G_BCM1480_SWTRC_MATCHCTL_TYPE(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_MATCHCTL_TYPE,M_BCM1480_SWTRC_MATCHCTL_TYPE) 485 486 #define K_BCM1480_SWTRC_MATCHCTL_TYPE_NONE 0 487 #define K_BCM1480_SWTRC_MATCHCTL_TYPE_PKTS 1 488 #define K_BCM1480_SWTRC_MATCHCTL_TYPE_HT 2 489 #define K_BCM1480_SWTRC_MATCHCTL_TYPE_PKTS_HT 3 490 491 #define S_BCM1480_SWTRC_MATCHCTL_SOP 50 492 #define M_BCM1480_SWTRC_MATCHCTL_SOP _SB_MAKEMASK(2,S_BCM1480_SWTRC_MATCHCTL_SOP) 493 #define V_BCM1480_SWTRC_MATCHCTL_SOP(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_MATCHCTL_SOP) 494 #define G_BCM1480_SWTRC_MATCHCTL_SOP(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_MATCHCTL_SOP,M_BCM1480_SWTRC_MATCHCTL_SOP) 495 496 #define K_BCM1480_SWTRC_MATCHCTL_SOP_NONE 0 497 #define K_BCM1480_SWTRC_MATCHCTL_SOP_NOTSOP 1 498 #define K_BCM1480_SWTRC_MATCHCTL_SOP_ISSOP 2 499 #define K_BCM1480_SWTRC_MATCHCTL_SOP_IGNORE 3 500 501 #define S_BCM1480_SWTRC_MATCHCTL_EOP 52 502 #define M_BCM1480_SWTRC_MATCHCTL_EOP _SB_MAKEMASK(2,S_BCM1480_SWTRC_MATCHCTL_EOP) 503 #define V_BCM1480_SWTRC_MATCHCTL_EOP(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_MATCHCTL_EOP) 504 #define G_BCM1480_SWTRC_MATCHCTL_EOP(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_MATCHCTL_EOP,M_BCM1480_SWTRC_MATCHCTL_EOP) 505 506 #define K_BCM1480_SWTRC_MATCHCTL_EOP_NONE 0 507 #define K_BCM1480_SWTRC_MATCHCTL_EOP_NOTEOP 1 508 #define K_BCM1480_SWTRC_MATCHCTL_EOP_ISEOP 2 509 #define K_BCM1480_SWTRC_MATCHCTL_EOP_IGNORE 3 510 511 #define S_BCM1480_SWTRC_MATCHCTL_BCAST 54 512 #define M_BCM1480_SWTRC_MATCHCTL_BCAST _SB_MAKEMASK(2,S_BCM1480_SWTRC_MATCHCTL_BCAST) 513 #define V_BCM1480_SWTRC_MATCHCTL_BCAST(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_MATCHCTL_BCAST) 514 #define G_BCM1480_SWTRC_MATCHCTL_BCAST(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_MATCHCTL_BCAST,M_BCM1480_SWTRC_MATCHCTL_BCAST) 515 516 #define K_BCM1480_SWTRC_MATCHCTL_BCAST_NONE 0 517 #define K_BCM1480_SWTRC_MATCHCTL_BCAST_NOTBCAST 1 518 #define K_BCM1480_SWTRC_MATCHCTL_BCAST_ISBCAST 2 519 #define K_BCM1480_SWTRC_MATCHCTL_BCAST_IGNORE 3 520 521 522 523 /* 524 * Switch Trigger Event Register (Table 325) 525 */ 526 527 #define S_BCM1480_SWTRC_EVT_MATCH_CTL 0 528 #define M_BCM1480_SWTRC_EVT_MATCH_CTL _SB_MAKEMASK(8,S_BCM1480_SWTRC_EVT_MATCH_CTL) 529 #define V_BCM1480_SWTRC_EVT_MATCH_CTL(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_EVT_MATCH_CTL) 530 #define G_BCM1480_SWTRC_EVT_MATCH_CTL(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_EVT_MATCH_CTL,M_BCM1480_SWTRC_EVT_MATCH_CTL) 531 532 #define S_BCM1480_SWTRC_EVT_MATCH_DATA 8 533 #define M_BCM1480_SWTRC_EVT_MATCH_DATA _SB_MAKEMASK(4,S_BCM1480_SWTRC_EVT_MATCH_DATA) 534 #define V_BCM1480_SWTRC_EVT_MATCH_DATA(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_EVT_MATCH_DATA) 535 #define G_BCM1480_SWTRC_EVT_MATCH_DATA(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_EVT_MATCH_DATA,M_BCM1480_SWTRC_EVT_MATCH_DATA) 536 537 #define S_BCM1480_SWTRC_EVT_MATCH_TAG 12 538 #define M_BCM1480_SWTRC_EVT_MATCH_TAG _SB_MAKEMASK(4,S_BCM1480_SWTRC_EVT_MATCH_TAG) 539 #define V_BCM1480_SWTRC_EVT_MATCH_TAG(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_EVT_MATCH_TAG) 540 #define G_BCM1480_SWTRC_EVT_MATCH_TAG(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_EVT_MATCH_TAG,M_BCM1480_SWTRC_EVT_MATCH_TAG) 541 542 #define M_BCM1480_SWTRC_EVT_MATCH_EN _SB_MAKEMASK1(16) 543 #define M_BCM1480_SWTRC_EVT_DEBUG_PIN _SB_MAKEMASK1(20) 544 #define M_BCM1480_SWTRC_EVT_INTERRUPT _SB_MAKEMASK1(21) 545 546 #define S_BCM1480_SWTRC_EVT_COUNT 24 547 #define M_BCM1480_SWTRC_EVT_COUNT _SB_MAKEMASK(8,S_BCM1480_SWTRC_EVT_COUNT) 548 #define V_BCM1480_SWTRC_EVT_COUNT(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_EVT_COUNT) 549 #define G_BCM1480_SWTRC_EVT_COUNT(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_EVT_COUNT,M_BCM1480_SWTRC_EVT_COUNT) 550 551 552 /* 553 * Switch Trace Sequence Control (Table 326) 554 * NOTE: Event select fields are numbered from zero, not one as they are 555 * in the manual. 556 */ 557 558 #define S_BCM1480_SWTRC_SEQ_EVSEL_3 0 559 #define M_BCM1480_SWTRC_SEQ_EVSEL_3 _SB_MAKEMASK(4,S_BCM1480_SWTRC_SEQ_EVSEL_3) 560 #define V_BCM1480_SWTRC_SEQ_EVSEL_3(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_SEQ_EVSEL_3) 561 #define G_BCM1480_SWTRC_SEQ_EVSEL_3(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_SEQ_EVSEL_3,M_BCM1480_SWTRC_SEQ_EVSEL_3) 562 563 #define S_BCM1480_SWTRC_SEQ_EVSEL_2 4 564 #define M_BCM1480_SWTRC_SEQ_EVSEL_2 _SB_MAKEMASK(4,S_BCM1480_SWTRC_SEQ_EVSEL_2) 565 #define V_BCM1480_SWTRC_SEQ_EVSEL_2(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_SEQ_EVSEL_2) 566 #define G_BCM1480_SWTRC_SEQ_EVSEL_2(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_SEQ_EVSEL_2,M_BCM1480_SWTRC_SEQ_EVSEL_2) 567 568 #define S_BCM1480_SWTRC_SEQ_EVSEL_1 8 569 #define M_BCM1480_SWTRC_SEQ_EVSEL_1 _SB_MAKEMASK(4,S_BCM1480_SWTRC_SEQ_EVSEL_1) 570 #define V_BCM1480_SWTRC_SEQ_EVSEL_1(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_SEQ_EVSEL_1) 571 #define G_BCM1480_SWTRC_SEQ_EVSEL_1(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_SEQ_EVSEL_1,M_BCM1480_SWTRC_SEQ_EVSEL_1) 572 573 #define S_BCM1480_SWTRC_SEQ_EVSEL_0 12 574 #define M_BCM1480_SWTRC_SEQ_EVSEL_0 _SB_MAKEMASK(4,S_BCM1480_SWTRC_SEQ_EVSEL_0) 575 #define V_BCM1480_SWTRC_SEQ_EVSEL_0(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_SEQ_EVSEL_0) 576 #define G_BCM1480_SWTRC_SEQ_EVSEL_0(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_SEQ_EVSEL_0,M_BCM1480_SWTRC_SEQ_EVSEL_0) 577 578 #define S_BCM1480_SWTRC_SEQ_EVSEL_X(e) (12-((e)*4) 579 #define M_BCM1480_SWTRC_SEQ_EVSEL_X(e) _SB_MAKEMASK(4,S_BCM1480_SWTRC_SEQ_EVSEL_X(e)) 580 #define V_BCM1480_SWTRC_SEQ_EVSEL_X(e,x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_SEQ_EVSEL_X(e)) 581 #define G_BCM1480_SWTRC_SEQ_EVSEL_X(e,x) _SB_GETVALUE(x,S_BCM1480_SWTRC_SEQ_EVSEL_X(e),M_BCM1480_SWTRC_SEQ_EVSEL_X(e)) 582 583 #define S_BCM1480_SWTRC_SEQ_FUNCTION 16 584 #define M_BCM1480_SWTRC_SEQ_FUNCTION _SB_MAKEMASK(2,S_BCM1480_SWTRC_SEQ_FUNCTION) 585 #define V_BCM1480_SWTRC_SEQ_FUNCTION(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_SEQ_FUNCTION) 586 #define G_BCM1480_SWTRC_SEQ_FUNCTION(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_SEQ_FUNCTION,M_BCM1480_SWTRC_SEQ_FUNCTION) 587 588 #define K_BCM1480_SWTRC_SEQ_FUNCTION_NOP 0 589 #define K_BCM1480_SWTRC_SEQ_FUNCTION_START 1 590 #define K_BCM1480_SWTRC_SEQ_FUNCTION_STOP 2 591 #define K_BCM1480_SWTRC_SEQ_FUNCTION_FREEZE 3 592 593 #define M_BCM1480_SWTRC_SEQ_DSAMPLE _SB_MAKEMASK1(18) 594 #define M_BCM1480_SWTRC_SEQ_CSAMPLE _SB_MAKEMASK1(19) 595 #define M_BCM1480_SWTRC_SEQ_DEBUGPIN _SB_MAKEMASK1(20) 596 #define M_BCM1480_SWTRC_SEQ_DEBUGCPU _SB_MAKEMASK1(21) 597 #define M_BCM1480_SWTRC_SEQ_CLEARUSE _SB_MAKEMASK1(22) 598 599 #define S_BCM1480_SWTRC_SEQ_ZBBUSFUNC 26 600 #define M_BCM1480_SWTRC_SEQ_ZBBUSFUNC _SB_MAKEMASK(2,S_BCM1480_SWTRC_SEQ_ZBBUSFUNC) 601 #define V_BCM1480_SWTRC_SEQ_ZBBUSFUNC(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_SEQ_ZBBUSFUNC) 602 #define G_BCM1480_SWTRC_SEQ_ZBBUSFUNC(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_SEQ_ZBBUSFUNC,M_BCM1480_SWTRC_SEQ_ZBBUSFUNC) 603 604 #define K_BCM1480_SWTRC_SEQ_ZBBUSFUNC_NOP 0 605 #define K_BCM1480_SWTRC_SEQ_ZBBUSFUNC_START 1 606 #define K_BCM1480_SWTRC_SEQ_ZBBUSFUNC_STOP 2 607 #define K_BCM1480_SWTRC_SEQ_ZBBUSFUNC_FREEZE 3 608 609 #define S_BCM1480_SWTRC_SEQ_DSAMPFILT 28 610 #define M_BCM1480_SWTRC_SEQ_DSAMPFILT _SB_MAKEMASK(3,S_BCM1480_SWTRC_SEQ_DSAMPFILT) 611 #define V_BCM1480_SWTRC_SEQ_DSAMPFILT(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_SEQ_DSAMPFILT) 612 #define G_BCM1480_SWTRC_SEQ_DSAMPFILT(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_SEQ_DSAMPFILT,M_BCM1480_SWTRC_SEQ_DSAMPFILT) 613 614 /* 615 * Switch Trace Config Register (Table 327) 616 */ 617 618 #define M_BCM1480_SWTRC_CFG_RESET _SB_MAKEMASK1(0) 619 #define M_BCM1480_SWTRC_CFG_STARTREAD _SB_MAKEMASK1(1) 620 #define M_BCM1480_SWTRC_CFG_START _SB_MAKEMASK1(2) 621 #define M_BCM1480_SWTRC_CFG_STOP _SB_MAKEMASK1(3) 622 #define M_BCM1480_SWTRC_CFG_FREEZE _SB_MAKEMASK1(4) 623 #define M_BCM1480_SWTRC_CFG_FREEZEFULL _SB_MAKEMASK1(5) 624 #define M_BCM1480_SWTRC_CFG_DEBUGFULL _SB_MAKEMASK1(6) 625 #define M_BCM1480_SWTRC_CFG_TRCFULL _SB_MAKEMASK1(7) 626 #define M_BCM1480_SWTRC_CFG_FORCECNT _SB_MAKEMASK1(8) 627 628 #define S_BCM1480_SWTRC_CFG_TRCADDR 10 629 #define M_BCM1480_SWTRC_CFG_TRCADDR _SB_MAKEMASK(10,S_BCM1480_SWTRC_CFG_TRCADDR) 630 #define V_BCM1480_SWTRC_CFG_TRCADDR(x) _SB_MAKEVALUE(x,S_BCM1480_SWTRC_CFG_TRCADDR) 631 #define G_BCM1480_SWTRC_CFG_TRCADDR(x) _SB_GETVALUE(x,S_BCM1480_SWTRC_CFG_TRCADDR,M_BCM1480_SWTRC_CFG_TRCADDR) 632 633 634 /* 635 * Switch trace buffer entry (3 64-bit words per entry) (Table 328) 636 */ 637 638 #define M_BCM1480_SWENT_VALID _SB_MAKEMASK1(63) 639 #define M_BCM1480_SWENT_FMT _SB_MAKEMASK1(62) 640 #define M_BCM1480_SWENT_MULTI _SB_MAKEMASK1(61) 641 #define M_BCM1480_SWENT_BCAST _SB_MAKEMASK1(60) 642 643 #define S_BCM1480_SWENT_CYCDIFF 48 644 #define M_BCM1480_SWENT_CYCDIFF _SB_MAKEMASK(12,S_BCM1480_SWENT_CYCDIFF) 645 #define V_BCM1480_SWENT_CYCDIFF(x) _SB_MAKEVALUE(x,S_BCM1480_SWENT_CYCDIFF) 646 #define G_BCM1480_SWENT_CYCDIFF(x) _SB_GETVALUE(x,S_BCM1480_SWENT_CYCDIFF,M_BCM1480_SWENT_CYCDIFF) 647 648 #define M_BCM1480_SWENT_DRELOAD _SB_MAKEMASK1(47) 649 #define M_BCM1480_SWENT_SRELOAD _SB_MAKEMASK1(46) 650 #define M_BCM1480_SWENT_EOP _SB_MAKEMASK1(45) 651 #define M_BCM1480_SWENT_SOP _SB_MAKEMASK1(44) 652 653 #define S_BCM1480_SWENT_VC 39 654 #define M_BCM1480_SWENT_VC _SB_MAKEMASK(5,S_BCM1480_SWENT_VC) 655 #define V_BCM1480_SWENT_VC(x) _SB_MAKEVALUE(x,S_BCM1480_SWENT_VC) 656 #define G_BCM1480_SWENT_VC(x) _SB_GETVALUE(x,S_BCM1480_SWENT_VC,M_BCM1480_SWENT_VC) 657 658 #define M_BCM1480_SWENT_TYPE _SB_MAKEMASK1(38) 659 660 #define S_BCM1480_SWENT_DEST 35 661 #define M_BCM1480_SWENT_DEST _SB_MAKEMASK(3,S_BCM1480_SWENT_DEST) 662 #define V_BCM1480_SWENT_DEST(x) _SB_MAKEVALUE(x,S_BCM1480_SWENT_DEST) 663 #define G_BCM1480_SWENT_DEST(x) _SB_GETVALUE(x,S_BCM1480_SWENT_DEST,M_BCM1480_SWENT_DEST) 664 665 #define S_BCM1480_SWENT_SRC 32 666 #define M_BCM1480_SWENT_SRC _SB_MAKEMASK(3,S_BCM1480_SWENT_SRC) 667 #define V_BCM1480_SWENT_SRC(x) _SB_MAKEVALUE(x,S_BCM1480_SWENT_SRC) 668 #define G_BCM1480_SWENT_SRC(x) _SB_GETVALUE(x,S_BCM1480_SWENT_SRC,M_BCM1480_SWENT_SRC) 669 670 #define S_BCM1480_SWENT_CNT 28 671 #define M_BCM1480_SWENT_CNT _SB_MAKEMASK(4,S_BCM1480_SWENT_CNT) 672 #define V_BCM1480_SWENT_CNT(x) _SB_MAKEVALUE(x,S_BCM1480_SWENT_CNT) 673 #define G_BCM1480_SWENT_CNT(x) _SB_GETVALUE(x,S_BCM1480_SWENT_CNT,M_BCM1480_SWENT_CNT) 674 675 #define S_BCM1480_SWENT_TAG 0 676 #define M_BCM1480_SWENT_TAG _SB_MAKEMASK(28,S_BCM1480_SWENT_TAG) 677 #define V_BCM1480_SWENT_TAG(x) _SB_MAKEVALUE(x,S_BCM1480_SWENT_TAG) 678 #define G_BCM1480_SWENT_TAG(x) _SB_GETVALUE(x,S_BCM1480_SWENT_TAG,M_BCM1480_SWENT_TAG) 679 680 681 682 #endif /* _BCM1480_PM_H */ 683
Indexes created Sat Sep 27 22:09:54 GMT 2025