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      1 /*	$NetBSD: int1reg.h,v 1.2 2009/02/12 06:33:57 rumble Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2009 Stephen M. Rumble
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. The name of the author may not be used to endorse or promote products
     13  *    derived from this software without specific prior written permission.
     14  *
     15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     25  */
     26 
     27 #if !defined(_ARCH_SGIMIPS_DEV_INT1REG_H_)
     28 #define	_ARCH_SGIMIPS_DEV_INT1REG_H_
     29 
     30 /* The INT has known locations on all SGI machines */
     31 #define	INT1_IP6_IP10		0x1f980000
     32 
     33 /*
     34  * NB: The STATUS register is backwards w.r.t. INT2: a bit set implies
     35  *     no pending interrupt. The MASK register is like INT2: a bit
     36  *     set implies that the interrupt is enabled.
     37  */
     38 #define INT1_LOCAL_STATUS	0x000002	/* 16-bit */
     39 #define INT1_LOCAL_MASK		0x00000b	/*  8-bit */
     40 
     41 /* i8254 is actually its own chip, but we can pretend to be like INT2... */
     42 #define INT1_TIMER_0_ACK	0x0a0000	/*  8-bit */
     43 #define INT1_TIMER_1_ACK	0x080000	/*  8-bit */
     44 #define INT1_TIMER_0		0x1c0000	/*  8-bit */
     45 #define	INT1_TIMER_1		0x1c0004	/*  8-bit */
     46 #define	INT1_TIMER_2		0x1c0008	/*  8-bit */
     47 #define INT1_TIMER_CONTROL	0x1c000c	/*  8-bit */
     48 
     49 #endif /* _ARCH_SGIMIPS_DEV_INT1REG_H_ */
     50