1 /* $NetBSD: r8a77980-sysc.h,v 1.1.1.2 2019/05/25 11:29:13 jmcneill Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 * Copyright (C) 2018 Cogent Embedded, Inc. 7 */ 8 #ifndef __DT_BINDINGS_POWER_R8A77980_SYSC_H__ 9 #define __DT_BINDINGS_POWER_R8A77980_SYSC_H__ 10 11 /* 12 * These power domain indices match the numbers of the interrupt bits 13 * representing the power areas in the various Interrupt Registers 14 * (e.g. SYSCISR, Interrupt Status Register) 15 */ 16 17 #define R8A77980_PD_A2SC2 0 18 #define R8A77980_PD_A2SC3 1 19 #define R8A77980_PD_A2SC4 2 20 #define R8A77980_PD_A2DP0 3 21 #define R8A77980_PD_A2DP1 4 22 #define R8A77980_PD_CA53_CPU0 5 23 #define R8A77980_PD_CA53_CPU1 6 24 #define R8A77980_PD_CA53_CPU2 7 25 #define R8A77980_PD_CA53_CPU3 8 26 #define R8A77980_PD_A2CN 10 27 #define R8A77980_PD_A3VIP0 11 28 #define R8A77980_PD_A2IR5 12 29 #define R8A77980_PD_CR7 13 30 #define R8A77980_PD_A2IR4 15 31 #define R8A77980_PD_CA53_SCU 21 32 #define R8A77980_PD_A2IR0 23 33 #define R8A77980_PD_A3IR 24 34 #define R8A77980_PD_A3VIP1 25 35 #define R8A77980_PD_A3VIP2 26 36 #define R8A77980_PD_A2IR1 27 37 #define R8A77980_PD_A2IR2 28 38 #define R8A77980_PD_A2IR3 29 39 #define R8A77980_PD_A2SC0 30 40 #define R8A77980_PD_A2SC1 31 41 42 /* Always-on power area */ 43 #define R8A77980_PD_ALWAYS_ON 32 44 45 #endif /* __DT_BINDINGS_POWER_R8A77980_SYSC_H__ */ 46
Indexes created Tue Sep 30 07:10:03 GMT 2025