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      1 /*	$NetBSD: realtek,rtd1195.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $	*/
      2 
      3 /* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
      4 /*
      5  * Realtek RTD1195 reset controllers
      6  *
      7  * Copyright (c) 2017 Andreas Frber
      8  */
      9 #ifndef DT_BINDINGS_RESET_RTD1195_H
     10 #define DT_BINDINGS_RESET_RTD1195_H
     11 
     12 /* soft reset 1 */
     13 #define RTD1195_RSTN_MISC		0
     14 #define RTD1195_RSTN_RNG		1
     15 #define RTD1195_RSTN_USB3_POW		2
     16 #define RTD1195_RSTN_GSPI		3
     17 #define RTD1195_RSTN_USB3_P0_MDIO	4
     18 #define RTD1195_RSTN_VE_H265		5
     19 #define RTD1195_RSTN_USB		6
     20 #define RTD1195_RSTN_USB_PHY0		8
     21 #define RTD1195_RSTN_USB_PHY1		9
     22 #define RTD1195_RSTN_HDMIRX		11
     23 #define RTD1195_RSTN_HDMI		12
     24 #define RTD1195_RSTN_ETN		14
     25 #define RTD1195_RSTN_AIO		15
     26 #define RTD1195_RSTN_GPU		16
     27 #define RTD1195_RSTN_VE_H264		17
     28 #define RTD1195_RSTN_VE_JPEG		18
     29 #define RTD1195_RSTN_TVE		19
     30 #define RTD1195_RSTN_VO			20
     31 #define RTD1195_RSTN_LVDS		21
     32 #define RTD1195_RSTN_SE			22
     33 #define RTD1195_RSTN_DCU		23
     34 #define RTD1195_RSTN_DC_PHY		24
     35 #define RTD1195_RSTN_CP			25
     36 #define RTD1195_RSTN_MD			26
     37 #define RTD1195_RSTN_TP			27
     38 #define RTD1195_RSTN_AE			28
     39 #define RTD1195_RSTN_NF			29
     40 #define RTD1195_RSTN_MIPI		30
     41 
     42 /* soft reset 2 */
     43 #define RTD1195_RSTN_ACPU		0
     44 #define RTD1195_RSTN_VCPU		1
     45 #define RTD1195_RSTN_PCR		9
     46 #define RTD1195_RSTN_CR			10
     47 #define RTD1195_RSTN_EMMC		11
     48 #define RTD1195_RSTN_SDIO		12
     49 #define RTD1195_RSTN_I2C_5		18
     50 #define RTD1195_RSTN_RTC		20
     51 #define RTD1195_RSTN_I2C_4		23
     52 #define RTD1195_RSTN_I2C_3		24
     53 #define RTD1195_RSTN_I2C_2		25
     54 #define RTD1195_RSTN_I2C_1		26
     55 #define RTD1195_RSTN_UR1		28
     56 
     57 /* soft reset 3 */
     58 #define RTD1195_RSTN_SB2		0
     59 
     60 /* iso soft reset */
     61 #define RTD1195_ISO_RSTN_VFD		0
     62 #define RTD1195_ISO_RSTN_IR		1
     63 #define RTD1195_ISO_RSTN_CEC0		2
     64 #define RTD1195_ISO_RSTN_CEC1		3
     65 #define RTD1195_ISO_RSTN_DP		4
     66 #define RTD1195_ISO_RSTN_CBUSTX		5
     67 #define RTD1195_ISO_RSTN_CBUSRX		6
     68 #define RTD1195_ISO_RSTN_EFUSE		7
     69 #define RTD1195_ISO_RSTN_UR0		8
     70 #define RTD1195_ISO_RSTN_GMAC		9
     71 #define RTD1195_ISO_RSTN_GPHY		10
     72 #define RTD1195_ISO_RSTN_I2C_0		11
     73 #define RTD1195_ISO_RSTN_I2C_6		12
     74 #define RTD1195_ISO_RSTN_CBUS		13
     75 
     76 #endif
     77