17ec681f3Smrg/*
27ec681f3Smrg * Copyright © 2019 Raspberry Pi
37ec681f3Smrg *
47ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a
57ec681f3Smrg * copy of this software and associated documentation files (the "Software"),
67ec681f3Smrg * to deal in the Software without restriction, including without limitation
77ec681f3Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
87ec681f3Smrg * and/or sell copies of the Software, and to permit persons to whom the
97ec681f3Smrg * Software is furnished to do so, subject to the following conditions:
107ec681f3Smrg *
117ec681f3Smrg * The above copyright notice and this permission notice (including the next
127ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the
137ec681f3Smrg * Software.
147ec681f3Smrg *
157ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
167ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
177ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
187ec681f3Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
197ec681f3Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
207ec681f3Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
217ec681f3Smrg * IN THE SOFTWARE.
227ec681f3Smrg */
237ec681f3Smrg
247ec681f3Smrg#include "v3dv_private.h"
257ec681f3Smrg
267ec681f3Smrg#include "drm-uapi/drm_fourcc.h"
277ec681f3Smrg#include "util/format/u_format.h"
287ec681f3Smrg#include "util/u_math.h"
297ec681f3Smrg#include "vk_format_info.h"
307ec681f3Smrg#include "vk_util.h"
317ec681f3Smrg#include "vulkan/wsi/wsi_common.h"
327ec681f3Smrg
337ec681f3Smrg/**
347ec681f3Smrg * Computes the HW's UIFblock padding for a given height/cpp.
357ec681f3Smrg *
367ec681f3Smrg * The goal of the padding is to keep pages of the same color (bank number) at
377ec681f3Smrg * least half a page away from each other vertically when crossing between
387ec681f3Smrg * columns of UIF blocks.
397ec681f3Smrg */
407ec681f3Smrgstatic uint32_t
417ec681f3Smrgv3d_get_ub_pad(uint32_t cpp, uint32_t height)
427ec681f3Smrg{
437ec681f3Smrg   uint32_t utile_h = v3d_utile_height(cpp);
447ec681f3Smrg   uint32_t uif_block_h = utile_h * 2;
457ec681f3Smrg   uint32_t height_ub = height / uif_block_h;
467ec681f3Smrg
477ec681f3Smrg   uint32_t height_offset_in_pc = height_ub % PAGE_CACHE_UB_ROWS;
487ec681f3Smrg
497ec681f3Smrg   /* For the perfectly-aligned-for-UIF-XOR case, don't add any pad. */
507ec681f3Smrg   if (height_offset_in_pc == 0)
517ec681f3Smrg      return 0;
527ec681f3Smrg
537ec681f3Smrg   /* Try padding up to where we're offset by at least half a page. */
547ec681f3Smrg   if (height_offset_in_pc < PAGE_UB_ROWS_TIMES_1_5) {
557ec681f3Smrg      /* If we fit entirely in the page cache, don't pad. */
567ec681f3Smrg      if (height_ub < PAGE_CACHE_UB_ROWS)
577ec681f3Smrg         return 0;
587ec681f3Smrg      else
597ec681f3Smrg         return PAGE_UB_ROWS_TIMES_1_5 - height_offset_in_pc;
607ec681f3Smrg   }
617ec681f3Smrg
627ec681f3Smrg   /* If we're close to being aligned to page cache size, then round up
637ec681f3Smrg    * and rely on XOR.
647ec681f3Smrg    */
657ec681f3Smrg   if (height_offset_in_pc > PAGE_CACHE_MINUS_1_5_UB_ROWS)
667ec681f3Smrg      return PAGE_CACHE_UB_ROWS - height_offset_in_pc;
677ec681f3Smrg
687ec681f3Smrg   /* Otherwise, we're far enough away (top and bottom) to not need any
697ec681f3Smrg    * padding.
707ec681f3Smrg    */
717ec681f3Smrg   return 0;
727ec681f3Smrg}
737ec681f3Smrg
747ec681f3Smrgstatic void
757ec681f3Smrgv3d_setup_slices(struct v3dv_image *image)
767ec681f3Smrg{
777ec681f3Smrg   assert(image->cpp > 0);
787ec681f3Smrg
797ec681f3Smrg   uint32_t width = image->vk.extent.width;
807ec681f3Smrg   uint32_t height = image->vk.extent.height;
817ec681f3Smrg   uint32_t depth = image->vk.extent.depth;
827ec681f3Smrg
837ec681f3Smrg   /* Note that power-of-two padding is based on level 1.  These are not
847ec681f3Smrg    * equivalent to just util_next_power_of_two(dimension), because at a
857ec681f3Smrg    * level 0 dimension of 9, the level 1 power-of-two padded value is 4,
867ec681f3Smrg    * not 8.
877ec681f3Smrg    */
887ec681f3Smrg   uint32_t pot_width = 2 * util_next_power_of_two(u_minify(width, 1));
897ec681f3Smrg   uint32_t pot_height = 2 * util_next_power_of_two(u_minify(height, 1));
907ec681f3Smrg   uint32_t pot_depth = 2 * util_next_power_of_two(u_minify(depth, 1));
917ec681f3Smrg
927ec681f3Smrg   uint32_t utile_w = v3d_utile_width(image->cpp);
937ec681f3Smrg   uint32_t utile_h = v3d_utile_height(image->cpp);
947ec681f3Smrg   uint32_t uif_block_w = utile_w * 2;
957ec681f3Smrg   uint32_t uif_block_h = utile_h * 2;
967ec681f3Smrg
977ec681f3Smrg   uint32_t block_width = vk_format_get_blockwidth(image->vk.format);
987ec681f3Smrg   uint32_t block_height = vk_format_get_blockheight(image->vk.format);
997ec681f3Smrg
1007ec681f3Smrg   assert(image->vk.samples == VK_SAMPLE_COUNT_1_BIT ||
1017ec681f3Smrg          image->vk.samples == VK_SAMPLE_COUNT_4_BIT);
1027ec681f3Smrg   bool msaa = image->vk.samples != VK_SAMPLE_COUNT_1_BIT;
1037ec681f3Smrg
1047ec681f3Smrg   bool uif_top = msaa;
1057ec681f3Smrg
1067ec681f3Smrg   assert(image->vk.array_layers > 0);
1077ec681f3Smrg   assert(depth > 0);
1087ec681f3Smrg   assert(image->vk.mip_levels >= 1);
1097ec681f3Smrg
1107ec681f3Smrg   uint32_t offset = 0;
1117ec681f3Smrg   for (int32_t i = image->vk.mip_levels - 1; i >= 0; i--) {
1127ec681f3Smrg      struct v3d_resource_slice *slice = &image->slices[i];
1137ec681f3Smrg
1147ec681f3Smrg      uint32_t level_width, level_height, level_depth;
1157ec681f3Smrg      if (i < 2) {
1167ec681f3Smrg         level_width = u_minify(width, i);
1177ec681f3Smrg         level_height = u_minify(height, i);
1187ec681f3Smrg      } else {
1197ec681f3Smrg         level_width = u_minify(pot_width, i);
1207ec681f3Smrg         level_height = u_minify(pot_height, i);
1217ec681f3Smrg      }
1227ec681f3Smrg
1237ec681f3Smrg      if (i < 1)
1247ec681f3Smrg         level_depth = u_minify(depth, i);
1257ec681f3Smrg      else
1267ec681f3Smrg         level_depth = u_minify(pot_depth, i);
1277ec681f3Smrg
1287ec681f3Smrg      if (msaa) {
1297ec681f3Smrg         level_width *= 2;
1307ec681f3Smrg         level_height *= 2;
1317ec681f3Smrg      }
1327ec681f3Smrg
1337ec681f3Smrg      level_width = DIV_ROUND_UP(level_width, block_width);
1347ec681f3Smrg      level_height = DIV_ROUND_UP(level_height, block_height);
1357ec681f3Smrg
1367ec681f3Smrg      if (!image->tiled) {
1377ec681f3Smrg         slice->tiling = V3D_TILING_RASTER;
1387ec681f3Smrg         if (image->vk.image_type == VK_IMAGE_TYPE_1D)
1397ec681f3Smrg            level_width = align(level_width, 64 / image->cpp);
1407ec681f3Smrg      } else {
1417ec681f3Smrg         if ((i != 0 || !uif_top) &&
1427ec681f3Smrg             (level_width <= utile_w || level_height <= utile_h)) {
1437ec681f3Smrg            slice->tiling = V3D_TILING_LINEARTILE;
1447ec681f3Smrg            level_width = align(level_width, utile_w);
1457ec681f3Smrg            level_height = align(level_height, utile_h);
1467ec681f3Smrg         } else if ((i != 0 || !uif_top) && level_width <= uif_block_w) {
1477ec681f3Smrg            slice->tiling = V3D_TILING_UBLINEAR_1_COLUMN;
1487ec681f3Smrg            level_width = align(level_width, uif_block_w);
1497ec681f3Smrg            level_height = align(level_height, uif_block_h);
1507ec681f3Smrg         } else if ((i != 0 || !uif_top) && level_width <= 2 * uif_block_w) {
1517ec681f3Smrg            slice->tiling = V3D_TILING_UBLINEAR_2_COLUMN;
1527ec681f3Smrg            level_width = align(level_width, 2 * uif_block_w);
1537ec681f3Smrg            level_height = align(level_height, uif_block_h);
1547ec681f3Smrg         } else {
1557ec681f3Smrg            /* We align the width to a 4-block column of UIF blocks, but we
1567ec681f3Smrg             * only align height to UIF blocks.
1577ec681f3Smrg             */
1587ec681f3Smrg            level_width = align(level_width, 4 * uif_block_w);
1597ec681f3Smrg            level_height = align(level_height, uif_block_h);
1607ec681f3Smrg
1617ec681f3Smrg            slice->ub_pad = v3d_get_ub_pad(image->cpp, level_height);
1627ec681f3Smrg            level_height += slice->ub_pad * uif_block_h;
1637ec681f3Smrg
1647ec681f3Smrg            /* If the padding set us to to be aligned to the page cache size,
1657ec681f3Smrg             * then the HW will use the XOR bit on odd columns to get us
1667ec681f3Smrg             * perfectly misaligned.
1677ec681f3Smrg             */
1687ec681f3Smrg            if ((level_height / uif_block_h) %
1697ec681f3Smrg                (V3D_PAGE_CACHE_SIZE / V3D_UIFBLOCK_ROW_SIZE) == 0) {
1707ec681f3Smrg               slice->tiling = V3D_TILING_UIF_XOR;
1717ec681f3Smrg            } else {
1727ec681f3Smrg               slice->tiling = V3D_TILING_UIF_NO_XOR;
1737ec681f3Smrg            }
1747ec681f3Smrg         }
1757ec681f3Smrg      }
1767ec681f3Smrg
1777ec681f3Smrg      slice->offset = offset;
1787ec681f3Smrg      slice->stride = level_width * image->cpp;
1797ec681f3Smrg      slice->padded_height = level_height;
1807ec681f3Smrg      if (slice->tiling == V3D_TILING_UIF_NO_XOR ||
1817ec681f3Smrg          slice->tiling == V3D_TILING_UIF_XOR) {
1827ec681f3Smrg         slice->padded_height_of_output_image_in_uif_blocks =
1837ec681f3Smrg            slice->padded_height / (2 * v3d_utile_height(image->cpp));
1847ec681f3Smrg      }
1857ec681f3Smrg
1867ec681f3Smrg      slice->size = level_height * slice->stride;
1877ec681f3Smrg      uint32_t slice_total_size = slice->size * level_depth;
1887ec681f3Smrg
1897ec681f3Smrg      /* The HW aligns level 1's base to a page if any of level 1 or
1907ec681f3Smrg       * below could be UIF XOR.  The lower levels then inherit the
1917ec681f3Smrg       * alignment for as long as necesary, thanks to being power of
1927ec681f3Smrg       * two aligned.
1937ec681f3Smrg       */
1947ec681f3Smrg      if (i == 1 &&
1957ec681f3Smrg          level_width > 4 * uif_block_w &&
1967ec681f3Smrg          level_height > PAGE_CACHE_MINUS_1_5_UB_ROWS * uif_block_h) {
1977ec681f3Smrg         slice_total_size = align(slice_total_size, V3D_UIFCFG_PAGE_SIZE);
1987ec681f3Smrg      }
1997ec681f3Smrg
2007ec681f3Smrg      offset += slice_total_size;
2017ec681f3Smrg   }
2027ec681f3Smrg
2037ec681f3Smrg   image->size = offset;
2047ec681f3Smrg
2057ec681f3Smrg   /* UIF/UBLINEAR levels need to be aligned to UIF-blocks, and LT only
2067ec681f3Smrg    * needs to be aligned to utile boundaries.  Since tiles are laid out
2077ec681f3Smrg    * from small to big in memory, we need to align the later UIF slices
2087ec681f3Smrg    * to UIF blocks, if they were preceded by non-UIF-block-aligned LT
2097ec681f3Smrg    * slices.
2107ec681f3Smrg    *
2117ec681f3Smrg    * We additionally align to 4k, which improves UIF XOR performance.
2127ec681f3Smrg    */
2137ec681f3Smrg   image->alignment = image->tiled ? 4096 : image->cpp;
2147ec681f3Smrg   uint32_t align_offset =
2157ec681f3Smrg      align(image->slices[0].offset, image->alignment) - image->slices[0].offset;
2167ec681f3Smrg   if (align_offset) {
2177ec681f3Smrg      image->size += align_offset;
2187ec681f3Smrg      for (int i = 0; i < image->vk.mip_levels; i++)
2197ec681f3Smrg         image->slices[i].offset += align_offset;
2207ec681f3Smrg   }
2217ec681f3Smrg
2227ec681f3Smrg   /* Arrays and cube textures have a stride which is the distance from
2237ec681f3Smrg    * one full mipmap tree to the next (64b aligned).  For 3D textures,
2247ec681f3Smrg    * we need to program the stride between slices of miplevel 0.
2257ec681f3Smrg    */
2267ec681f3Smrg   if (image->vk.image_type != VK_IMAGE_TYPE_3D) {
2277ec681f3Smrg      image->cube_map_stride =
2287ec681f3Smrg         align(image->slices[0].offset + image->slices[0].size, 64);
2297ec681f3Smrg      image->size += image->cube_map_stride * (image->vk.array_layers - 1);
2307ec681f3Smrg   } else {
2317ec681f3Smrg      image->cube_map_stride = image->slices[0].size;
2327ec681f3Smrg   }
2337ec681f3Smrg}
2347ec681f3Smrg
2357ec681f3Smrguint32_t
2367ec681f3Smrgv3dv_layer_offset(const struct v3dv_image *image, uint32_t level, uint32_t layer)
2377ec681f3Smrg{
2387ec681f3Smrg   const struct v3d_resource_slice *slice = &image->slices[level];
2397ec681f3Smrg
2407ec681f3Smrg   if (image->vk.image_type == VK_IMAGE_TYPE_3D)
2417ec681f3Smrg      return image->mem_offset + slice->offset + layer * slice->size;
2427ec681f3Smrg   else
2437ec681f3Smrg      return image->mem_offset + slice->offset + layer * image->cube_map_stride;
2447ec681f3Smrg}
2457ec681f3Smrg
2467ec681f3Smrgstatic VkResult
2477ec681f3Smrgcreate_image(struct v3dv_device *device,
2487ec681f3Smrg             const VkImageCreateInfo *pCreateInfo,
2497ec681f3Smrg             const VkAllocationCallbacks *pAllocator,
2507ec681f3Smrg             VkImage *pImage)
2517ec681f3Smrg{
2527ec681f3Smrg   struct v3dv_image *image = NULL;
2537ec681f3Smrg
2547ec681f3Smrg   image = vk_image_create(&device->vk, pCreateInfo, pAllocator, sizeof(*image));
2557ec681f3Smrg   if (image == NULL)
2567ec681f3Smrg      return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
2577ec681f3Smrg
2587ec681f3Smrg   /* When using the simulator the WSI common code will see that our
2597ec681f3Smrg    * driver wsi device doesn't match the display device and because of that
2607ec681f3Smrg    * it will not attempt to present directly from the swapchain images,
2617ec681f3Smrg    * instead it will use the prime blit path (use_prime_blit flag in
2627ec681f3Smrg    * struct wsi_swapchain), where it copies the contents of the swapchain
2637ec681f3Smrg    * images to a linear buffer with appropriate row stride for presentation.
2647ec681f3Smrg    * As a result, on that path, swapchain images do not have any special
2657ec681f3Smrg    * requirements and are not created with the pNext structs below.
2667ec681f3Smrg    */
2677ec681f3Smrg   VkImageTiling tiling = pCreateInfo->tiling;
2687ec681f3Smrg   uint64_t modifier = DRM_FORMAT_MOD_INVALID;
2697ec681f3Smrg   if (tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
2707ec681f3Smrg      const VkImageDrmFormatModifierListCreateInfoEXT *mod_info =
2717ec681f3Smrg         vk_find_struct_const(pCreateInfo->pNext,
2727ec681f3Smrg                              IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT);
2737ec681f3Smrg      const VkImageDrmFormatModifierExplicitCreateInfoEXT *explicit_mod_info =
2747ec681f3Smrg         vk_find_struct_const(pCreateInfo->pNext,
2757ec681f3Smrg                              IMAGE_DRM_FORMAT_MODIFIER_EXPLICIT_CREATE_INFO_EXT);
2767ec681f3Smrg      assert(mod_info || explicit_mod_info);
2777ec681f3Smrg
2787ec681f3Smrg      if (mod_info) {
2797ec681f3Smrg         for (uint32_t i = 0; i < mod_info->drmFormatModifierCount; i++) {
2807ec681f3Smrg            switch (mod_info->pDrmFormatModifiers[i]) {
2817ec681f3Smrg            case DRM_FORMAT_MOD_LINEAR:
2827ec681f3Smrg               if (modifier == DRM_FORMAT_MOD_INVALID)
2837ec681f3Smrg                  modifier = DRM_FORMAT_MOD_LINEAR;
2847ec681f3Smrg               break;
2857ec681f3Smrg            case DRM_FORMAT_MOD_BROADCOM_UIF:
2867ec681f3Smrg               modifier = DRM_FORMAT_MOD_BROADCOM_UIF;
2877ec681f3Smrg               break;
2887ec681f3Smrg            }
2897ec681f3Smrg         }
2907ec681f3Smrg      } else {
2917ec681f3Smrg         modifier = explicit_mod_info->drmFormatModifier;
2927ec681f3Smrg      }
2937ec681f3Smrg      assert(modifier == DRM_FORMAT_MOD_LINEAR ||
2947ec681f3Smrg             modifier == DRM_FORMAT_MOD_BROADCOM_UIF);
2957ec681f3Smrg   } else if (pCreateInfo->imageType == VK_IMAGE_TYPE_1D ||
2967ec681f3Smrg              image->vk.wsi_legacy_scanout) {
2977ec681f3Smrg      tiling = VK_IMAGE_TILING_LINEAR;
2987ec681f3Smrg   }
2997ec681f3Smrg
3007ec681f3Smrg   const struct v3dv_format *format =
3017ec681f3Smrg      v3dv_X(device, get_format)(pCreateInfo->format);
3027ec681f3Smrg   v3dv_assert(format != NULL && format->supported);
3037ec681f3Smrg
3047ec681f3Smrg   assert(pCreateInfo->samples == VK_SAMPLE_COUNT_1_BIT ||
3057ec681f3Smrg          pCreateInfo->samples == VK_SAMPLE_COUNT_4_BIT);
3067ec681f3Smrg
3077ec681f3Smrg   image->format = format;
3087ec681f3Smrg   image->cpp = vk_format_get_blocksize(image->vk.format);
3097ec681f3Smrg   image->tiled = tiling == VK_IMAGE_TILING_OPTIMAL ||
3107ec681f3Smrg                  (tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT &&
3117ec681f3Smrg                   modifier != DRM_FORMAT_MOD_LINEAR);
3127ec681f3Smrg
3137ec681f3Smrg   image->vk.tiling = tiling;
3147ec681f3Smrg   image->vk.drm_format_mod = modifier;
3157ec681f3Smrg
3167ec681f3Smrg   /* Our meta paths can create image views with compatible formats for any
3177ec681f3Smrg    * image, so always set this flag to keep the common Vulkan image code
3187ec681f3Smrg    * happy.
3197ec681f3Smrg    */
3207ec681f3Smrg   image->vk.create_flags |= VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT;
3217ec681f3Smrg
3227ec681f3Smrg   v3d_setup_slices(image);
3237ec681f3Smrg
3247ec681f3Smrg   *pImage = v3dv_image_to_handle(image);
3257ec681f3Smrg
3267ec681f3Smrg   return VK_SUCCESS;
3277ec681f3Smrg}
3287ec681f3Smrg
3297ec681f3Smrgstatic VkResult
3307ec681f3Smrgcreate_image_from_swapchain(struct v3dv_device *device,
3317ec681f3Smrg                            const VkImageCreateInfo *pCreateInfo,
3327ec681f3Smrg                            const VkImageSwapchainCreateInfoKHR *swapchain_info,
3337ec681f3Smrg                            const VkAllocationCallbacks *pAllocator,
3347ec681f3Smrg                            VkImage *pImage)
3357ec681f3Smrg{
3367ec681f3Smrg   struct v3dv_image *swapchain_image =
3377ec681f3Smrg      v3dv_wsi_get_image_from_swapchain(swapchain_info->swapchain, 0);
3387ec681f3Smrg   assert(swapchain_image);
3397ec681f3Smrg
3407ec681f3Smrg   VkImageCreateInfo local_create_info = *pCreateInfo;
3417ec681f3Smrg   local_create_info.pNext = NULL;
3427ec681f3Smrg
3437ec681f3Smrg   /* Added by wsi code. */
3447ec681f3Smrg   local_create_info.usage |= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
3457ec681f3Smrg
3467ec681f3Smrg   /* The spec requires TILING_OPTIMAL as input, but the swapchain image may
3477ec681f3Smrg    * privately use a different tiling.  See spec anchor
3487ec681f3Smrg    * #swapchain-wsi-image-create-info .
3497ec681f3Smrg    */
3507ec681f3Smrg   assert(local_create_info.tiling == VK_IMAGE_TILING_OPTIMAL);
3517ec681f3Smrg   local_create_info.tiling = swapchain_image->vk.tiling;
3527ec681f3Smrg
3537ec681f3Smrg   VkImageDrmFormatModifierListCreateInfoEXT local_modifier_info = {
3547ec681f3Smrg      .sType = VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT,
3557ec681f3Smrg      .drmFormatModifierCount = 1,
3567ec681f3Smrg      .pDrmFormatModifiers = &swapchain_image->vk.drm_format_mod,
3577ec681f3Smrg   };
3587ec681f3Smrg
3597ec681f3Smrg   if (swapchain_image->vk.drm_format_mod != DRM_FORMAT_MOD_INVALID)
3607ec681f3Smrg      __vk_append_struct(&local_create_info, &local_modifier_info);
3617ec681f3Smrg
3627ec681f3Smrg   assert(swapchain_image->vk.image_type == local_create_info.imageType);
3637ec681f3Smrg   assert(swapchain_image->vk.format == local_create_info.format);
3647ec681f3Smrg   assert(swapchain_image->vk.extent.width == local_create_info.extent.width);
3657ec681f3Smrg   assert(swapchain_image->vk.extent.height == local_create_info.extent.height);
3667ec681f3Smrg   assert(swapchain_image->vk.extent.depth == local_create_info.extent.depth);
3677ec681f3Smrg   assert(swapchain_image->vk.array_layers == local_create_info.arrayLayers);
3687ec681f3Smrg   assert(swapchain_image->vk.samples == local_create_info.samples);
3697ec681f3Smrg   assert(swapchain_image->vk.tiling == local_create_info.tiling);
3707ec681f3Smrg   assert((swapchain_image->vk.usage & local_create_info.usage) ==
3717ec681f3Smrg          local_create_info.usage);
3727ec681f3Smrg
3737ec681f3Smrg   return create_image(device, &local_create_info, pAllocator, pImage);
3747ec681f3Smrg}
3757ec681f3Smrg
3767ec681f3SmrgVKAPI_ATTR VkResult VKAPI_CALL
3777ec681f3Smrgv3dv_CreateImage(VkDevice _device,
3787ec681f3Smrg                 const VkImageCreateInfo *pCreateInfo,
3797ec681f3Smrg                 const VkAllocationCallbacks *pAllocator,
3807ec681f3Smrg                 VkImage *pImage)
3817ec681f3Smrg{
3827ec681f3Smrg   V3DV_FROM_HANDLE(v3dv_device, device, _device);
3837ec681f3Smrg
3847ec681f3Smrg   const VkImageSwapchainCreateInfoKHR *swapchain_info =
3857ec681f3Smrg      vk_find_struct_const(pCreateInfo->pNext, IMAGE_SWAPCHAIN_CREATE_INFO_KHR);
3867ec681f3Smrg   if (swapchain_info && swapchain_info->swapchain != VK_NULL_HANDLE)
3877ec681f3Smrg      return create_image_from_swapchain(device, pCreateInfo, swapchain_info,
3887ec681f3Smrg                                         pAllocator, pImage);
3897ec681f3Smrg
3907ec681f3Smrg   return create_image(device, pCreateInfo, pAllocator, pImage);
3917ec681f3Smrg}
3927ec681f3Smrg
3937ec681f3SmrgVKAPI_ATTR void VKAPI_CALL
3947ec681f3Smrgv3dv_GetImageSubresourceLayout(VkDevice device,
3957ec681f3Smrg                               VkImage _image,
3967ec681f3Smrg                               const VkImageSubresource *subresource,
3977ec681f3Smrg                               VkSubresourceLayout *layout)
3987ec681f3Smrg{
3997ec681f3Smrg   V3DV_FROM_HANDLE(v3dv_image, image, _image);
4007ec681f3Smrg
4017ec681f3Smrg   const struct v3d_resource_slice *slice =
4027ec681f3Smrg      &image->slices[subresource->mipLevel];
4037ec681f3Smrg   layout->offset =
4047ec681f3Smrg      v3dv_layer_offset(image, subresource->mipLevel, subresource->arrayLayer);
4057ec681f3Smrg   layout->rowPitch = slice->stride;
4067ec681f3Smrg   layout->depthPitch = image->cube_map_stride;
4077ec681f3Smrg   layout->arrayPitch = image->cube_map_stride;
4087ec681f3Smrg
4097ec681f3Smrg   if (image->vk.image_type != VK_IMAGE_TYPE_3D) {
4107ec681f3Smrg      layout->size = slice->size;
4117ec681f3Smrg   } else {
4127ec681f3Smrg      /* For 3D images, the size of the slice represents the size of a 2D slice
4137ec681f3Smrg       * in the 3D image, so we have to multiply by the depth extent of the
4147ec681f3Smrg       * miplevel. For levels other than the first, we just compute the size
4157ec681f3Smrg       * as the distance between consecutive levels (notice that mip levels are
4167ec681f3Smrg       * arranged in memory from last to first).
4177ec681f3Smrg       */
4187ec681f3Smrg      if (subresource->mipLevel == 0) {
4197ec681f3Smrg         layout->size = slice->size * image->vk.extent.depth;
4207ec681f3Smrg      } else {
4217ec681f3Smrg            const struct v3d_resource_slice *prev_slice =
4227ec681f3Smrg               &image->slices[subresource->mipLevel - 1];
4237ec681f3Smrg            layout->size = prev_slice->offset - slice->offset;
4247ec681f3Smrg      }
4257ec681f3Smrg   }
4267ec681f3Smrg}
4277ec681f3Smrg
4287ec681f3SmrgVKAPI_ATTR void VKAPI_CALL
4297ec681f3Smrgv3dv_DestroyImage(VkDevice _device,
4307ec681f3Smrg                  VkImage _image,
4317ec681f3Smrg                  const VkAllocationCallbacks* pAllocator)
4327ec681f3Smrg{
4337ec681f3Smrg   V3DV_FROM_HANDLE(v3dv_device, device, _device);
4347ec681f3Smrg   V3DV_FROM_HANDLE(v3dv_image, image, _image);
4357ec681f3Smrg
4367ec681f3Smrg   if (image == NULL)
4377ec681f3Smrg      return;
4387ec681f3Smrg
4397ec681f3Smrg   vk_image_destroy(&device->vk, pAllocator, &image->vk);
4407ec681f3Smrg}
4417ec681f3Smrg
4427ec681f3SmrgVkImageViewType
4437ec681f3Smrgv3dv_image_type_to_view_type(VkImageType type)
4447ec681f3Smrg{
4457ec681f3Smrg   switch (type) {
4467ec681f3Smrg   case VK_IMAGE_TYPE_1D: return VK_IMAGE_VIEW_TYPE_1D;
4477ec681f3Smrg   case VK_IMAGE_TYPE_2D: return VK_IMAGE_VIEW_TYPE_2D;
4487ec681f3Smrg   case VK_IMAGE_TYPE_3D: return VK_IMAGE_VIEW_TYPE_3D;
4497ec681f3Smrg   default:
4507ec681f3Smrg      unreachable("Invalid image type");
4517ec681f3Smrg   }
4527ec681f3Smrg}
4537ec681f3Smrg
4547ec681f3Smrgstatic enum pipe_swizzle
4557ec681f3Smrgvk_component_mapping_to_pipe_swizzle(VkComponentSwizzle swz)
4567ec681f3Smrg{
4577ec681f3Smrg   assert(swz != VK_COMPONENT_SWIZZLE_IDENTITY);
4587ec681f3Smrg
4597ec681f3Smrg   switch (swz) {
4607ec681f3Smrg   case VK_COMPONENT_SWIZZLE_ZERO:
4617ec681f3Smrg      return PIPE_SWIZZLE_0;
4627ec681f3Smrg   case VK_COMPONENT_SWIZZLE_ONE:
4637ec681f3Smrg      return PIPE_SWIZZLE_1;
4647ec681f3Smrg   case VK_COMPONENT_SWIZZLE_R:
4657ec681f3Smrg      return PIPE_SWIZZLE_X;
4667ec681f3Smrg   case VK_COMPONENT_SWIZZLE_G:
4677ec681f3Smrg      return PIPE_SWIZZLE_Y;
4687ec681f3Smrg   case VK_COMPONENT_SWIZZLE_B:
4697ec681f3Smrg      return PIPE_SWIZZLE_Z;
4707ec681f3Smrg   case VK_COMPONENT_SWIZZLE_A:
4717ec681f3Smrg      return PIPE_SWIZZLE_W;
4727ec681f3Smrg   default:
4737ec681f3Smrg      unreachable("Unknown VkComponentSwizzle");
4747ec681f3Smrg   };
4757ec681f3Smrg}
4767ec681f3Smrg
4777ec681f3SmrgVKAPI_ATTR VkResult VKAPI_CALL
4787ec681f3Smrgv3dv_CreateImageView(VkDevice _device,
4797ec681f3Smrg                     const VkImageViewCreateInfo *pCreateInfo,
4807ec681f3Smrg                     const VkAllocationCallbacks *pAllocator,
4817ec681f3Smrg                     VkImageView *pView)
4827ec681f3Smrg{
4837ec681f3Smrg   V3DV_FROM_HANDLE(v3dv_device, device, _device);
4847ec681f3Smrg   V3DV_FROM_HANDLE(v3dv_image, image, pCreateInfo->image);
4857ec681f3Smrg   struct v3dv_image_view *iview;
4867ec681f3Smrg
4877ec681f3Smrg   iview = vk_image_view_create(&device->vk, pCreateInfo, pAllocator,
4887ec681f3Smrg                                sizeof(*iview));
4897ec681f3Smrg   if (iview == NULL)
4907ec681f3Smrg      return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
4917ec681f3Smrg
4927ec681f3Smrg   const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
4937ec681f3Smrg
4947ec681f3Smrg   iview->offset = v3dv_layer_offset(image, iview->vk.base_mip_level,
4957ec681f3Smrg                                     iview->vk.base_array_layer);
4967ec681f3Smrg
4977ec681f3Smrg   /* If we have D24S8 format but the view only selects the stencil aspect
4987ec681f3Smrg    * we want to re-interpret the format as RGBA8_UINT, then map our stencil
4997ec681f3Smrg    * data reads to the R component and ignore the GBA channels that contain
5007ec681f3Smrg    * the depth aspect data.
5017ec681f3Smrg    */
5027ec681f3Smrg   VkFormat format;
5037ec681f3Smrg   uint8_t image_view_swizzle[4];
5047ec681f3Smrg   if (pCreateInfo->format == VK_FORMAT_D24_UNORM_S8_UINT &&
5057ec681f3Smrg       range->aspectMask == VK_IMAGE_ASPECT_STENCIL_BIT) {
5067ec681f3Smrg      format = VK_FORMAT_R8G8B8A8_UINT;
5077ec681f3Smrg      image_view_swizzle[0] = PIPE_SWIZZLE_X;
5087ec681f3Smrg      image_view_swizzle[1] = PIPE_SWIZZLE_0;
5097ec681f3Smrg      image_view_swizzle[2] = PIPE_SWIZZLE_0;
5107ec681f3Smrg      image_view_swizzle[3] = PIPE_SWIZZLE_1;
5117ec681f3Smrg   } else {
5127ec681f3Smrg      format = pCreateInfo->format;
5137ec681f3Smrg
5147ec681f3Smrg      /* FIXME: we are doing this vk to pipe swizzle mapping just to call
5157ec681f3Smrg       * util_format_compose_swizzles. Would be good to check if it would be
5167ec681f3Smrg       * better to reimplement the latter using vk component
5177ec681f3Smrg       */
5187ec681f3Smrg      image_view_swizzle[0] =
5197ec681f3Smrg         vk_component_mapping_to_pipe_swizzle(iview->vk.swizzle.r);
5207ec681f3Smrg      image_view_swizzle[1] =
5217ec681f3Smrg         vk_component_mapping_to_pipe_swizzle(iview->vk.swizzle.g);
5227ec681f3Smrg      image_view_swizzle[2] =
5237ec681f3Smrg         vk_component_mapping_to_pipe_swizzle(iview->vk.swizzle.b);
5247ec681f3Smrg      image_view_swizzle[3] =
5257ec681f3Smrg         vk_component_mapping_to_pipe_swizzle(iview->vk.swizzle.a);
5267ec681f3Smrg   }
5277ec681f3Smrg
5287ec681f3Smrg   iview->vk.format = format;
5297ec681f3Smrg   iview->format = v3dv_X(device, get_format)(format);
5307ec681f3Smrg   assert(iview->format && iview->format->supported);
5317ec681f3Smrg
5327ec681f3Smrg   if (vk_format_is_depth_or_stencil(iview->vk.format)) {
5337ec681f3Smrg      iview->internal_type =
5347ec681f3Smrg         v3dv_X(device, get_internal_depth_type)(iview->vk.format);
5357ec681f3Smrg   } else {
5367ec681f3Smrg      v3dv_X(device, get_internal_type_bpp_for_output_format)
5377ec681f3Smrg         (iview->format->rt_type, &iview->internal_type, &iview->internal_bpp);
5387ec681f3Smrg   }
5397ec681f3Smrg
5407ec681f3Smrg   const uint8_t *format_swizzle = v3dv_get_format_swizzle(device, format);
5417ec681f3Smrg   util_format_compose_swizzles(format_swizzle, image_view_swizzle,
5427ec681f3Smrg                                iview->swizzle);
5437ec681f3Smrg   iview->swap_rb = iview->swizzle[0] == PIPE_SWIZZLE_Z;
5447ec681f3Smrg
5457ec681f3Smrg   v3dv_X(device, pack_texture_shader_state)(device, iview);
5467ec681f3Smrg
5477ec681f3Smrg   *pView = v3dv_image_view_to_handle(iview);
5487ec681f3Smrg
5497ec681f3Smrg   return VK_SUCCESS;
5507ec681f3Smrg}
5517ec681f3Smrg
5527ec681f3SmrgVKAPI_ATTR void VKAPI_CALL
5537ec681f3Smrgv3dv_DestroyImageView(VkDevice _device,
5547ec681f3Smrg                      VkImageView imageView,
5557ec681f3Smrg                      const VkAllocationCallbacks* pAllocator)
5567ec681f3Smrg{
5577ec681f3Smrg   V3DV_FROM_HANDLE(v3dv_device, device, _device);
5587ec681f3Smrg   V3DV_FROM_HANDLE(v3dv_image_view, image_view, imageView);
5597ec681f3Smrg
5607ec681f3Smrg   if (image_view == NULL)
5617ec681f3Smrg      return;
5627ec681f3Smrg
5637ec681f3Smrg   vk_image_view_destroy(&device->vk, pAllocator, &image_view->vk);
5647ec681f3Smrg}
5657ec681f3Smrg
5667ec681f3SmrgVKAPI_ATTR VkResult VKAPI_CALL
5677ec681f3Smrgv3dv_CreateBufferView(VkDevice _device,
5687ec681f3Smrg                      const VkBufferViewCreateInfo *pCreateInfo,
5697ec681f3Smrg                      const VkAllocationCallbacks *pAllocator,
5707ec681f3Smrg                      VkBufferView *pView)
5717ec681f3Smrg{
5727ec681f3Smrg   V3DV_FROM_HANDLE(v3dv_device, device, _device);
5737ec681f3Smrg
5747ec681f3Smrg   struct v3dv_buffer *buffer =
5757ec681f3Smrg      v3dv_buffer_from_handle(pCreateInfo->buffer);
5767ec681f3Smrg
5777ec681f3Smrg   struct v3dv_buffer_view *view =
5787ec681f3Smrg      vk_object_zalloc(&device->vk, pAllocator, sizeof(*view),
5797ec681f3Smrg                       VK_OBJECT_TYPE_BUFFER_VIEW);
5807ec681f3Smrg   if (!view)
5817ec681f3Smrg      return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
5827ec681f3Smrg
5837ec681f3Smrg   uint32_t range;
5847ec681f3Smrg   if (pCreateInfo->range == VK_WHOLE_SIZE)
5857ec681f3Smrg      range = buffer->size - pCreateInfo->offset;
5867ec681f3Smrg   else
5877ec681f3Smrg      range = pCreateInfo->range;
5887ec681f3Smrg
5897ec681f3Smrg   enum pipe_format pipe_format = vk_format_to_pipe_format(pCreateInfo->format);
5907ec681f3Smrg   uint32_t num_elements = range / util_format_get_blocksize(pipe_format);
5917ec681f3Smrg
5927ec681f3Smrg   view->buffer = buffer;
5937ec681f3Smrg   view->offset = pCreateInfo->offset;
5947ec681f3Smrg   view->size = view->offset + range;
5957ec681f3Smrg   view->num_elements = num_elements;
5967ec681f3Smrg   view->vk_format = pCreateInfo->format;
5977ec681f3Smrg   view->format = v3dv_X(device, get_format)(view->vk_format);
5987ec681f3Smrg
5997ec681f3Smrg   v3dv_X(device, get_internal_type_bpp_for_output_format)
6007ec681f3Smrg      (view->format->rt_type, &view->internal_type, &view->internal_bpp);
6017ec681f3Smrg
6027ec681f3Smrg   if (buffer->usage & VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT ||
6037ec681f3Smrg       buffer->usage & VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT)
6047ec681f3Smrg      v3dv_X(device, pack_texture_shader_state_from_buffer_view)(device, view);
6057ec681f3Smrg
6067ec681f3Smrg   *pView = v3dv_buffer_view_to_handle(view);
6077ec681f3Smrg
6087ec681f3Smrg   return VK_SUCCESS;
6097ec681f3Smrg}
6107ec681f3Smrg
6117ec681f3SmrgVKAPI_ATTR void VKAPI_CALL
6127ec681f3Smrgv3dv_DestroyBufferView(VkDevice _device,
6137ec681f3Smrg                       VkBufferView bufferView,
6147ec681f3Smrg                       const VkAllocationCallbacks *pAllocator)
6157ec681f3Smrg{
6167ec681f3Smrg   V3DV_FROM_HANDLE(v3dv_device, device, _device);
6177ec681f3Smrg   V3DV_FROM_HANDLE(v3dv_buffer_view, buffer_view, bufferView);
6187ec681f3Smrg
6197ec681f3Smrg   if (buffer_view == NULL)
6207ec681f3Smrg      return;
6217ec681f3Smrg
6227ec681f3Smrg   vk_object_free(&device->vk, pAllocator, buffer_view);
6237ec681f3Smrg}
624