17ec681f3Smrg/*
27ec681f3Smrg * Copyright © 2017 Intel Corporation
37ec681f3Smrg *
47ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a
57ec681f3Smrg * copy of this software and associated documentation files (the "Software"),
67ec681f3Smrg * to deal in the Software without restriction, including without limitation
77ec681f3Smrg * on the rights to use, copy, modify, merge, publish, distribute, sub
87ec681f3Smrg * license, and/or sell copies of the Software, and to permit persons to whom
97ec681f3Smrg * the Software is furnished to do so, subject to the following conditions:
107ec681f3Smrg *
117ec681f3Smrg * The above copyright notice and this permission notice (including the next
127ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the
137ec681f3Smrg * Software.
147ec681f3Smrg *
157ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
167ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
177ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
187ec681f3Smrg * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
197ec681f3Smrg * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
207ec681f3Smrg * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
217ec681f3Smrg * USE OR OTHER DEALINGS IN THE SOFTWARE.
227ec681f3Smrg */
237ec681f3Smrg#ifndef CROCUS_CONTEXT_H
247ec681f3Smrg#define CROCUS_CONTEXT_H
257ec681f3Smrg
267ec681f3Smrg#include "pipe/p_context.h"
277ec681f3Smrg#include "pipe/p_state.h"
287ec681f3Smrg#include "util/u_debug.h"
297ec681f3Smrg#include "util/u_threaded_context.h"
307ec681f3Smrg#include "intel/blorp/blorp.h"
317ec681f3Smrg#include "intel/dev/intel_debug.h"
327ec681f3Smrg#include "intel/compiler/brw_compiler.h"
337ec681f3Smrg#include "crocus_batch.h"
347ec681f3Smrg#include "crocus_fence.h"
357ec681f3Smrg#include "crocus_resource.h"
367ec681f3Smrg#include "crocus_screen.h"
377ec681f3Smrg#include "util/u_blitter.h"
387ec681f3Smrg
397ec681f3Smrgstruct crocus_bo;
407ec681f3Smrgstruct crocus_context;
417ec681f3Smrgstruct blorp_batch;
427ec681f3Smrgstruct blorp_params;
437ec681f3Smrg
447ec681f3Smrg#define CROCUS_MAX_TEXTURE_BUFFER_SIZE (1 << 27)
457ec681f3Smrg#define CROCUS_MAX_TEXTURE_SAMPLERS 32
467ec681f3Smrg/* CROCUS_MAX_ABOS and CROCUS_MAX_SSBOS must be the same. */
477ec681f3Smrg#define CROCUS_MAX_ABOS 16
487ec681f3Smrg#define CROCUS_MAX_SSBOS 16
497ec681f3Smrg#define CROCUS_MAX_VIEWPORTS 16
507ec681f3Smrg#define CROCUS_MAX_CLIP_PLANES 8
517ec681f3Smrg
527ec681f3Smrgenum crocus_param_domain {
537ec681f3Smrg   BRW_PARAM_DOMAIN_BUILTIN = 0,
547ec681f3Smrg   BRW_PARAM_DOMAIN_IMAGE,
557ec681f3Smrg};
567ec681f3Smrg
577ec681f3Smrgenum {
587ec681f3Smrg   DRI_CONF_BO_REUSE_DISABLED,
597ec681f3Smrg   DRI_CONF_BO_REUSE_ALL
607ec681f3Smrg};
617ec681f3Smrg
627ec681f3Smrg#define BRW_PARAM(domain, val)   (BRW_PARAM_DOMAIN_##domain << 24 | (val))
637ec681f3Smrg#define BRW_PARAM_DOMAIN(param)  ((uint32_t)(param) >> 24)
647ec681f3Smrg#define BRW_PARAM_VALUE(param)   ((uint32_t)(param) & 0x00ffffff)
657ec681f3Smrg#define BRW_PARAM_IMAGE(idx, offset) BRW_PARAM(IMAGE, ((idx) << 8) | (offset))
667ec681f3Smrg#define BRW_PARAM_IMAGE_IDX(value)   (BRW_PARAM_VALUE(value) >> 8)
677ec681f3Smrg#define BRW_PARAM_IMAGE_OFFSET(value)(BRW_PARAM_VALUE(value) & 0xf)
687ec681f3Smrg
697ec681f3Smrg/**
707ec681f3Smrg * Dirty flags.  When state changes, we flag some combination of these
717ec681f3Smrg * to indicate that particular GPU commands need to be re-emitted.
727ec681f3Smrg *
737ec681f3Smrg * Each bit typically corresponds to a single 3DSTATE_* command packet, but
747ec681f3Smrg * in rare cases they map to a group of related packets that need to be
757ec681f3Smrg * emitted together.
767ec681f3Smrg *
777ec681f3Smrg * See crocus_upload_render_state().
787ec681f3Smrg */
797ec681f3Smrg#define CROCUS_DIRTY_COLOR_CALC_STATE         (1ull <<  0)
807ec681f3Smrg#define CROCUS_DIRTY_POLYGON_STIPPLE          (1ull <<  1)
817ec681f3Smrg#define CROCUS_DIRTY_CC_VIEWPORT              (1ull <<  2)
827ec681f3Smrg#define CROCUS_DIRTY_SF_CL_VIEWPORT           (1ull <<  3)
837ec681f3Smrg#define CROCUS_DIRTY_RASTER                   (1ull <<  4)
847ec681f3Smrg#define CROCUS_DIRTY_CLIP                     (1ull <<  5)
857ec681f3Smrg#define CROCUS_DIRTY_LINE_STIPPLE             (1ull <<  6)
867ec681f3Smrg#define CROCUS_DIRTY_VERTEX_ELEMENTS          (1ull <<  7)
877ec681f3Smrg#define CROCUS_DIRTY_VERTEX_BUFFERS           (1ull <<  8)
887ec681f3Smrg#define CROCUS_DIRTY_DRAWING_RECTANGLE        (1ull <<  9)
897ec681f3Smrg#define CROCUS_DIRTY_GEN6_URB                 (1ull << 10)
907ec681f3Smrg#define CROCUS_DIRTY_DEPTH_BUFFER             (1ull << 11)
917ec681f3Smrg#define CROCUS_DIRTY_WM                       (1ull << 12)
927ec681f3Smrg#define CROCUS_DIRTY_SO_DECL_LIST             (1ull << 13)
937ec681f3Smrg#define CROCUS_DIRTY_STREAMOUT                (1ull << 14)
947ec681f3Smrg#define CROCUS_DIRTY_GEN4_CONSTANT_COLOR      (1ull << 15)
957ec681f3Smrg#define CROCUS_DIRTY_GEN4_CURBE               (1ull << 16)
967ec681f3Smrg#define CROCUS_DIRTY_GEN4_URB_FENCE           (1ull << 17)
977ec681f3Smrg#define CROCUS_DIRTY_GEN5_PIPELINED_POINTERS  (1ull << 18)
987ec681f3Smrg#define CROCUS_DIRTY_GEN5_BINDING_TABLE_POINTERS  (1ull << 19)
997ec681f3Smrg#define CROCUS_DIRTY_GEN6_BLEND_STATE         (1ull << 20)
1007ec681f3Smrg#define CROCUS_DIRTY_GEN6_SCISSOR_RECT        (1ull << 21)
1017ec681f3Smrg#define CROCUS_DIRTY_GEN6_WM_DEPTH_STENCIL    (1ull << 22)
1027ec681f3Smrg#define CROCUS_DIRTY_GEN6_MULTISAMPLE         (1ull << 23)
1037ec681f3Smrg#define CROCUS_DIRTY_GEN6_SAMPLE_MASK         (1ull << 24)
1047ec681f3Smrg#define CROCUS_DIRTY_GEN7_SBE                 (1ull << 25)
1057ec681f3Smrg#define CROCUS_DIRTY_GEN7_L3_CONFIG           (1ull << 26)
1067ec681f3Smrg#define CROCUS_DIRTY_GEN7_SO_BUFFERS          (1ull << 27)
1077ec681f3Smrg#define CROCUS_DIRTY_GEN75_VF                 (1ull << 28)
1087ec681f3Smrg#define CROCUS_DIRTY_RENDER_RESOLVES_AND_FLUSHES  (1ull << 29)
1097ec681f3Smrg#define CROCUS_DIRTY_COMPUTE_RESOLVES_AND_FLUSHES (1ull << 30)
1107ec681f3Smrg#define CROCUS_DIRTY_VF_STATISTICS            (1ull << 31)
1117ec681f3Smrg#define CROCUS_DIRTY_GEN4_CLIP_PROG           (1ull << 32)
1127ec681f3Smrg#define CROCUS_DIRTY_GEN4_SF_PROG             (1ull << 33)
1137ec681f3Smrg#define CROCUS_DIRTY_GEN4_FF_GS_PROG          (1ull << 34)
1147ec681f3Smrg#define CROCUS_DIRTY_GEN6_SAMPLER_STATE_POINTERS (1ull << 35)
1157ec681f3Smrg#define CROCUS_DIRTY_GEN6_SVBI                (1ull << 36)
1167ec681f3Smrg#define CROCUS_DIRTY_GEN8_VF_TOPOLOGY         (1ull << 37)
1177ec681f3Smrg#define CROCUS_DIRTY_GEN8_PMA_FIX             (1ull << 38)
1187ec681f3Smrg#define CROCUS_DIRTY_GEN8_VF_SGVS             (1ull << 39)
1197ec681f3Smrg#define CROCUS_DIRTY_GEN8_PS_BLEND            (1ull << 40)
1207ec681f3Smrg
1217ec681f3Smrg#define CROCUS_ALL_DIRTY_FOR_COMPUTE (CROCUS_DIRTY_COMPUTE_RESOLVES_AND_FLUSHES)
1227ec681f3Smrg
1237ec681f3Smrg#define CROCUS_ALL_DIRTY_FOR_RENDER (~CROCUS_ALL_DIRTY_FOR_COMPUTE)
1247ec681f3Smrg
1257ec681f3Smrg/**
1267ec681f3Smrg * Per-stage dirty flags.  When state changes, we flag some combination of
1277ec681f3Smrg * these to indicate that particular GPU commands need to be re-emitted.
1287ec681f3Smrg * Unlike the IRIS_DIRTY_* flags these are shader stage-specific and can be
1297ec681f3Smrg * indexed by shifting the mask by the shader stage index.
1307ec681f3Smrg *
1317ec681f3Smrg * See crocus_upload_render_state().
1327ec681f3Smrg */
1337ec681f3Smrg#define CROCUS_STAGE_DIRTY_SAMPLER_STATES_VS        (1ull << 0)
1347ec681f3Smrg#define CROCUS_STAGE_DIRTY_SAMPLER_STATES_TCS       (1ull << 1)
1357ec681f3Smrg#define CROCUS_STAGE_DIRTY_SAMPLER_STATES_TES       (1ull << 2)
1367ec681f3Smrg#define CROCUS_STAGE_DIRTY_SAMPLER_STATES_GS        (1ull << 3)
1377ec681f3Smrg#define CROCUS_STAGE_DIRTY_SAMPLER_STATES_PS        (1ull << 4)
1387ec681f3Smrg#define CROCUS_STAGE_DIRTY_SAMPLER_STATES_CS        (1ull << 5)
1397ec681f3Smrg#define CROCUS_STAGE_DIRTY_UNCOMPILED_VS            (1ull << 6)
1407ec681f3Smrg#define CROCUS_STAGE_DIRTY_UNCOMPILED_TCS           (1ull << 7)
1417ec681f3Smrg#define CROCUS_STAGE_DIRTY_UNCOMPILED_TES           (1ull << 8)
1427ec681f3Smrg#define CROCUS_STAGE_DIRTY_UNCOMPILED_GS            (1ull << 9)
1437ec681f3Smrg#define CROCUS_STAGE_DIRTY_UNCOMPILED_FS            (1ull << 10)
1447ec681f3Smrg#define CROCUS_STAGE_DIRTY_UNCOMPILED_CS            (1ull << 11)
1457ec681f3Smrg#define CROCUS_STAGE_DIRTY_VS                       (1ull << 12)
1467ec681f3Smrg#define CROCUS_STAGE_DIRTY_TCS                      (1ull << 13)
1477ec681f3Smrg#define CROCUS_STAGE_DIRTY_TES                      (1ull << 14)
1487ec681f3Smrg#define CROCUS_STAGE_DIRTY_GS                       (1ull << 15)
1497ec681f3Smrg#define CROCUS_STAGE_DIRTY_FS                       (1ull << 16)
1507ec681f3Smrg#define CROCUS_STAGE_DIRTY_CS                       (1ull << 17)
1517ec681f3Smrg#define CROCUS_SHIFT_FOR_STAGE_DIRTY_CONSTANTS      18
1527ec681f3Smrg#define CROCUS_STAGE_DIRTY_CONSTANTS_VS             (1ull << 18)
1537ec681f3Smrg#define CROCUS_STAGE_DIRTY_CONSTANTS_TCS            (1ull << 19)
1547ec681f3Smrg#define CROCUS_STAGE_DIRTY_CONSTANTS_TES            (1ull << 20)
1557ec681f3Smrg#define CROCUS_STAGE_DIRTY_CONSTANTS_GS             (1ull << 21)
1567ec681f3Smrg#define CROCUS_STAGE_DIRTY_CONSTANTS_FS             (1ull << 22)
1577ec681f3Smrg#define CROCUS_STAGE_DIRTY_CONSTANTS_CS             (1ull << 23)
1587ec681f3Smrg#define CROCUS_STAGE_DIRTY_BINDINGS_VS              (1ull << 24)
1597ec681f3Smrg#define CROCUS_STAGE_DIRTY_BINDINGS_TCS             (1ull << 25)
1607ec681f3Smrg#define CROCUS_STAGE_DIRTY_BINDINGS_TES             (1ull << 26)
1617ec681f3Smrg#define CROCUS_STAGE_DIRTY_BINDINGS_GS              (1ull << 27)
1627ec681f3Smrg#define CROCUS_STAGE_DIRTY_BINDINGS_FS              (1ull << 28)
1637ec681f3Smrg#define CROCUS_STAGE_DIRTY_BINDINGS_CS              (1ull << 29)
1647ec681f3Smrg
1657ec681f3Smrg#define CROCUS_ALL_STAGE_DIRTY_FOR_COMPUTE (CROCUS_STAGE_DIRTY_CS | \
1667ec681f3Smrg                                          CROCUS_STAGE_DIRTY_SAMPLER_STATES_CS | \
1677ec681f3Smrg                                          CROCUS_STAGE_DIRTY_UNCOMPILED_CS |    \
1687ec681f3Smrg                                          CROCUS_STAGE_DIRTY_CONSTANTS_CS |     \
1697ec681f3Smrg                                          CROCUS_STAGE_DIRTY_BINDINGS_CS)
1707ec681f3Smrg
1717ec681f3Smrg#define CROCUS_ALL_STAGE_DIRTY_FOR_RENDER (~CROCUS_ALL_STAGE_DIRTY_FOR_COMPUTE)
1727ec681f3Smrg
1737ec681f3Smrg#define CROCUS_ALL_STAGE_DIRTY_BINDINGS (CROCUS_STAGE_DIRTY_BINDINGS_VS  | \
1747ec681f3Smrg                                       CROCUS_STAGE_DIRTY_BINDINGS_TCS | \
1757ec681f3Smrg                                       CROCUS_STAGE_DIRTY_BINDINGS_TES | \
1767ec681f3Smrg                                       CROCUS_STAGE_DIRTY_BINDINGS_GS  | \
1777ec681f3Smrg                                       CROCUS_STAGE_DIRTY_BINDINGS_FS  | \
1787ec681f3Smrg                                       CROCUS_STAGE_DIRTY_BINDINGS_CS)
1797ec681f3Smrg
1807ec681f3Smrg#define CROCUS_RENDER_STAGE_DIRTY_CONSTANTS (CROCUS_STAGE_DIRTY_CONSTANTS_VS  | \
1817ec681f3Smrg                                             CROCUS_STAGE_DIRTY_CONSTANTS_TCS | \
1827ec681f3Smrg                                             CROCUS_STAGE_DIRTY_CONSTANTS_TES | \
1837ec681f3Smrg                                             CROCUS_STAGE_DIRTY_CONSTANTS_GS  | \
1847ec681f3Smrg                                             CROCUS_STAGE_DIRTY_CONSTANTS_FS)
1857ec681f3Smrg
1867ec681f3Smrg/**
1877ec681f3Smrg * Non-orthogonal state (NOS) dependency flags.
1887ec681f3Smrg *
1897ec681f3Smrg * Shader programs may depend on non-orthogonal state.  These flags are
1907ec681f3Smrg * used to indicate that a shader's key depends on the state provided by
1917ec681f3Smrg * a certain Gallium CSO.  Changing any CSOs marked as a dependency will
1927ec681f3Smrg * cause the driver to re-compute the shader key, possibly triggering a
1937ec681f3Smrg * shader recompile.
1947ec681f3Smrg */
1957ec681f3Smrgenum crocus_nos_dep {
1967ec681f3Smrg   CROCUS_NOS_FRAMEBUFFER,
1977ec681f3Smrg   CROCUS_NOS_DEPTH_STENCIL_ALPHA,
1987ec681f3Smrg   CROCUS_NOS_RASTERIZER,
1997ec681f3Smrg   CROCUS_NOS_BLEND,
2007ec681f3Smrg   CROCUS_NOS_LAST_VUE_MAP,
2017ec681f3Smrg   CROCUS_NOS_TEXTURES,
2027ec681f3Smrg   CROCUS_NOS_VERTEX_ELEMENTS,
2037ec681f3Smrg   CROCUS_NOS_COUNT,
2047ec681f3Smrg};
2057ec681f3Smrg
2067ec681f3Smrgstruct crocus_depth_stencil_alpha_state;
2077ec681f3Smrg
2087ec681f3Smrg/**
2097ec681f3Smrg * Cache IDs for the in-memory program cache (ice->shaders.cache).
2107ec681f3Smrg */
2117ec681f3Smrgenum crocus_program_cache_id {
2127ec681f3Smrg   CROCUS_CACHE_VS  = MESA_SHADER_VERTEX,
2137ec681f3Smrg   CROCUS_CACHE_TCS = MESA_SHADER_TESS_CTRL,
2147ec681f3Smrg   CROCUS_CACHE_TES = MESA_SHADER_TESS_EVAL,
2157ec681f3Smrg   CROCUS_CACHE_GS  = MESA_SHADER_GEOMETRY,
2167ec681f3Smrg   CROCUS_CACHE_FS  = MESA_SHADER_FRAGMENT,
2177ec681f3Smrg   CROCUS_CACHE_CS  = MESA_SHADER_COMPUTE,
2187ec681f3Smrg   CROCUS_CACHE_BLORP,
2197ec681f3Smrg   CROCUS_CACHE_SF,
2207ec681f3Smrg   CROCUS_CACHE_CLIP,
2217ec681f3Smrg   CROCUS_CACHE_FF_GS,
2227ec681f3Smrg};
2237ec681f3Smrg
2247ec681f3Smrg/** @{
2257ec681f3Smrg *
2267ec681f3Smrg * Defines for PIPE_CONTROL operations, which trigger cache flushes,
2277ec681f3Smrg * synchronization, pipelined memory writes, and so on.
2287ec681f3Smrg *
2297ec681f3Smrg * The bits here are not the actual hardware values.  The actual fields
2307ec681f3Smrg * move between various generations, so we just have flags for each
2317ec681f3Smrg * potential operation, and use genxml to encode the actual packet.
2327ec681f3Smrg */
2337ec681f3Smrgenum pipe_control_flags
2347ec681f3Smrg{
2357ec681f3Smrg   PIPE_CONTROL_FLUSH_LLC                       = (1 << 1),
2367ec681f3Smrg   PIPE_CONTROL_LRI_POST_SYNC_OP                = (1 << 2),
2377ec681f3Smrg   PIPE_CONTROL_STORE_DATA_INDEX                = (1 << 3),
2387ec681f3Smrg   PIPE_CONTROL_CS_STALL                        = (1 << 4),
2397ec681f3Smrg   PIPE_CONTROL_GLOBAL_SNAPSHOT_COUNT_RESET     = (1 << 5),
2407ec681f3Smrg   PIPE_CONTROL_SYNC_GFDT                       = (1 << 6),
2417ec681f3Smrg   PIPE_CONTROL_TLB_INVALIDATE                  = (1 << 7),
2427ec681f3Smrg   PIPE_CONTROL_MEDIA_STATE_CLEAR               = (1 << 8),
2437ec681f3Smrg   PIPE_CONTROL_WRITE_IMMEDIATE                 = (1 << 9),
2447ec681f3Smrg   PIPE_CONTROL_WRITE_DEPTH_COUNT               = (1 << 10),
2457ec681f3Smrg   PIPE_CONTROL_WRITE_TIMESTAMP                 = (1 << 11),
2467ec681f3Smrg   PIPE_CONTROL_DEPTH_STALL                     = (1 << 12),
2477ec681f3Smrg   PIPE_CONTROL_RENDER_TARGET_FLUSH             = (1 << 13),
2487ec681f3Smrg   PIPE_CONTROL_INSTRUCTION_INVALIDATE          = (1 << 14),
2497ec681f3Smrg   PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE        = (1 << 15),
2507ec681f3Smrg   PIPE_CONTROL_INDIRECT_STATE_POINTERS_DISABLE = (1 << 16),
2517ec681f3Smrg   PIPE_CONTROL_NOTIFY_ENABLE                   = (1 << 17),
2527ec681f3Smrg   PIPE_CONTROL_FLUSH_ENABLE                    = (1 << 18),
2537ec681f3Smrg   PIPE_CONTROL_DATA_CACHE_FLUSH                = (1 << 19),
2547ec681f3Smrg   PIPE_CONTROL_VF_CACHE_INVALIDATE             = (1 << 20),
2557ec681f3Smrg   PIPE_CONTROL_CONST_CACHE_INVALIDATE          = (1 << 21),
2567ec681f3Smrg   PIPE_CONTROL_STATE_CACHE_INVALIDATE          = (1 << 22),
2577ec681f3Smrg   PIPE_CONTROL_STALL_AT_SCOREBOARD             = (1 << 23),
2587ec681f3Smrg   PIPE_CONTROL_DEPTH_CACHE_FLUSH               = (1 << 24),
2597ec681f3Smrg   PIPE_CONTROL_TILE_CACHE_FLUSH                = (1 << 25),
2607ec681f3Smrg};
2617ec681f3Smrg
2627ec681f3Smrg#define PIPE_CONTROL_CACHE_FLUSH_BITS           \
2637ec681f3Smrg   (PIPE_CONTROL_DEPTH_CACHE_FLUSH |            \
2647ec681f3Smrg    PIPE_CONTROL_DATA_CACHE_FLUSH |             \
2657ec681f3Smrg    PIPE_CONTROL_RENDER_TARGET_FLUSH)
2667ec681f3Smrg
2677ec681f3Smrg#define PIPE_CONTROL_CACHE_INVALIDATE_BITS      \
2687ec681f3Smrg   (PIPE_CONTROL_STATE_CACHE_INVALIDATE |       \
2697ec681f3Smrg    PIPE_CONTROL_CONST_CACHE_INVALIDATE |       \
2707ec681f3Smrg    PIPE_CONTROL_VF_CACHE_INVALIDATE |          \
2717ec681f3Smrg    PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |     \
2727ec681f3Smrg    PIPE_CONTROL_INSTRUCTION_INVALIDATE)
2737ec681f3Smrg
2747ec681f3Smrgenum crocus_predicate_state {
2757ec681f3Smrg   /* The first two states are used if we can determine whether to draw
2767ec681f3Smrg    * without having to look at the values in the query object buffer. This
2777ec681f3Smrg    * will happen if there is no conditional render in progress, if the query
2787ec681f3Smrg    * object is already completed or if something else has already added
2797ec681f3Smrg    * samples to the preliminary result.
2807ec681f3Smrg    */
2817ec681f3Smrg   CROCUS_PREDICATE_STATE_RENDER,
2827ec681f3Smrg   CROCUS_PREDICATE_STATE_DONT_RENDER,
2837ec681f3Smrg
2847ec681f3Smrg   /* In this case whether to draw or not depends on the result of an
2857ec681f3Smrg    * MI_PREDICATE command so the predicate enable bit needs to be checked.
2867ec681f3Smrg    */
2877ec681f3Smrg   CROCUS_PREDICATE_STATE_USE_BIT,
2887ec681f3Smrg   /* In this case, either MI_PREDICATE doesn't exist or we lack the
2897ec681f3Smrg    * necessary kernel features to use it.  Stall for the query result.
2907ec681f3Smrg    */
2917ec681f3Smrg   CROCUS_PREDICATE_STATE_STALL_FOR_QUERY,
2927ec681f3Smrg};
2937ec681f3Smrg
2947ec681f3Smrg/** @} */
2957ec681f3Smrg
2967ec681f3Smrg/**
2977ec681f3Smrg * An uncompiled, API-facing shader.  This is the Gallium CSO for shaders.
2987ec681f3Smrg * It primarily contains the NIR for the shader.
2997ec681f3Smrg *
3007ec681f3Smrg * Each API-facing shader can be compiled into multiple shader variants,
3017ec681f3Smrg * based on non-orthogonal state dependencies, recorded in the shader key.
3027ec681f3Smrg *
3037ec681f3Smrg * See crocus_compiled_shader, which represents a compiled shader variant.
3047ec681f3Smrg */
3057ec681f3Smrgstruct crocus_uncompiled_shader {
3067ec681f3Smrg   struct nir_shader *nir;
3077ec681f3Smrg
3087ec681f3Smrg   struct pipe_stream_output_info stream_output;
3097ec681f3Smrg
3107ec681f3Smrg   /* A SHA1 of the serialized NIR for the disk cache. */
3117ec681f3Smrg   unsigned char nir_sha1[20];
3127ec681f3Smrg
3137ec681f3Smrg   unsigned program_id;
3147ec681f3Smrg
3157ec681f3Smrg   /** Bitfield of (1 << CROCUS_NOS_*) flags. */
3167ec681f3Smrg   unsigned nos;
3177ec681f3Smrg
3187ec681f3Smrg   /** Have any shader variants been compiled yet? */
3197ec681f3Smrg   bool compiled_once;
3207ec681f3Smrg
3217ec681f3Smrg   bool needs_edge_flag;
3227ec681f3Smrg
3237ec681f3Smrg   /** Constant data scraped from the shader by nir_opt_large_constants */
3247ec681f3Smrg   struct pipe_resource *const_data;
3257ec681f3Smrg
3267ec681f3Smrg   /** Surface state for const_data */
3277ec681f3Smrg   struct crocus_state_ref const_data_state;
3287ec681f3Smrg};
3297ec681f3Smrg
3307ec681f3Smrgenum crocus_surface_group {
3317ec681f3Smrg   CROCUS_SURFACE_GROUP_RENDER_TARGET,
3327ec681f3Smrg   CROCUS_SURFACE_GROUP_RENDER_TARGET_READ,
3337ec681f3Smrg   CROCUS_SURFACE_GROUP_SOL,
3347ec681f3Smrg   CROCUS_SURFACE_GROUP_CS_WORK_GROUPS,
3357ec681f3Smrg   CROCUS_SURFACE_GROUP_TEXTURE,
3367ec681f3Smrg   CROCUS_SURFACE_GROUP_TEXTURE_GATHER,
3377ec681f3Smrg   CROCUS_SURFACE_GROUP_IMAGE,
3387ec681f3Smrg   CROCUS_SURFACE_GROUP_UBO,
3397ec681f3Smrg   CROCUS_SURFACE_GROUP_SSBO,
3407ec681f3Smrg
3417ec681f3Smrg   CROCUS_SURFACE_GROUP_COUNT,
3427ec681f3Smrg};
3437ec681f3Smrg
3447ec681f3Smrgenum {
3457ec681f3Smrg   /* Invalid value for a binding table index. */
3467ec681f3Smrg   CROCUS_SURFACE_NOT_USED = 0xa0a0a0a0,
3477ec681f3Smrg};
3487ec681f3Smrg
3497ec681f3Smrgstruct crocus_binding_table {
3507ec681f3Smrg   uint32_t size_bytes;
3517ec681f3Smrg
3527ec681f3Smrg   /** Number of surfaces in each group, before compacting. */
3537ec681f3Smrg   uint32_t sizes[CROCUS_SURFACE_GROUP_COUNT];
3547ec681f3Smrg
3557ec681f3Smrg   /** Initial offset of each group. */
3567ec681f3Smrg   uint32_t offsets[CROCUS_SURFACE_GROUP_COUNT];
3577ec681f3Smrg
3587ec681f3Smrg   /** Mask of surfaces used in each group. */
3597ec681f3Smrg   uint64_t used_mask[CROCUS_SURFACE_GROUP_COUNT];
3607ec681f3Smrg};
3617ec681f3Smrg
3627ec681f3Smrg/**
3637ec681f3Smrg * A compiled shader variant, containing a pointer to the GPU assembly,
3647ec681f3Smrg * as well as program data and other packets needed by state upload.
3657ec681f3Smrg *
3667ec681f3Smrg * There can be several crocus_compiled_shader variants per API-level shader
3677ec681f3Smrg * (crocus_uncompiled_shader), due to state-based recompiles (brw_*_prog_key).
3687ec681f3Smrg */
3697ec681f3Smrgstruct crocus_compiled_shader {
3707ec681f3Smrg   /** Reference to the uploaded assembly. */
3717ec681f3Smrg   uint32_t offset;
3727ec681f3Smrg
3737ec681f3Smrg   /* asm size in map */
3747ec681f3Smrg   uint32_t map_size;
3757ec681f3Smrg
3767ec681f3Smrg   /** The program data (owned by the program cache hash table) */
3777ec681f3Smrg   struct brw_stage_prog_data *prog_data;
3787ec681f3Smrg   uint32_t prog_data_size;
3797ec681f3Smrg
3807ec681f3Smrg   /** A list of system values to be uploaded as uniforms. */
3817ec681f3Smrg   enum brw_param_builtin *system_values;
3827ec681f3Smrg   unsigned num_system_values;
3837ec681f3Smrg
3847ec681f3Smrg   /** Number of constbufs expected by the shader. */
3857ec681f3Smrg   unsigned num_cbufs;
3867ec681f3Smrg
3877ec681f3Smrg   /**
3887ec681f3Smrg    * Derived 3DSTATE_STREAMOUT and 3DSTATE_SO_DECL_LIST packets
3897ec681f3Smrg    * (the VUE-based information for transform feedback outputs).
3907ec681f3Smrg    */
3917ec681f3Smrg   uint32_t *streamout;
3927ec681f3Smrg
3937ec681f3Smrg   struct crocus_binding_table bt;
3947ec681f3Smrg
3957ec681f3Smrg   uint32_t bind_bo_offset;
3967ec681f3Smrg   uint32_t surf_offset[128];//TODO
3977ec681f3Smrg};
3987ec681f3Smrg
3997ec681f3Smrg/**
4007ec681f3Smrg * API context state that is replicated per shader stage.
4017ec681f3Smrg */
4027ec681f3Smrgstruct crocus_shader_state {
4037ec681f3Smrg   /** Uniform Buffers */
4047ec681f3Smrg   struct pipe_constant_buffer constbufs[PIPE_MAX_CONSTANT_BUFFERS];
4057ec681f3Smrg
4067ec681f3Smrg   bool sysvals_need_upload;
4077ec681f3Smrg
4087ec681f3Smrg   /** Shader Storage Buffers */
4097ec681f3Smrg   struct pipe_shader_buffer ssbo[PIPE_MAX_SHADER_BUFFERS];
4107ec681f3Smrg
4117ec681f3Smrg   /** Shader Storage Images (image load store) */
4127ec681f3Smrg   struct crocus_image_view image[PIPE_MAX_SHADER_IMAGES];
4137ec681f3Smrg
4147ec681f3Smrg   struct crocus_sampler_state *samplers[CROCUS_MAX_TEXTURE_SAMPLERS];
4157ec681f3Smrg   struct crocus_sampler_view *textures[CROCUS_MAX_TEXTURE_SAMPLERS];
4167ec681f3Smrg
4177ec681f3Smrg   /** Bitfield of which constant buffers are bound (non-null). */
4187ec681f3Smrg   uint32_t bound_cbufs;
4197ec681f3Smrg
4207ec681f3Smrg   /** Bitfield of which image views are bound (non-null). */
4217ec681f3Smrg   uint32_t bound_image_views;
4227ec681f3Smrg
4237ec681f3Smrg   /** Bitfield of which sampler views are bound (non-null). */
4247ec681f3Smrg   uint32_t bound_sampler_views;
4257ec681f3Smrg
4267ec681f3Smrg   /** Bitfield of which shader storage buffers are bound (non-null). */
4277ec681f3Smrg   uint32_t bound_ssbos;
4287ec681f3Smrg
4297ec681f3Smrg   /** Bitfield of which shader storage buffers are writable. */
4307ec681f3Smrg   uint32_t writable_ssbos;
4317ec681f3Smrg
4327ec681f3Smrg   uint32_t sampler_offset;
4337ec681f3Smrg};
4347ec681f3Smrg
4357ec681f3Smrg/**
4367ec681f3Smrg * The API context (derived from pipe_context).
4377ec681f3Smrg *
4387ec681f3Smrg * Most driver state is tracked here.
4397ec681f3Smrg */
4407ec681f3Smrgstruct crocus_context {
4417ec681f3Smrg   struct pipe_context ctx;
4427ec681f3Smrg   struct threaded_context *thrctx;
4437ec681f3Smrg
4447ec681f3Smrg   /** A debug callback for KHR_debug output. */
4457ec681f3Smrg   struct pipe_debug_callback dbg;
4467ec681f3Smrg
4477ec681f3Smrg   /** A device reset status callback for notifying that the GPU is hosed. */
4487ec681f3Smrg   struct pipe_device_reset_callback reset;
4497ec681f3Smrg
4507ec681f3Smrg   /** Slab allocator for crocus_transfer_map objects. */
4517ec681f3Smrg   struct slab_child_pool transfer_pool;
4527ec681f3Smrg
4537ec681f3Smrg   /** Slab allocator for threaded_context's crocus_transfer_map objects */
4547ec681f3Smrg   struct slab_child_pool transfer_pool_unsync;
4557ec681f3Smrg
4567ec681f3Smrg   struct blorp_context blorp;
4577ec681f3Smrg
4587ec681f3Smrg   int batch_count;
4597ec681f3Smrg   struct crocus_batch batches[CROCUS_BATCH_COUNT];
4607ec681f3Smrg
4617ec681f3Smrg   struct u_upload_mgr *query_buffer_uploader;
4627ec681f3Smrg
4637ec681f3Smrg   struct blitter_context *blitter;
4647ec681f3Smrg
4657ec681f3Smrg   struct {
4667ec681f3Smrg      struct {
4677ec681f3Smrg         /**
4687ec681f3Smrg          * Either the value of BaseVertex for indexed draw calls or the value
4697ec681f3Smrg          * of the argument <first> for non-indexed draw calls.
4707ec681f3Smrg          */
4717ec681f3Smrg         int firstvertex;
4727ec681f3Smrg         int baseinstance;
4737ec681f3Smrg      } params;
4747ec681f3Smrg
4757ec681f3Smrg      /**
4767ec681f3Smrg       * Are the above values the ones stored in the draw_params buffer?
4777ec681f3Smrg       * If so, we can compare them against new values to see if anything
4787ec681f3Smrg       * changed.  If not, we need to assume they changed.
4797ec681f3Smrg       */
4807ec681f3Smrg      bool params_valid;
4817ec681f3Smrg
4827ec681f3Smrg      /**
4837ec681f3Smrg       * Resource and offset that stores draw_parameters from the indirect
4847ec681f3Smrg       * buffer or to the buffer that stures the previous values for non
4857ec681f3Smrg       * indirect draws.
4867ec681f3Smrg       */
4877ec681f3Smrg      struct crocus_state_ref draw_params;
4887ec681f3Smrg
4897ec681f3Smrg      struct {
4907ec681f3Smrg         /**
4917ec681f3Smrg          * The value of DrawID. This always comes in from it's own vertex
4927ec681f3Smrg          * buffer since it's not part of the indirect draw parameters.
4937ec681f3Smrg          */
4947ec681f3Smrg         int drawid;
4957ec681f3Smrg
4967ec681f3Smrg         /**
4977ec681f3Smrg          * Stores if an indexed or non-indexed draw (~0/0). Useful to
4987ec681f3Smrg          * calculate BaseVertex as an AND of firstvertex and is_indexed_draw.
4997ec681f3Smrg          */
5007ec681f3Smrg         int is_indexed_draw;
5017ec681f3Smrg      } derived_params;
5027ec681f3Smrg
5037ec681f3Smrg      /**
5047ec681f3Smrg       * Resource and offset used for GL_ARB_shader_draw_parameters which
5057ec681f3Smrg       * contains parameters that are not present in the indirect buffer as
5067ec681f3Smrg       * drawid and is_indexed_draw. They will go in their own vertex element.
5077ec681f3Smrg       */
5087ec681f3Smrg      struct crocus_state_ref derived_draw_params;
5097ec681f3Smrg   } draw;
5107ec681f3Smrg
5117ec681f3Smrg   struct {
5127ec681f3Smrg      struct crocus_uncompiled_shader *uncompiled[MESA_SHADER_STAGES];
5137ec681f3Smrg      struct crocus_compiled_shader *prog[MESA_SHADER_STAGES];
5147ec681f3Smrg      struct brw_vue_map *last_vue_map;
5157ec681f3Smrg
5167ec681f3Smrg      struct crocus_bo *cache_bo;
5177ec681f3Smrg      uint32_t cache_next_offset;
5187ec681f3Smrg      void *cache_bo_map;
5197ec681f3Smrg      struct hash_table *cache;
5207ec681f3Smrg
5217ec681f3Smrg      unsigned urb_size;
5227ec681f3Smrg
5237ec681f3Smrg      /* gen 4/5 clip/sf progs */
5247ec681f3Smrg      struct crocus_compiled_shader *clip_prog;
5257ec681f3Smrg      struct crocus_compiled_shader *sf_prog;
5267ec681f3Smrg      /* gen4/5 prims, gen6 streamout */
5277ec681f3Smrg      struct crocus_compiled_shader *ff_gs_prog;
5287ec681f3Smrg      uint32_t clip_offset;
5297ec681f3Smrg      uint32_t sf_offset;
5307ec681f3Smrg      uint32_t wm_offset;
5317ec681f3Smrg      uint32_t vs_offset;
5327ec681f3Smrg      uint32_t gs_offset;
5337ec681f3Smrg      uint32_t cc_offset;
5347ec681f3Smrg
5357ec681f3Smrg      /** Is a GS or TES outputting points or lines? */
5367ec681f3Smrg      bool output_topology_is_points_or_lines;
5377ec681f3Smrg
5387ec681f3Smrg      /* Track last VS URB entry size */
5397ec681f3Smrg      unsigned last_vs_entry_size;
5407ec681f3Smrg
5417ec681f3Smrg      /**
5427ec681f3Smrg       * Scratch buffers for various sizes and stages.
5437ec681f3Smrg       *
5447ec681f3Smrg       * Indexed by the "Per-Thread Scratch Space" field's 4-bit encoding,
5457ec681f3Smrg       * and shader stage.
5467ec681f3Smrg       */
5477ec681f3Smrg      struct crocus_bo *scratch_bos[1 << 4][MESA_SHADER_STAGES];
5487ec681f3Smrg   } shaders;
5497ec681f3Smrg
5507ec681f3Smrg   struct {
5517ec681f3Smrg      struct crocus_query *query;
5527ec681f3Smrg      bool condition;
5537ec681f3Smrg      enum pipe_render_cond_flag mode;
5547ec681f3Smrg   } condition;
5557ec681f3Smrg
5567ec681f3Smrg   struct intel_perf_context *perf_ctx;
5577ec681f3Smrg
5587ec681f3Smrg   struct {
5597ec681f3Smrg      uint64_t dirty;
5607ec681f3Smrg      uint64_t stage_dirty;
5617ec681f3Smrg      uint64_t stage_dirty_for_nos[CROCUS_NOS_COUNT];
5627ec681f3Smrg
5637ec681f3Smrg      unsigned num_viewports;
5647ec681f3Smrg      unsigned sample_mask;
5657ec681f3Smrg      struct crocus_blend_state *cso_blend;
5667ec681f3Smrg      struct crocus_rasterizer_state *cso_rast;
5677ec681f3Smrg      struct crocus_depth_stencil_alpha_state *cso_zsa;
5687ec681f3Smrg      struct crocus_vertex_element_state *cso_vertex_elements;
5697ec681f3Smrg      struct pipe_blend_color blend_color;
5707ec681f3Smrg      struct pipe_poly_stipple poly_stipple;
5717ec681f3Smrg      struct pipe_viewport_state viewports[CROCUS_MAX_VIEWPORTS];
5727ec681f3Smrg      struct pipe_scissor_state scissors[CROCUS_MAX_VIEWPORTS];
5737ec681f3Smrg      struct pipe_stencil_ref stencil_ref;
5747ec681f3Smrg      struct pipe_framebuffer_state framebuffer;
5757ec681f3Smrg      struct pipe_clip_state clip_planes;
5767ec681f3Smrg
5777ec681f3Smrg      float default_outer_level[4];
5787ec681f3Smrg      float default_inner_level[2];
5797ec681f3Smrg
5807ec681f3Smrg      /** Bitfield of which vertex buffers are bound (non-null). */
5817ec681f3Smrg      uint32_t bound_vertex_buffers;
5827ec681f3Smrg      struct pipe_vertex_buffer vertex_buffers[16];
5837ec681f3Smrg      uint32_t vb_end[16];
5847ec681f3Smrg
5857ec681f3Smrg      bool primitive_restart;
5867ec681f3Smrg      unsigned cut_index;
5877ec681f3Smrg      enum pipe_prim_type reduced_prim_mode:8;
5887ec681f3Smrg      enum pipe_prim_type prim_mode:8;
5897ec681f3Smrg      bool prim_is_points_or_lines;
5907ec681f3Smrg      uint8_t vertices_per_patch;
5917ec681f3Smrg      uint8_t patch_vertices;
5927ec681f3Smrg
5937ec681f3Smrg      bool window_space_position;
5947ec681f3Smrg
5957ec681f3Smrg      /** The last compute group size */
5967ec681f3Smrg      uint32_t last_block[3];
5977ec681f3Smrg
5987ec681f3Smrg      /** The last compute grid size */
5997ec681f3Smrg      uint32_t last_grid[3];
6007ec681f3Smrg      /** Reference to the BO containing the compute grid size */
6017ec681f3Smrg      struct crocus_state_ref grid_size;
6027ec681f3Smrg
6037ec681f3Smrg      /**
6047ec681f3Smrg       * Array of aux usages for drawing, altered to account for any
6057ec681f3Smrg       * self-dependencies from resources bound for sampling and rendering.
6067ec681f3Smrg       */
6077ec681f3Smrg      enum isl_aux_usage draw_aux_usage[BRW_MAX_DRAW_BUFFERS];
6087ec681f3Smrg
6097ec681f3Smrg      /** Aux usage of the fb's depth buffer (which may or may not exist). */
6107ec681f3Smrg      enum isl_aux_usage hiz_usage;
6117ec681f3Smrg
6127ec681f3Smrg      /** Bitfield of whether color blending is enabled for RT[i] */
6137ec681f3Smrg      uint8_t blend_enables;
6147ec681f3Smrg
6157ec681f3Smrg      /** Are depth writes enabled?  (Depth buffer may or may not exist.) */
6167ec681f3Smrg      bool depth_writes_enabled;
6177ec681f3Smrg
6187ec681f3Smrg      /** Are stencil writes enabled?  (Stencil buffer may or may not exist.) */
6197ec681f3Smrg      bool stencil_writes_enabled;
6207ec681f3Smrg
6217ec681f3Smrg      /** GenX-specific current state */
6227ec681f3Smrg      struct crocus_genx_state *genx;
6237ec681f3Smrg
6247ec681f3Smrg      struct crocus_shader_state shaders[MESA_SHADER_STAGES];
6257ec681f3Smrg
6267ec681f3Smrg      /* track if geom shader is active for IVB GT2 workaround */
6277ec681f3Smrg      bool gs_enabled;
6287ec681f3Smrg      /** Do vertex shader uses shader draw parameters ? */
6297ec681f3Smrg      bool vs_uses_draw_params;
6307ec681f3Smrg      bool vs_uses_derived_draw_params;
6317ec681f3Smrg      bool vs_needs_sgvs_element;
6327ec681f3Smrg      bool vs_uses_vertexid;
6337ec681f3Smrg      bool vs_uses_instanceid;
6347ec681f3Smrg
6357ec681f3Smrg      /** Do vertex shader uses edge flag ? */
6367ec681f3Smrg      bool vs_needs_edge_flag;
6377ec681f3Smrg
6387ec681f3Smrg      struct pipe_stream_output_target *so_target[PIPE_MAX_SO_BUFFERS];
6397ec681f3Smrg      bool streamout_active;
6407ec681f3Smrg      int so_targets;
6417ec681f3Smrg
6427ec681f3Smrg      bool statistics_counters_enabled;
6437ec681f3Smrg
6447ec681f3Smrg      /** Current conditional rendering mode */
6457ec681f3Smrg      enum crocus_predicate_state predicate;
6467ec681f3Smrg      bool predicate_supported;
6477ec681f3Smrg
6487ec681f3Smrg      /**
6497ec681f3Smrg       * Query BO with a MI_PREDICATE_RESULT snapshot calculated on the
6507ec681f3Smrg       * render context that needs to be uploaded to the compute context.
6517ec681f3Smrg       */
6527ec681f3Smrg      struct crocus_bo *compute_predicate;
6537ec681f3Smrg
6547ec681f3Smrg      /** Is a PIPE_QUERY_PRIMITIVES_GENERATED query active? */
6557ec681f3Smrg      bool prims_generated_query_active;
6567ec681f3Smrg
6577ec681f3Smrg      /** 3DSTATE_STREAMOUT and 3DSTATE_SO_DECL_LIST packets */
6587ec681f3Smrg      uint32_t *streamout;
6597ec681f3Smrg
6607ec681f3Smrg      /**
6617ec681f3Smrg       * Resources containing streamed state which our render context
6627ec681f3Smrg       * currently points to.  Used to re-add these to the validation
6637ec681f3Smrg       * list when we start a new batch and haven't resubmitted commands.
6647ec681f3Smrg       */
6657ec681f3Smrg      struct {
6667ec681f3Smrg         struct pipe_resource *res;
6677ec681f3Smrg         uint32_t offset;
6687ec681f3Smrg         uint32_t size;
6697ec681f3Smrg         uint32_t index_size;
6707ec681f3Smrg         bool prim_restart;
6717ec681f3Smrg      } index_buffer;
6727ec681f3Smrg
6737ec681f3Smrg      uint32_t sf_vp_address;
6747ec681f3Smrg      uint32_t clip_vp_address;
6757ec681f3Smrg      uint32_t cc_vp_address;
6767ec681f3Smrg
6777ec681f3Smrg      uint32_t stats_wm;
6787ec681f3Smrg      float global_depth_offset_clamp;
6797ec681f3Smrg
6807ec681f3Smrg      uint32_t last_xfb_verts_per_prim;
6817ec681f3Smrg      uint64_t svbi;
6827ec681f3Smrg   } state;
6837ec681f3Smrg
6847ec681f3Smrg   /* BRW_NEW_URB_ALLOCATIONS:
6857ec681f3Smrg    */
6867ec681f3Smrg   struct {
6877ec681f3Smrg      uint32_t vsize;                /* vertex size plus header in urb registers */
6887ec681f3Smrg      uint32_t gsize;                /* GS output size in urb registers */
6897ec681f3Smrg      uint32_t hsize;             /* Tessellation control output size in urb registers */
6907ec681f3Smrg      uint32_t dsize;             /* Tessellation evaluation output size in urb registers */
6917ec681f3Smrg      uint32_t csize;                /* constant buffer size in urb registers */
6927ec681f3Smrg      uint32_t sfsize;                /* setup data size in urb registers */
6937ec681f3Smrg
6947ec681f3Smrg      bool constrained;
6957ec681f3Smrg
6967ec681f3Smrg      uint32_t nr_vs_entries;
6977ec681f3Smrg      uint32_t nr_hs_entries;
6987ec681f3Smrg      uint32_t nr_ds_entries;
6997ec681f3Smrg      uint32_t nr_gs_entries;
7007ec681f3Smrg      uint32_t nr_clip_entries;
7017ec681f3Smrg      uint32_t nr_sf_entries;
7027ec681f3Smrg      uint32_t nr_cs_entries;
7037ec681f3Smrg
7047ec681f3Smrg      uint32_t vs_start;
7057ec681f3Smrg      uint32_t hs_start;
7067ec681f3Smrg      uint32_t ds_start;
7077ec681f3Smrg      uint32_t gs_start;
7087ec681f3Smrg      uint32_t clip_start;
7097ec681f3Smrg      uint32_t sf_start;
7107ec681f3Smrg      uint32_t cs_start;
7117ec681f3Smrg      /**
7127ec681f3Smrg       * URB size in the current configuration.  The units this is expressed
7137ec681f3Smrg       * in are somewhat inconsistent, see intel_device_info::urb::size.
7147ec681f3Smrg       *
7157ec681f3Smrg       * FINISHME: Represent the URB size consistently in KB on all platforms.
7167ec681f3Smrg       */
7177ec681f3Smrg      uint32_t size;
7187ec681f3Smrg
7197ec681f3Smrg      /* True if the most recently sent _3DSTATE_URB message allocated
7207ec681f3Smrg       * URB space for the GS.
7217ec681f3Smrg       */
7227ec681f3Smrg      bool gs_present;
7237ec681f3Smrg
7247ec681f3Smrg      /* True if the most recently sent _3DSTATE_URB message allocated
7257ec681f3Smrg       * URB space for the HS and DS.
7267ec681f3Smrg       */
7277ec681f3Smrg      bool tess_present;
7287ec681f3Smrg   } urb;
7297ec681f3Smrg
7307ec681f3Smrg   /* GEN4/5 curbe */
7317ec681f3Smrg   struct {
7327ec681f3Smrg      unsigned wm_start;
7337ec681f3Smrg      unsigned wm_size;
7347ec681f3Smrg      unsigned clip_start;
7357ec681f3Smrg      unsigned clip_size;
7367ec681f3Smrg      unsigned vs_start;
7377ec681f3Smrg      unsigned vs_size;
7387ec681f3Smrg      unsigned total_size;
7397ec681f3Smrg
7407ec681f3Smrg      struct crocus_resource *curbe_res;
7417ec681f3Smrg      unsigned curbe_offset;
7427ec681f3Smrg   } curbe;
7437ec681f3Smrg
7447ec681f3Smrg   /**
7457ec681f3Smrg    * A buffer containing a marker + description of the driver. This buffer is
7467ec681f3Smrg    * added to all execbufs syscalls so that we can identify the driver that
7477ec681f3Smrg    * generated a hang by looking at the content of the buffer in the error
7487ec681f3Smrg    * state. It is also used for hardware workarounds that require scratch
7497ec681f3Smrg    * writes or reads from some unimportant memory. To avoid overriding the
7507ec681f3Smrg    * debug data, use the workaround_address field for workarounds.
7517ec681f3Smrg    */
7527ec681f3Smrg   struct crocus_bo *workaround_bo;
7537ec681f3Smrg   unsigned workaround_offset;
7547ec681f3Smrg};
7557ec681f3Smrg
7567ec681f3Smrg#define perf_debug(dbg, ...) do {                      \
7577ec681f3Smrg   if (INTEL_DEBUG(DEBUG_PERF))                        \
7587ec681f3Smrg      dbg_printf(__VA_ARGS__);                         \
7597ec681f3Smrg   if (unlikely(dbg))                                  \
7607ec681f3Smrg      pipe_debug_message(dbg, PERF_INFO, __VA_ARGS__); \
7617ec681f3Smrg} while(0)
7627ec681f3Smrg
7637ec681f3Smrg
7647ec681f3Smrgstruct pipe_context *
7657ec681f3Smrgcrocus_create_context(struct pipe_screen *screen, void *priv, unsigned flags);
7667ec681f3Smrg
7677ec681f3Smrgvoid crocus_lost_context_state(struct crocus_batch *batch);
7687ec681f3Smrg
7697ec681f3Smrgvoid crocus_init_blit_functions(struct pipe_context *ctx);
7707ec681f3Smrgvoid crocus_init_clear_functions(struct pipe_context *ctx);
7717ec681f3Smrgvoid crocus_init_program_functions(struct pipe_context *ctx);
7727ec681f3Smrgvoid crocus_init_resource_functions(struct pipe_context *ctx);
7737ec681f3Smrgbool crocus_update_compiled_shaders(struct crocus_context *ice);
7747ec681f3Smrgvoid crocus_update_compiled_compute_shader(struct crocus_context *ice);
7757ec681f3Smrgvoid crocus_fill_cs_push_const_buffer(struct brw_cs_prog_data *cs_prog_data,
7767ec681f3Smrg                                      unsigned threads, uint32_t *dst);
7777ec681f3Smrg
7787ec681f3Smrg
7797ec681f3Smrg/* crocus_blit.c */
7807ec681f3Smrgenum crocus_blitter_op
7817ec681f3Smrg{
7827ec681f3Smrg   CROCUS_SAVE_TEXTURES      = 1,
7837ec681f3Smrg   CROCUS_SAVE_FRAMEBUFFER   = 2,
7847ec681f3Smrg   CROCUS_SAVE_FRAGMENT_STATE = 4,
7857ec681f3Smrg   CROCUS_DISABLE_RENDER_COND = 8,
7867ec681f3Smrg};
7877ec681f3Smrgvoid crocus_blitter_begin(struct crocus_context *ice, enum crocus_blitter_op op, bool render_cond);
7887ec681f3Smrg
7897ec681f3Smrgvoid crocus_blorp_surf_for_resource(struct crocus_vtable *vtbl,
7907ec681f3Smrg                                    struct isl_device *isl_dev,
7917ec681f3Smrg                                    struct blorp_surf *surf,
7927ec681f3Smrg                                    struct pipe_resource *p_res,
7937ec681f3Smrg                                    enum isl_aux_usage aux_usage,
7947ec681f3Smrg                                    unsigned level,
7957ec681f3Smrg                                    bool is_render_target);
7967ec681f3Smrgvoid crocus_copy_region(struct blorp_context *blorp,
7977ec681f3Smrg                        struct crocus_batch *batch,
7987ec681f3Smrg                        struct pipe_resource *dst,
7997ec681f3Smrg                        unsigned dst_level,
8007ec681f3Smrg                        unsigned dstx, unsigned dsty, unsigned dstz,
8017ec681f3Smrg                        struct pipe_resource *src,
8027ec681f3Smrg                        unsigned src_level,
8037ec681f3Smrg                        const struct pipe_box *src_box);
8047ec681f3Smrg
8057ec681f3Smrg/* crocus_draw.c */
8067ec681f3Smrgvoid crocus_draw_vbo(struct pipe_context *ctx,
8077ec681f3Smrg                     const struct pipe_draw_info *info,
8087ec681f3Smrg                     unsigned drawid_offset,
8097ec681f3Smrg                     const struct pipe_draw_indirect_info *indirect,
8107ec681f3Smrg                     const struct pipe_draw_start_count_bias *draws,
8117ec681f3Smrg                     unsigned num_draws);
8127ec681f3Smrgvoid crocus_launch_grid(struct pipe_context *, const struct pipe_grid_info *);
8137ec681f3Smrg
8147ec681f3Smrg/* crocus_pipe_control.c */
8157ec681f3Smrg
8167ec681f3Smrgvoid crocus_emit_pipe_control_flush(struct crocus_batch *batch,
8177ec681f3Smrg                                    const char *reason, uint32_t flags);
8187ec681f3Smrgvoid crocus_emit_pipe_control_write(struct crocus_batch *batch,
8197ec681f3Smrg                                    const char *reason, uint32_t flags,
8207ec681f3Smrg                                    struct crocus_bo *bo, uint32_t offset,
8217ec681f3Smrg                                    uint64_t imm);
8227ec681f3Smrgvoid crocus_emit_mi_flush(struct crocus_batch *batch);
8237ec681f3Smrgvoid crocus_emit_depth_stall_flushes(struct crocus_batch *batch);
8247ec681f3Smrgvoid crocus_emit_post_sync_nonzero_flush(struct crocus_batch *batch);
8257ec681f3Smrgvoid crocus_emit_end_of_pipe_sync(struct crocus_batch *batch,
8267ec681f3Smrg                                  const char *reason, uint32_t flags);
8277ec681f3Smrgvoid crocus_flush_all_caches(struct crocus_batch *batch);
8287ec681f3Smrg
8297ec681f3Smrg#define crocus_handle_always_flush_cache(batch)                 \
8307ec681f3Smrg   if (unlikely(batch->screen->driconf.always_flush_cache))     \
8317ec681f3Smrg      crocus_flush_all_caches(batch);
8327ec681f3Smrg
8337ec681f3Smrgvoid crocus_init_flush_functions(struct pipe_context *ctx);
8347ec681f3Smrg
8357ec681f3Smrg/* crocus_program.c */
8367ec681f3Smrgconst struct shader_info *crocus_get_shader_info(const struct crocus_context *ice,
8377ec681f3Smrg                                                 gl_shader_stage stage);
8387ec681f3Smrgstruct crocus_bo *crocus_get_scratch_space(struct crocus_context *ice,
8397ec681f3Smrg                                           unsigned per_thread_scratch,
8407ec681f3Smrg                                           gl_shader_stage stage);
8417ec681f3Smrg/**
8427ec681f3Smrg * Map a <group, index> pair to a binding table index.
8437ec681f3Smrg *
8447ec681f3Smrg * For example: <UBO, 5> => binding table index 12
8457ec681f3Smrg */
8467ec681f3Smrgstatic inline uint32_t crocus_group_index_to_bti(const struct crocus_binding_table *bt,
8477ec681f3Smrg                                                 enum crocus_surface_group group,
8487ec681f3Smrg                                                 uint32_t index)
8497ec681f3Smrg{
8507ec681f3Smrg   assert(index < bt->sizes[group]);
8517ec681f3Smrg   uint64_t mask = bt->used_mask[group];
8527ec681f3Smrg   uint64_t bit = 1ull << index;
8537ec681f3Smrg   if (bit & mask) {
8547ec681f3Smrg      return bt->offsets[group] + util_bitcount64((bit - 1) & mask);
8557ec681f3Smrg   } else {
8567ec681f3Smrg      return CROCUS_SURFACE_NOT_USED;
8577ec681f3Smrg   }
8587ec681f3Smrg}
8597ec681f3Smrg
8607ec681f3Smrg/**
8617ec681f3Smrg * Map a binding table index back to a <group, index> pair.
8627ec681f3Smrg *
8637ec681f3Smrg * For example: binding table index 12 => <UBO, 5>
8647ec681f3Smrg */
8657ec681f3Smrgstatic inline uint32_t
8667ec681f3Smrgcrocus_bti_to_group_index(const struct crocus_binding_table *bt,
8677ec681f3Smrg                          enum crocus_surface_group group, uint32_t bti)
8687ec681f3Smrg{
8697ec681f3Smrg   uint64_t used_mask = bt->used_mask[group];
8707ec681f3Smrg   assert(bti >= bt->offsets[group]);
8717ec681f3Smrg
8727ec681f3Smrg   uint32_t c = bti - bt->offsets[group];
8737ec681f3Smrg   while (used_mask) {
8747ec681f3Smrg      int i = u_bit_scan64(&used_mask);
8757ec681f3Smrg      if (c == 0)
8767ec681f3Smrg         return i;
8777ec681f3Smrg      c--;
8787ec681f3Smrg   }
8797ec681f3Smrg
8807ec681f3Smrg   return CROCUS_SURFACE_NOT_USED;
8817ec681f3Smrg}
8827ec681f3Smrg
8837ec681f3Smrg
8847ec681f3Smrg/* crocus_disk_cache.c */
8857ec681f3Smrg
8867ec681f3Smrgvoid crocus_disk_cache_store(struct disk_cache *cache,
8877ec681f3Smrg                             const struct crocus_uncompiled_shader *ish,
8887ec681f3Smrg                             const struct crocus_compiled_shader *shader,
8897ec681f3Smrg                             void *map,
8907ec681f3Smrg                             const void *prog_key,
8917ec681f3Smrg                             uint32_t prog_key_size);
8927ec681f3Smrgstruct crocus_compiled_shader *
8937ec681f3Smrgcrocus_disk_cache_retrieve(struct crocus_context *ice,
8947ec681f3Smrg                           const struct crocus_uncompiled_shader *ish,
8957ec681f3Smrg                           const void *prog_key,
8967ec681f3Smrg                           uint32_t prog_key_size);
8977ec681f3Smrg
8987ec681f3Smrg/* crocus_program_cache.c */
8997ec681f3Smrg
9007ec681f3Smrgvoid crocus_init_program_cache(struct crocus_context *ice);
9017ec681f3Smrgvoid crocus_destroy_program_cache(struct crocus_context *ice);
9027ec681f3Smrgvoid crocus_print_program_cache(struct crocus_context *ice);
9037ec681f3Smrgstruct crocus_compiled_shader *crocus_find_cached_shader(struct crocus_context *ice,
9047ec681f3Smrg                                                         enum crocus_program_cache_id,
9057ec681f3Smrg                                                         uint32_t key_size,
9067ec681f3Smrg                                                         const void *key);
9077ec681f3Smrgstruct crocus_compiled_shader *crocus_upload_shader(struct crocus_context *ice,
9087ec681f3Smrg                                                    enum crocus_program_cache_id,
9097ec681f3Smrg                                                    uint32_t key_size,
9107ec681f3Smrg                                                    const void *key,
9117ec681f3Smrg                                                    const void *assembly,
9127ec681f3Smrg                                                    uint32_t asm_size,
9137ec681f3Smrg                                                    struct brw_stage_prog_data *,
9147ec681f3Smrg                                                    uint32_t prog_data_size,
9157ec681f3Smrg                                                    uint32_t *streamout,
9167ec681f3Smrg                                                    enum brw_param_builtin *sysv,
9177ec681f3Smrg                                                    unsigned num_system_values,
9187ec681f3Smrg                                                    unsigned num_cbufs,
9197ec681f3Smrg                                                    const struct crocus_binding_table *bt);
9207ec681f3Smrgconst void *crocus_find_previous_compile(const struct crocus_context *ice,
9217ec681f3Smrg                                         enum crocus_program_cache_id cache_id,
9227ec681f3Smrg                                         unsigned program_string_id);
9237ec681f3Smrgbool crocus_blorp_lookup_shader(struct blorp_batch *blorp_batch,
9247ec681f3Smrg                                const void *key,
9257ec681f3Smrg                                uint32_t key_size,
9267ec681f3Smrg                                uint32_t *kernel_out,
9277ec681f3Smrg                                void *prog_data_out);
9287ec681f3Smrgbool crocus_blorp_upload_shader(struct blorp_batch *blorp_batch,
9297ec681f3Smrg                                uint32_t stage,
9307ec681f3Smrg                                const void *key, uint32_t key_size,
9317ec681f3Smrg                                const void *kernel, uint32_t kernel_size,
9327ec681f3Smrg                                const struct brw_stage_prog_data *prog_data,
9337ec681f3Smrg                                uint32_t prog_data_size,
9347ec681f3Smrg                                uint32_t *kernel_out,
9357ec681f3Smrg                                void *prog_data_out);
9367ec681f3Smrg
9377ec681f3Smrg/* crocus_resolve.c */
9387ec681f3Smrg
9397ec681f3Smrgvoid crocus_predraw_resolve_inputs(struct crocus_context *ice,
9407ec681f3Smrg                                   struct crocus_batch *batch,
9417ec681f3Smrg                                   bool *draw_aux_buffer_disabled,
9427ec681f3Smrg                                   gl_shader_stage stage,
9437ec681f3Smrg                                   bool consider_framebuffer);
9447ec681f3Smrgvoid crocus_predraw_resolve_framebuffer(struct crocus_context *ice,
9457ec681f3Smrg                                        struct crocus_batch *batch,
9467ec681f3Smrg                                        bool *draw_aux_buffer_disabled);
9477ec681f3Smrgvoid crocus_postdraw_update_resolve_tracking(struct crocus_context *ice,
9487ec681f3Smrg                                             struct crocus_batch *batch);
9497ec681f3Smrgvoid crocus_cache_sets_clear(struct crocus_batch *batch);
9507ec681f3Smrgvoid crocus_flush_depth_and_render_caches(struct crocus_batch *batch);
9517ec681f3Smrgvoid crocus_cache_flush_for_read(struct crocus_batch *batch, struct crocus_bo *bo);
9527ec681f3Smrgvoid crocus_cache_flush_for_render(struct crocus_batch *batch,
9537ec681f3Smrg                                   struct crocus_bo *bo,
9547ec681f3Smrg                                   enum isl_format format,
9557ec681f3Smrg                                   enum isl_aux_usage aux_usage);
9567ec681f3Smrgvoid crocus_render_cache_add_bo(struct crocus_batch *batch,
9577ec681f3Smrg                                struct crocus_bo *bo,
9587ec681f3Smrg                                enum isl_format format,
9597ec681f3Smrg                                enum isl_aux_usage aux_usage);
9607ec681f3Smrgvoid crocus_cache_flush_for_depth(struct crocus_batch *batch, struct crocus_bo *bo);
9617ec681f3Smrgvoid crocus_depth_cache_add_bo(struct crocus_batch *batch, struct crocus_bo *bo);
9627ec681f3Smrgint crocus_get_driver_query_info(struct pipe_screen *pscreen, unsigned index,
9637ec681f3Smrg                                 struct pipe_driver_query_info *info);
9647ec681f3Smrgint crocus_get_driver_query_group_info(struct pipe_screen *pscreen,
9657ec681f3Smrg                                       unsigned index,
9667ec681f3Smrg                                       struct pipe_driver_query_group_info *info);
9677ec681f3Smrg
9687ec681f3Smrgstruct pipe_rasterizer_state *crocus_get_rast_state(struct crocus_context *ctx);
9697ec681f3Smrg
9707ec681f3Smrgbool crocus_sw_check_cond_render(struct crocus_context *ice);
9717ec681f3Smrgstatic inline bool crocus_check_conditional_render(struct crocus_context *ice)
9727ec681f3Smrg{
9737ec681f3Smrg   if (ice->state.predicate == CROCUS_PREDICATE_STATE_STALL_FOR_QUERY)
9747ec681f3Smrg      return crocus_sw_check_cond_render(ice);
9757ec681f3Smrg   return ice->state.predicate != CROCUS_PREDICATE_STATE_DONT_RENDER;
9767ec681f3Smrg}
9777ec681f3Smrg
9787ec681f3Smrg#ifdef genX
9797ec681f3Smrg#  include "crocus_genx_protos.h"
9807ec681f3Smrg#else
9817ec681f3Smrg#  define genX(x) gfx4_##x
9827ec681f3Smrg#  include "crocus_genx_protos.h"
9837ec681f3Smrg#  undef genX
9847ec681f3Smrg#  define genX(x) gfx45_##x
9857ec681f3Smrg#  include "crocus_genx_protos.h"
9867ec681f3Smrg#  undef genX
9877ec681f3Smrg#  define genX(x) gfx5_##x
9887ec681f3Smrg#  include "crocus_genx_protos.h"
9897ec681f3Smrg#  undef genX
9907ec681f3Smrg#  define genX(x) gfx6_##x
9917ec681f3Smrg#  include "crocus_genx_protos.h"
9927ec681f3Smrg#  undef genX
9937ec681f3Smrg#  define genX(x) gfx7_##x
9947ec681f3Smrg#  include "crocus_genx_protos.h"
9957ec681f3Smrg#  undef genX
9967ec681f3Smrg#  define genX(x) gfx75_##x
9977ec681f3Smrg#  include "crocus_genx_protos.h"
9987ec681f3Smrg#  undef genX
9997ec681f3Smrg#  define genX(x) gfx8_##x
10007ec681f3Smrg#  include "crocus_genx_protos.h"
10017ec681f3Smrg#  undef genX
10027ec681f3Smrg#endif
10037ec681f3Smrg
10047ec681f3Smrg#endif
1005