ast_2dtool.h revision b410ddbe
115fb4814Smrg/*
215fb4814Smrg * Copyright (c) 2005 ASPEED Technology Inc.
315fb4814Smrg *
415fb4814Smrg * Permission to use, copy, modify, distribute, and sell this software and its
515fb4814Smrg * documentation for any purpose is hereby granted without fee, provided that
615fb4814Smrg * the above copyright notice appear in all copies and that both that
715fb4814Smrg * copyright notice and this permission notice appear in supporting
815fb4814Smrg * documentation, and that the name of the authors not be used in
915fb4814Smrg * advertising or publicity pertaining to distribution of the software without
1015fb4814Smrg * specific, written prior permission.  The authors makes no representations
1115fb4814Smrg * about the suitability of this software for any purpose.  It is provided
1215fb4814Smrg * "as is" without express or implied warranty.
1315fb4814Smrg *
1415fb4814Smrg * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
1515fb4814Smrg * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
1615fb4814Smrg * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
1715fb4814Smrg * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
1815fb4814Smrg * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
1915fb4814Smrg * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
2015fb4814Smrg * PERFORMANCE OF THIS SOFTWARE.
2115fb4814Smrg */
2215fb4814Smrg
2315fb4814Smrg/* Eng Capability Definition */
2415fb4814Smrg#define	ENG_CAP_Sync				0x0001
2515fb4814Smrg#define	ENG_CAP_ScreenToScreenCopy		0x0002
2615fb4814Smrg#define	ENG_CAP_SolidFill			0x0004
2715fb4814Smrg#define	ENG_CAP_SolidLine			0x0008
2815fb4814Smrg#define	ENG_CAP_DashedLine			0x0010
2915fb4814Smrg#define	ENG_CAP_Mono8x8PatternFill		0x0020
3015fb4814Smrg#define	ENG_CAP_Color8x8PatternFill		0x0040
3115fb4814Smrg#define	ENG_CAP_CPUToScreenColorExpand		0x0080
3215fb4814Smrg#define	ENG_CAP_ScreenToScreenColorExpand	0x0100
3315fb4814Smrg#define	ENG_CAP_Clipping			0x0200
3415fb4814Smrg#define ENG_CAP_ALL	(ENG_CAP_Sync | ENG_CAP_ScreenToScreenCopy | ENG_CAP_SolidFill	|	\
3515fb4814Smrg                         ENG_CAP_SolidLine | ENG_CAP_DashedLine |				\
3615fb4814Smrg                         ENG_CAP_Mono8x8PatternFill | ENG_CAP_Color8x8PatternFill |		\
3715fb4814Smrg                         ENG_CAP_Clipping);
3815fb4814Smrg
3915fb4814Smrg/* CMDQ Definition */
4015fb4814Smrg#define    AGP_CMD_QUEUE                   	1
4115fb4814Smrg#define    VM_CMD_QUEUE                    	0
4215fb4814Smrg#define    VM_CMD_MMIO                     	2
4315fb4814Smrg
4415fb4814Smrg#define    CMD_QUEUE_SIZE_256K             	0x00040000
4515fb4814Smrg#define    CMD_QUEUE_SIZE_512K             	0x00080000
4615fb4814Smrg#define    CMD_QUEUE_SIZE_1M               	0x00100000
4715fb4814Smrg#define    CMD_QUEUE_SIZE_2M               	0x00200000
4815fb4814Smrg#define    CMD_QUEUE_SIZE_4M               	0x00400000
4915fb4814Smrg
5015fb4814Smrg/* CMD Type Info */
5115fb4814Smrg#define    PKT_NULL_CMD             		0x00009561
5215fb4814Smrg
5315fb4814Smrg#define    PKT_SINGLE_LENGTH        		8
5415fb4814Smrg#define    PKT_SINGLE_CMD_HEADER    		0x00009562
5515fb4814Smrg
5615fb4814Smrgtypedef struct  _PKT_SC
5715fb4814Smrg{
5815fb4814Smrg    ULONG    PKT_SC_dwHeader;
5915fb4814Smrg    ULONG    PKT_SC_dwData[1];
6015fb4814Smrg
6115fb4814Smrg} PKT_SC, *PPKT_SC;
6215fb4814Smrg
6315fb4814Smrg/* Eng Reg. Limitation */
6415fb4814Smrg#define	MAX_SRC_X				0x7FF
6515fb4814Smrg#define	MAX_SRC_Y				0x7FF
6615fb4814Smrg#define	MAX_DST_X				0x7FF
6715fb4814Smrg#define	MAX_DST_Y				0x7FF
6815fb4814Smrg
69de78e416Smrg#define	MASK_SRC_PITCH				0x1FFF
70de78e416Smrg#define	MASK_DST_PITCH				0x1FFF
71de78e416Smrg#define	MASK_DST_HEIGHT				0x7FF
72de78e416Smrg#define	MASK_SRC_X				0xFFF
73de78e416Smrg#define	MASK_SRC_Y				0xFFF
74de78e416Smrg#define	MASK_DST_X				0xFFF
75de78e416Smrg#define	MASK_DST_Y				0xFFF
76de78e416Smrg#define	MASK_RECT_WIDTH				0x7FF
77de78e416Smrg#define	MASK_RECT_HEIGHT			0x7FF
78de78e416Smrg#define MASK_CLIP				0xFFF
79de78e416Smrg
80de78e416Smrg#define MASK_LINE_X        			0xFFF
81de78e416Smrg#define MASK_LINE_Y           			0xFFF
82de78e416Smrg#define MASK_LINE_ERR   			0x3FFFFF
83de78e416Smrg#define MASK_LINE_WIDTH   			0x7FF
84de78e416Smrg#define MASK_LINE_K1				0x3FFFFF
85de78e416Smrg#define MASK_LINE_K2				0x3FFFFF
86b410ddbeSmrg#define MASK_AIPLINE_X        			0xFFF
87b410ddbeSmrg#define MASK_AIPLINE_Y         			0xFFF
8815fb4814Smrg
8915fb4814Smrg#define MAX_PATReg_Size				256
9015fb4814Smrg
9115fb4814Smrg/* Eng Reg. Definition */
9215fb4814Smrg/* MMIO Reg */
9315fb4814Smrg#define MMIOREG_SRC_BASE	(pAST->MMIOVirtualAddr + 0x8000)
9415fb4814Smrg#define MMIOREG_SRC_PITCH	(pAST->MMIOVirtualAddr + 0x8004)
9515fb4814Smrg#define MMIOREG_DST_BASE	(pAST->MMIOVirtualAddr + 0x8008)
9615fb4814Smrg#define MMIOREG_DST_PITCH	(pAST->MMIOVirtualAddr + 0x800C)
9715fb4814Smrg#define MMIOREG_DST_XY		(pAST->MMIOVirtualAddr + 0x8010)
9815fb4814Smrg#define MMIOREG_SRC_XY		(pAST->MMIOVirtualAddr + 0x8014)
9915fb4814Smrg#define MMIOREG_RECT_XY		(pAST->MMIOVirtualAddr + 0x8018)
10015fb4814Smrg#define MMIOREG_FG		(pAST->MMIOVirtualAddr + 0x801C)
10115fb4814Smrg#define MMIOREG_BG		(pAST->MMIOVirtualAddr + 0x8020)
10215fb4814Smrg#define MMIOREG_FG_SRC		(pAST->MMIOVirtualAddr + 0x8024)
10315fb4814Smrg#define MMIOREG_BG_SRC		(pAST->MMIOVirtualAddr + 0x8028)
10415fb4814Smrg#define MMIOREG_MONO1		(pAST->MMIOVirtualAddr + 0x802C)
10515fb4814Smrg#define MMIOREG_MONO2		(pAST->MMIOVirtualAddr + 0x8030)
10615fb4814Smrg#define MMIOREG_CLIP1		(pAST->MMIOVirtualAddr + 0x8034)
10715fb4814Smrg#define MMIOREG_CLIP2		(pAST->MMIOVirtualAddr + 0x8038)
10815fb4814Smrg#define MMIOREG_CMD		(pAST->MMIOVirtualAddr + 0x803C)
10915fb4814Smrg#define MMIOREG_PAT		(pAST->MMIOVirtualAddr + 0x8100)
11015fb4814Smrg
11115fb4814Smrg#define MMIOREG_LINE_XY         (pAST->MMIOVirtualAddr + 0x8010)
11215fb4814Smrg#define MMIOREG_LINE_Err        (pAST->MMIOVirtualAddr + 0x8014)
11315fb4814Smrg#define MMIOREG_LINE_WIDTH      (pAST->MMIOVirtualAddr + 0x8018)
11415fb4814Smrg#define MMIOREG_LINE_K1         (pAST->MMIOVirtualAddr + 0x8024)
11515fb4814Smrg#define MMIOREG_LINE_K2         (pAST->MMIOVirtualAddr + 0x8028)
11615fb4814Smrg#define MMIOREG_LINE_STYLE1     (pAST->MMIOVirtualAddr + 0x802C)
11715fb4814Smrg#define MMIOREG_LINE_STYLE2     (pAST->MMIOVirtualAddr + 0x8030)
118b410ddbeSmrg#define MMIOREG_LINE_XY2        (pAST->MMIOVirtualAddr + 0x8014)
119b410ddbeSmrg#define MMIOREG_LINE_NUMBER     (pAST->MMIOVirtualAddr + 0x8018)
12015fb4814Smrg
12115fb4814Smrg/* CMDQ Reg */
12215fb4814Smrg#define CMDQREG_SRC_BASE	(0x00 << 24)
12315fb4814Smrg#define CMDQREG_SRC_PITCH	(0x01 << 24)
12415fb4814Smrg#define CMDQREG_DST_BASE	(0x02 << 24)
12515fb4814Smrg#define CMDQREG_DST_PITCH	(0x03 << 24)
12615fb4814Smrg#define CMDQREG_DST_XY		(0x04 << 24)
12715fb4814Smrg#define CMDQREG_SRC_XY		(0x05 << 24)
12815fb4814Smrg#define CMDQREG_RECT_XY		(0x06 << 24)
12915fb4814Smrg#define CMDQREG_FG		(0x07 << 24)
13015fb4814Smrg#define CMDQREG_BG		(0x08 << 24)
13115fb4814Smrg#define CMDQREG_FG_SRC		(0x09 << 24)
13215fb4814Smrg#define CMDQREG_BG_SRC		(0x0A << 24)
13315fb4814Smrg#define CMDQREG_MONO1		(0x0B << 24)
13415fb4814Smrg#define CMDQREG_MONO2		(0x0C << 24)
13515fb4814Smrg#define CMDQREG_CLIP1		(0x0D << 24)
13615fb4814Smrg#define CMDQREG_CLIP2		(0x0E << 24)
13715fb4814Smrg#define CMDQREG_CMD		(0x0F << 24)
13815fb4814Smrg#define CMDQREG_PAT		(0x40 << 24)
13915fb4814Smrg
14015fb4814Smrg#define CMDQREG_LINE_XY         (0x04 << 24)
14115fb4814Smrg#define CMDQREG_LINE_Err        (0x05 << 24)
14215fb4814Smrg#define CMDQREG_LINE_WIDTH      (0x06 << 24)
14315fb4814Smrg#define CMDQREG_LINE_K1         (0x09 << 24)
14415fb4814Smrg#define CMDQREG_LINE_K2         (0x0A << 24)
14515fb4814Smrg#define CMDQREG_LINE_STYLE1     (0x0B << 24)
14615fb4814Smrg#define CMDQREG_LINE_STYLE2     (0x0C << 24)
147b410ddbeSmrg#define CMDQREG_LINE_XY2        (0x05 << 24)
148b410ddbeSmrg#define CMDQREG_LINE_NUMBER     (0x06 << 24)
14915fb4814Smrg
15015fb4814Smrg/* CMD Reg. Definition */
15115fb4814Smrg#define   CMD_BITBLT                 		0x00000000
15215fb4814Smrg#define   CMD_LINEDRAW               		0x00000001
15315fb4814Smrg#define   CMD_COLOREXP               		0x00000002
15415fb4814Smrg#define   CMD_ENHCOLOREXP            		0x00000003
155b410ddbeSmrg#define   CMD_TRANSPARENTBLT           		0x00000004
15615fb4814Smrg#define   CMD_MASK            	        	0x00000007
15715fb4814Smrg
15815fb4814Smrg#define   CMD_DISABLE_CLIP           		0x00000000
15915fb4814Smrg#define   CMD_ENABLE_CLIP            		0x00000008
16015fb4814Smrg
16115fb4814Smrg#define   CMD_COLOR_08               		0x00000000
16215fb4814Smrg#define   CMD_COLOR_16               		0x00000010
16315fb4814Smrg#define   CMD_COLOR_32               		0x00000020
16415fb4814Smrg
16515fb4814Smrg#define   CMD_SRC_SIQ                		0x00000040
16615fb4814Smrg
16715fb4814Smrg#define   CMD_TRANSPARENT               	0x00000080
16815fb4814Smrg
16915fb4814Smrg#define   CMD_PAT_FGCOLOR            		0x00000000
17015fb4814Smrg#define   CMD_PAT_MONOMASK           		0x00010000
17115fb4814Smrg#define   CMD_PAT_PATREG             		0x00020000
17215fb4814Smrg
17315fb4814Smrg#define   CMD_OPAQUE                 		0x00000000
17415fb4814Smrg#define   CMD_FONT_TRANSPARENT          	0x00040000
17515fb4814Smrg
17615fb4814Smrg#define   CMD_X_INC				0x00000000
17715fb4814Smrg#define   CMD_X_DEC				0x00200000
17815fb4814Smrg
17915fb4814Smrg#define   CMD_Y_INC				0x00000000
18015fb4814Smrg#define   CMD_Y_DEC				0x00100000
18115fb4814Smrg
182b410ddbeSmrg#define   CMD_NT_LINE				0x00000000
183b410ddbeSmrg#define	  CMD_NORMAL_LINE			0x00400000
184b410ddbeSmrg
18515fb4814Smrg#define   CMD_DRAW_LAST_PIXEL           	0x00000000
18615fb4814Smrg#define   CMD_NOT_DRAW_LAST_PIXEL       	0x00800000
18715fb4814Smrg
18815fb4814Smrg#define   CMD_DISABLE_LINE_STYLE     		0x00000000
18915fb4814Smrg#define   CMD_ENABLE_LINE_STYLE      		0x40000000
19015fb4814Smrg
19115fb4814Smrg#define   CMD_RESET_STYLE_COUNTER       	0x80000000
19215fb4814Smrg#define   CMD_NOT_RESET_STYLE_COUNTER   	0x00000000
19315fb4814Smrg
19415fb4814Smrg#define   BURST_FORCE_CMD            		0x80000000
19515fb4814Smrg
19615fb4814Smrg/* Line */
19715fb4814Smrg#define	LINEPARAM_XM				0x00000001
19815fb4814Smrg#define	LINEPARAM_X_DEC				0x00000002
19915fb4814Smrg#define	LINEPARAM_Y_DEC				0x00000004
20015fb4814Smrg
20115fb4814Smrgtypedef struct _LINEPARAM {
20215fb4814Smrg    USHORT	dsLineX;
20315fb4814Smrg    USHORT	dsLineY;
20415fb4814Smrg    USHORT	dsLineWidth;
20515fb4814Smrg    ULONG	dwErrorTerm;
20615fb4814Smrg    ULONG	dwK1Term;
20715fb4814Smrg    ULONG	dwK2Term;
20815fb4814Smrg    ULONG	dwLineAttributes;
20915fb4814Smrg} LINEPARAM, *PLINEPARAM;
21015fb4814Smrg
21115fb4814Smrgtypedef struct {
21215fb4814Smrg
213de78e416Smrg    LONG X1;
214de78e416Smrg    LONG Y1;
215de78e416Smrg    LONG X2;
216de78e416Smrg    LONG Y2;
21715fb4814Smrg
21815fb4814Smrg} _LINEInfo;
21915fb4814Smrg
22015fb4814Smrg/* Macro */
22115fb4814Smrg/* MMIO 2D Macro */
22215fb4814Smrg#define ASTSetupSRCBase_MMIO(base) \
22315fb4814Smrg      { \
22415fb4814Smrg        do { \
22515fb4814Smrg           *(ULONG *)(MMIOREG_SRC_BASE) = (ULONG) (base); \
226de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_SRC_BASE) != (ULONG) (base)); \
22715fb4814Smrg      }
22815fb4814Smrg#define ASTSetupSRCPitch_MMIO(pitch) \
22915fb4814Smrg      { \
23015fb4814Smrg        do { \
23115fb4814Smrg           *(ULONG *)(MMIOREG_SRC_PITCH) = (ULONG)(pitch << 16); \
232de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_SRC_PITCH) != (ULONG)(pitch << 16)); \
23315fb4814Smrg      }
23415fb4814Smrg#define ASTSetupDSTBase_MMIO(base) \
23515fb4814Smrg      { \
23615fb4814Smrg        do { \
23715fb4814Smrg           *(ULONG *)(MMIOREG_DST_BASE) = (ULONG)(base); \
238de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_DST_BASE) != (ULONG)(base)); \
23915fb4814Smrg      }
24015fb4814Smrg#define ASTSetupDSTPitchHeight_MMIO(pitch, height) \
24115fb4814Smrg      { \
24215fb4814Smrg        ULONG dstpitch; \
243de78e416Smrg        dstpitch = (ULONG)((pitch << 16) + ((height) & MASK_DST_HEIGHT)); \
24415fb4814Smrg        do { \
24515fb4814Smrg           *(ULONG *)(MMIOREG_DST_PITCH) = dstpitch; \
246de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_DST_PITCH) != dstpitch); \
24715fb4814Smrg      }
24815fb4814Smrg#define ASTSetupDSTXY_MMIO(x, y) \
24915fb4814Smrg      { \
25015fb4814Smrg        ULONG dstxy; \
251de78e416Smrg        dstxy = (ULONG)(((x & MASK_DST_X) << 16) + (y & MASK_DST_Y)); \
25215fb4814Smrg        do { \
25315fb4814Smrg           *(ULONG *)(MMIOREG_DST_XY) = dstxy; \
254de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_DST_XY) != dstxy); \
25515fb4814Smrg      }
25615fb4814Smrg#define ASTSetupSRCXY_MMIO(x, y) \
25715fb4814Smrg      { \
25815fb4814Smrg        ULONG srcxy; \
259de78e416Smrg        srcxy = (ULONG)(((x & MASK_SRC_X) << 16) + (y & MASK_SRC_Y)); \
26015fb4814Smrg        do { \
26115fb4814Smrg           *(ULONG *)(MMIOREG_SRC_XY) = srcxy; \
262de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_SRC_XY) != srcxy); \
26315fb4814Smrg      }
26415fb4814Smrg#define ASTSetupRECTXY_MMIO(x, y) \
26515fb4814Smrg      { \
26615fb4814Smrg        ULONG rectxy; \
267de78e416Smrg        rectxy = (ULONG)(((x & MASK_RECT_WIDTH) << 16) + (y & MASK_RECT_WIDTH)); \
26815fb4814Smrg        do { \
26915fb4814Smrg           *(ULONG *)(MMIOREG_RECT_XY) = rectxy; \
270de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_RECT_XY) != rectxy); \
27115fb4814Smrg      }
27215fb4814Smrg#define ASTSetupFG_MMIO(color) \
27315fb4814Smrg      { \
27415fb4814Smrg        do { \
27515fb4814Smrg           *(ULONG *)(MMIOREG_FG) = (ULONG)(color); \
276de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_FG) != (ULONG)(color)); \
27715fb4814Smrg      }
27815fb4814Smrg#define ASTSetupBG_MMIO(color) \
27915fb4814Smrg      { \
28015fb4814Smrg        do { \
28115fb4814Smrg           *(ULONG *)(MMIOREG_BG) = (ULONG)(color); \
282de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_BG) != (ULONG)(color)); \
28315fb4814Smrg      }
28415fb4814Smrg#define ASTSetupMONO1_MMIO(pat) \
28515fb4814Smrg      { \
28615fb4814Smrg        do { \
28715fb4814Smrg          *(ULONG *)(MMIOREG_MONO1) = (ULONG)(pat); \
288de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_MONO1) != (ULONG)(pat)); \
28915fb4814Smrg      }
29015fb4814Smrg#define ASTSetupMONO2_MMIO(pat) \
29115fb4814Smrg      { \
29215fb4814Smrg        do { \
29315fb4814Smrg          *(ULONG *)(MMIOREG_MONO2) = (ULONG)(pat); \
294de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_MONO2) != (ULONG)(pat)); \
29515fb4814Smrg      }
29615fb4814Smrg#define ASTSetupCLIP1_MMIO(left, top) \
29715fb4814Smrg      { \
29815fb4814Smrg       ULONG clip1; \
299de78e416Smrg       clip1 = (ULONG)(((left & MASK_CLIP) << 16) + (top & MASK_CLIP)); \
30015fb4814Smrg       do { \
30115fb4814Smrg          *(ULONG *)(MMIOREG_CLIP1) = clip1; \
302de78e416Smrg       } while (*(volatile ULONG *)(MMIOREG_CLIP1) != clip1); \
30315fb4814Smrg      }
30415fb4814Smrg#define ASTSetupCLIP2_MMIO(right, bottom) \
30515fb4814Smrg      { \
30615fb4814Smrg       ULONG clip2; \
307de78e416Smrg       clip2 = (ULONG)(((right & MASK_CLIP) << 16) + (bottom & MASK_CLIP)); \
30815fb4814Smrg       do { \
30915fb4814Smrg          *(ULONG *)(MMIOREG_CLIP2) = clip2; \
310de78e416Smrg       } while (*(volatile ULONG *)(MMIOREG_CLIP2) != clip2); \
31115fb4814Smrg      }
31215fb4814Smrg#define ASTSetupCMDReg_MMIO(reg) \
31315fb4814Smrg      { \
31415fb4814Smrg        *(ULONG *)(MMIOREG_CMD) = (ULONG)(reg);	\
31515fb4814Smrg      }
31615fb4814Smrg#define ASTSetupPatReg_MMIO(patreg, pat) \
31715fb4814Smrg      { \
31815fb4814Smrg       do { \
31915fb4814Smrg          *(ULONG *)(MMIOREG_PAT + patreg*4) = (ULONG)(pat); \
320de78e416Smrg       } while (*(volatile ULONG *)(MMIOREG_PAT + patreg*4) != (ULONG)(pat)); \
32115fb4814Smrg      }
32215fb4814Smrg
32315fb4814Smrg/* Line CMD */
32415fb4814Smrg#define ASTSetupLineXY_MMIO(x, y) \
32515fb4814Smrg      { \
32615fb4814Smrg        ULONG linexy; \
327de78e416Smrg        linexy = (ULONG)(((x & MASK_LINE_X) << 16) + (y & MASK_LINE_Y)); \
32815fb4814Smrg        do { \
32915fb4814Smrg           *(ULONG *)(MMIOREG_LINE_XY) = linexy; \
330de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_LINE_XY) != linexy); \
33115fb4814Smrg      }
33215fb4814Smrg#define ASTSetupLineXMErrTerm_MMIO(xm, err) \
33315fb4814Smrg      { \
33415fb4814Smrg        ULONG lineerr; \
335de78e416Smrg        lineerr = (ULONG)((xm << 24) + (err & MASK_LINE_ERR)); \
33615fb4814Smrg        do { \
33715fb4814Smrg           *(ULONG *)(MMIOREG_LINE_Err) = lineerr; \
338de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_LINE_Err) != lineerr); \
33915fb4814Smrg      }
34015fb4814Smrg#define ASTSetupLineWidth_MMIO(width) \
34115fb4814Smrg      { \
34215fb4814Smrg        ULONG linewidth; \
343de78e416Smrg        linewidth = (ULONG)((width & MASK_LINE_WIDTH) << 16); \
34415fb4814Smrg        do { \
34515fb4814Smrg          *(ULONG *)(MMIOREG_LINE_WIDTH) = linewidth; \
346de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_LINE_WIDTH) != linewidth); \
34715fb4814Smrg      }
34815fb4814Smrg#define ASTSetupLineK1Term_MMIO(err) \
34915fb4814Smrg      { \
35015fb4814Smrg        do { \
351de78e416Smrg          *(ULONG *)(MMIOREG_LINE_K1) = (ULONG)(err & MASK_LINE_K1); \
352de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_LINE_K1) != (ULONG)(err & MASK_LINE_K1)); \
35315fb4814Smrg      }
35415fb4814Smrg#define ASTSetupLineK2Term_MMIO(err) \
35515fb4814Smrg      { \
35615fb4814Smrg        do { \
357de78e416Smrg           *(ULONG *)(MMIOREG_LINE_K2) = (ULONG)(err & MASK_LINE_K2); \
358de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_LINE_K2) != (ULONG)(err & MASK_LINE_K2)); \
35915fb4814Smrg      }
36015fb4814Smrg#define ASTSetupLineStyle1_MMIO(pat) \
36115fb4814Smrg      { \
36215fb4814Smrg        do { \
36315fb4814Smrg           *(ULONG *)(MMIOREG_LINE_STYLE1) = (ULONG)(pat); \
364de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_LINE_STYLE1) != (ULONG)(pat)); \
36515fb4814Smrg      }
36615fb4814Smrg#define ASTSetupLineStyle2_MMIO(pat) \
36715fb4814Smrg      { \
36815fb4814Smrg        do { \
36915fb4814Smrg          *(ULONG *)(MMIOREG_LINE_STYLE2) = (ULONG)(pat); \
370de78e416Smrg        } while (*(volatile ULONG *)(MMIOREG_LINE_STYLE2) != (ULONG)(pat)); \
37115fb4814Smrg      }
372b410ddbeSmrg
373b410ddbeSmrg/* AIP Line CMD */
374b410ddbeSmrg#define AIPSetupLineXY_MMIO(x, y) \
375b410ddbeSmrg      { \
376b410ddbeSmrg        ULONG linexy; \
377b410ddbeSmrg        linexy = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y)); \
378b410ddbeSmrg        do { \
379b410ddbeSmrg           *(ULONG *)(MMIOREG_LINE_XY) = linexy; \
380b410ddbeSmrg        } while (*(volatile ULONG *)(MMIOREG_LINE_XY) != linexy); \
381b410ddbeSmrg      }
382b410ddbeSmrg#define AIPSetupLineXY2_MMIO(x, y) \
383b410ddbeSmrg      { \
384b410ddbeSmrg        ULONG linexy; \
385b410ddbeSmrg        linexy = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y)); \
386b410ddbeSmrg        do { \
387b410ddbeSmrg           *(ULONG *)(MMIOREG_LINE_XY2) = linexy; \
388b410ddbeSmrg        } while (*(volatile ULONG *)(MMIOREG_LINE_XY2) != linexy); \
389b410ddbeSmrg      }
390b410ddbeSmrg#define AIPSetupLineNumber_MMIO(no) \
391b410ddbeSmrg      { \
392b410ddbeSmrg        do { \
393b410ddbeSmrg           *(ULONG *)(MMIOREG_LINE_NUMBER) = (ULONG) no; \
394b410ddbeSmrg        } while (*(volatile ULONG *)(MMIOREG_LINE_NUMBER) != (ULONG) no); \
395b410ddbeSmrg      }
39615fb4814Smrg
39715fb4814Smrg/* CMDQ Mode Macro */
39815fb4814Smrg#define mUpdateWritePointer *(ULONG *) (pAST->CMDQInfo.pjWritePort) = (pAST->CMDQInfo.ulWritePointer >>3)
39915fb4814Smrg
40015fb4814Smrg/* General CMD */
40115fb4814Smrg#define ASTSetupSRCBase(addr, base) \
40215fb4814Smrg      { \
40315fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_SRC_BASE); 	\
40415fb4814Smrg        addr->PKT_SC_dwData[0] = (ULONG)(base);					\
40515fb4814Smrg      }
40615fb4814Smrg#define ASTSetupSRCPitch(addr, pitch) \
40715fb4814Smrg      { \
40815fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_SRC_PITCH); 	\
40915fb4814Smrg        addr->PKT_SC_dwData[0] = (ULONG)(pitch << 16);					\
41015fb4814Smrg      }
41115fb4814Smrg#define ASTSetupDSTBase(addr, base) \
41215fb4814Smrg      { \
41315fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_DST_BASE); 	\
41415fb4814Smrg        addr->PKT_SC_dwData[0] = (ULONG)(base);					\
41515fb4814Smrg      }
41615fb4814Smrg#define ASTSetupDSTPitchHeight(addr, pitch, height) \
41715fb4814Smrg      { \
41815fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_DST_PITCH); 	\
419de78e416Smrg        addr->PKT_SC_dwData[0] = (ULONG)((pitch << 16) + ((height) & MASK_DST_HEIGHT));					\
42015fb4814Smrg      }
42115fb4814Smrg#define ASTSetupDSTXY(addr, x, y) \
42215fb4814Smrg      { \
42315fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_DST_XY); 	\
424de78e416Smrg        addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_DST_X) << 16) + (y & MASK_DST_Y));					\
42515fb4814Smrg      }
42615fb4814Smrg#define ASTSetupSRCXY(addr, x, y) \
42715fb4814Smrg      { \
42815fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_SRC_XY); 	\
429de78e416Smrg        addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_SRC_X) << 16) + (y & MASK_SRC_Y));					\
43015fb4814Smrg      }
43115fb4814Smrg#define ASTSetupRECTXY(addr, x, y) \
43215fb4814Smrg      { \
43315fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_RECT_XY); 	\
434de78e416Smrg        addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_RECT_WIDTH) << 16) + (y & MASK_RECT_WIDTH));					\
43515fb4814Smrg      }
43615fb4814Smrg#define ASTSetupFG(addr, color) \
43715fb4814Smrg      { \
43815fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_FG); 	\
43915fb4814Smrg        addr->PKT_SC_dwData[0] = (ULONG)(color);					\
44015fb4814Smrg      }
44115fb4814Smrg#define ASTSetupBG(addr, color) \
44215fb4814Smrg      { \
44315fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_BG); 	\
44415fb4814Smrg        addr->PKT_SC_dwData[0] = (ULONG)(color);					\
44515fb4814Smrg      }
44615fb4814Smrg#define ASTSetupMONO1(addr, pat) \
44715fb4814Smrg      { \
44815fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_MONO1); 	\
44915fb4814Smrg        addr->PKT_SC_dwData[0] = (ULONG)(pat);				\
45015fb4814Smrg      }
45115fb4814Smrg#define ASTSetupMONO2(addr, pat) \
45215fb4814Smrg      { \
45315fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_MONO2); 	\
45415fb4814Smrg        addr->PKT_SC_dwData[0] = (ULONG)(pat);				\
45515fb4814Smrg      }
45615fb4814Smrg#define ASTSetupCLIP1(addr, left, top) \
45715fb4814Smrg      { \
45815fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_CLIP1); 	\
459de78e416Smrg        addr->PKT_SC_dwData[0] = (ULONG)(((left & MASK_CLIP) << 16) + (top & MASK_CLIP));	\
46015fb4814Smrg      }
46115fb4814Smrg#define ASTSetupCLIP2(addr, right, bottom) \
46215fb4814Smrg      { \
46315fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_CLIP2); 	\
464de78e416Smrg        addr->PKT_SC_dwData[0] = (ULONG)(((right & MASK_CLIP) << 16) + (bottom & MASK_CLIP));	\
46515fb4814Smrg      }
46615fb4814Smrg#define ASTSetupCMDReg(addr, reg) \
46715fb4814Smrg      { \
46815fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_CMD); 	\
46915fb4814Smrg        addr->PKT_SC_dwData[0] = (ULONG)(reg);					\
47015fb4814Smrg      }
47115fb4814Smrg#define ASTSetupPatReg(addr, patreg, pat) \
47215fb4814Smrg      { \
47315fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + (CMDQREG_PAT + (patreg << 24))); 	\
47415fb4814Smrg        addr->PKT_SC_dwData[0] = (ULONG)(pat);				\
47515fb4814Smrg      }
47615fb4814Smrg
47715fb4814Smrg/* Line CMD */
47815fb4814Smrg#define ASTSetupLineXY(addr, x, y) \
47915fb4814Smrg      { \
48015fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_XY); 	\
481de78e416Smrg        addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_LINE_X) << 16) + (y & MASK_LINE_Y));					\
48215fb4814Smrg      }
48315fb4814Smrg#define ASTSetupLineXMErrTerm(addr, xm, err) \
48415fb4814Smrg      { \
48515fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_Err); 	\
486de78e416Smrg        addr->PKT_SC_dwData[0] = (ULONG)((xm << 24) + (err & MASK_LINE_ERR));					\
48715fb4814Smrg      }
48815fb4814Smrg#define ASTSetupLineWidth(addr, width) \
48915fb4814Smrg      { \
49015fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_WIDTH); 	\
491de78e416Smrg        addr->PKT_SC_dwData[0] = (ULONG)((width & MASK_LINE_WIDTH) << 16);				\
49215fb4814Smrg      }
49315fb4814Smrg#define ASTSetupLineK1Term(addr, err) \
49415fb4814Smrg      { \
49515fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_K1); 	\
496de78e416Smrg        addr->PKT_SC_dwData[0] = (ULONG)(err & MASK_LINE_K1);				\
49715fb4814Smrg      }
49815fb4814Smrg#define ASTSetupLineK2Term(addr, err) \
49915fb4814Smrg      { \
50015fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_K2); 	\
501de78e416Smrg        addr->PKT_SC_dwData[0] = (ULONG)(err & MASK_LINE_K2);				\
50215fb4814Smrg      }
50315fb4814Smrg#define ASTSetupLineStyle1(addr, pat) \
50415fb4814Smrg      { \
50515fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_STYLE1); 	\
50615fb4814Smrg        addr->PKT_SC_dwData[0] = (ULONG)(pat);				\
50715fb4814Smrg      }
50815fb4814Smrg#define ASTSetupLineStyle2(addr, pat) \
50915fb4814Smrg      { \
51015fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_STYLE2); 	\
51115fb4814Smrg        addr->PKT_SC_dwData[0] = (ULONG)(pat);				\
51215fb4814Smrg      }
51315fb4814Smrg
51415fb4814Smrg#define ASTSetupNULLCMD(addr) \
51515fb4814Smrg      { \
51615fb4814Smrg        addr->PKT_SC_dwHeader  = (ULONG) (PKT_NULL_CMD); 			\
51715fb4814Smrg        addr->PKT_SC_dwData[0] = (ULONG) 0;					\
51815fb4814Smrg      }
519b410ddbeSmrg
520b410ddbeSmrg/* AIP Line CMD */
521b410ddbeSmrg#define AIPSetupLineXY(addr, x, y) \
522b410ddbeSmrg      { \
523b410ddbeSmrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_XY); 	\
524b410ddbeSmrg        addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y));					\
525b410ddbeSmrg      }
526b410ddbeSmrg#define AIPSetupLineXY2(addr, x, y) \
527b410ddbeSmrg      { \
528b410ddbeSmrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_XY2); 	\
529b410ddbeSmrg        addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y));					\
530b410ddbeSmrg      }
531b410ddbeSmrg#define AIPSetupLineNumber(addr, no) \
532b410ddbeSmrg      { \
533b410ddbeSmrg        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_NUMBER); 	\
534b410ddbeSmrg        addr->PKT_SC_dwData[0] = (ULONG)(no);					\
535b410ddbeSmrg      }
536