s3.h revision a9060c92
1340e3fbdSmrg/* 2340e3fbdSmrg * Copyright 2001 Ani Joshi <ajoshi@unixbox.com> 3340e3fbdSmrg * 4340e3fbdSmrg * XFree86 4.x driver for S3 chipsets 5340e3fbdSmrg * 6340e3fbdSmrg * 7340e3fbdSmrg * Permission to use, copy, modify, distribute, and sell this software and its 8340e3fbdSmrg * documentation for any purpose is hereby granted without fee, provided that 9340e3fbdSmrg * the above copyright notice appear in all copies and that both that copyright 10340e3fbdSmrg * notice and this permission notice appear in supporting documentation and 11340e3fbdSmrg * that the name of Ani Joshi not be used in advertising or 12340e3fbdSmrg * publicity pertaining to distribution of the software without specific, 13340e3fbdSmrg * written prior permission. Ani Joshi makes no representations 14340e3fbdSmrg * about the suitability of this software for any purpose. It is provided 15340e3fbdSmrg * "as-is" without express or implied warranty. 16340e3fbdSmrg * 17340e3fbdSmrg * ANI JOSHI DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 18340e3fbdSmrg * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 19340e3fbdSmrg * EVENT SHALL ANI JOSHI BE LIABLE FOR ANY SPECIAL, INDIRECT OR 20340e3fbdSmrg * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 21340e3fbdSmrg * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 22340e3fbdSmrg * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 23340e3fbdSmrg * PERFORMANCE OF THIS SOFTWARE. 24340e3fbdSmrg * 25340e3fbdSmrg * 26340e3fbdSmrg */ 27340e3fbdSmrg 28340e3fbdSmrg 29340e3fbdSmrg#ifndef _S3_H 30340e3fbdSmrg#define _S3_H 31340e3fbdSmrg 32bd35f0dbSahoka#include "s3_pcirename.h" 33340e3fbdSmrg#include <string.h> 34340e3fbdSmrg 35340e3fbdSmrg#include "xf86.h" 36340e3fbdSmrg#include "xf86Pci.h" 37340e3fbdSmrg#include "xf86PciInfo.h" 38340e3fbdSmrg#include "xf86RamDac.h" 39340e3fbdSmrg#include "xaa.h" 40340e3fbdSmrg#include "vbe.h" 41340e3fbdSmrg#include "vgaHW.h" 42340e3fbdSmrg 43340e3fbdSmrg 44340e3fbdSmrg#include "xf86xv.h" 45340e3fbdSmrg#include <X11/extensions/Xv.h> 46340e3fbdSmrg#include "fourcc.h" 47340e3fbdSmrg 48340e3fbdSmrg 49340e3fbdSmrgtypedef struct _S3RegRec { 50340e3fbdSmrg unsigned char cr31, cr32, cr33, cr34, cr3a, cr3b, cr3c; 51340e3fbdSmrg unsigned char cr3b2, cr3c2; 52340e3fbdSmrg unsigned char cr40, cr42, cr43, cr44, cr45; 53340e3fbdSmrg unsigned char cr50, cr51, cr53, cr54, cr55, cr58, cr59, cr5a, 54340e3fbdSmrg cr5d, cr5e; 55340e3fbdSmrg unsigned char cr60, cr61, cr62, cr65, cr66, cr67, cr6d; 56340e3fbdSmrg unsigned char s3save[10]; 57340e3fbdSmrg unsigned char s3syssave[46]; 58340e3fbdSmrg unsigned char dacregs[0x101]; 59340e3fbdSmrg unsigned char color_stack[8]; 60340e3fbdSmrg unsigned char clock; 61340e3fbdSmrg} S3RegRec, *S3RegPtr; 62340e3fbdSmrg 63340e3fbdSmrg 64340e3fbdSmrgtypedef struct { 65340e3fbdSmrg unsigned char brightness; 66340e3fbdSmrg unsigned char contrast; 67bd35f0dbSahoka FBLinearPtr area; 68340e3fbdSmrg RegionRec clip; 69340e3fbdSmrg CARD32 colorKey; 70340e3fbdSmrg CARD32 videoStatus; 71340e3fbdSmrg Time offTime; 72340e3fbdSmrg Time freeTime; 73340e3fbdSmrg int lastPort; 74340e3fbdSmrg} S3PortPrivRec, *S3PortPrivPtr; 75340e3fbdSmrg 76340e3fbdSmrg 77340e3fbdSmrgtypedef struct { 78340e3fbdSmrg int bitsPerPixel; 79340e3fbdSmrg int depth; 80340e3fbdSmrg int displayWidth; 81340e3fbdSmrg int pixel_code; 82340e3fbdSmrg int pixel_bytes; 83340e3fbdSmrg DisplayModePtr mode; 84340e3fbdSmrg} S3FBLayout; 85340e3fbdSmrg 86340e3fbdSmrg 87340e3fbdSmrgtypedef struct _S3Rec { 88340e3fbdSmrg pciVideoPtr PciInfo; 89bd35f0dbSahoka#ifndef XSERVER_LIBPCIACCESS 90340e3fbdSmrg PCITAG PciTag; 91bd35f0dbSahoka#endif 92340e3fbdSmrg EntityInfoPtr pEnt; 93340e3fbdSmrg unsigned long IOAddress; 94340e3fbdSmrg unsigned long FBAddress; 95340e3fbdSmrg unsigned char * FBBase; 96340e3fbdSmrg unsigned char * MMIOBase; 97340e3fbdSmrg unsigned long videoRam; 98340e3fbdSmrg OptionInfoPtr Options; 99340e3fbdSmrg unsigned int Flags; 100340e3fbdSmrg Bool NoAccel; 101bd35f0dbSahoka Bool HWCursor; 102340e3fbdSmrg Bool SlowDRAMRefresh; 103340e3fbdSmrg Bool SlowDRAM; 104340e3fbdSmrg Bool SlowEDODRAM; 105340e3fbdSmrg Bool SlowVRAM; 106340e3fbdSmrg Bool S3NewMMIO; 107bd35f0dbSahoka Bool hasStreams; 108bd35f0dbSahoka int Streams_FIFO; 109bd35f0dbSahoka Bool XVideo; 110340e3fbdSmrg Bool PCIRetry; 111340e3fbdSmrg Bool ColorExpandBug; 112340e3fbdSmrg 113340e3fbdSmrg XAAInfoRecPtr pXAA; 114340e3fbdSmrg xf86CursorInfoPtr pCurs; 115340e3fbdSmrg xf86Int10InfoPtr pInt10; 116340e3fbdSmrg vbeInfoPtr pVBE; 117340e3fbdSmrg XF86VideoAdaptorPtr adaptor; 118340e3fbdSmrg S3PortPrivPtr portPrivate; 119340e3fbdSmrg 120340e3fbdSmrg DGAModePtr DGAModes; 121340e3fbdSmrg int numDGAModes; 122340e3fbdSmrg Bool DGAactive; 123340e3fbdSmrg int DGAViewportStatus; 124340e3fbdSmrg 125340e3fbdSmrg S3FBLayout CurrentLayout; 126340e3fbdSmrg 127340e3fbdSmrg RamDacHelperRecPtr RamDac; 128340e3fbdSmrg RamDacRecPtr RamDacRec; 129340e3fbdSmrg 130340e3fbdSmrg int vgaCRIndex, vgaCRReg; 131340e3fbdSmrg 132340e3fbdSmrg int s3Bpp, s3BppDisplayWidth, HDisplay; 133340e3fbdSmrg int mclk, MaxClock; 134340e3fbdSmrg int pixMuxShift; 135340e3fbdSmrg 136340e3fbdSmrg int Chipset, ChipRev; 137340e3fbdSmrg int RefClock; 138340e3fbdSmrg 139340e3fbdSmrg int s3ScissB, s3ScissR; 140340e3fbdSmrg unsigned short BltDir; 141340e3fbdSmrg int trans_color; 142340e3fbdSmrg int FBCursorOffset; 143340e3fbdSmrg 144340e3fbdSmrg S3RegRec SavedRegs; 145340e3fbdSmrg S3RegRec ModeRegs; 146340e3fbdSmrg 147340e3fbdSmrg unsigned char SAM256; 148340e3fbdSmrg 149340e3fbdSmrg void (*DacPreInit)(ScrnInfoPtr pScrn); 150340e3fbdSmrg void (*DacInit)(ScrnInfoPtr pScrn, 151340e3fbdSmrg DisplayModePtr mode); 152340e3fbdSmrg void (*DacSave)(ScrnInfoPtr pScrn); 153340e3fbdSmrg void (*DacRestore)(ScrnInfoPtr pScrn); 154340e3fbdSmrg Bool (*CursorInit)(ScreenPtr pScreen); 155340e3fbdSmrg 156340e3fbdSmrg void (*LoadPalette)(ScrnInfoPtr pScrn, int numColors, 157340e3fbdSmrg int *indicies, LOCO *colors, 158340e3fbdSmrg VisualPtr pVisual); 159340e3fbdSmrg 160340e3fbdSmrg Bool (*CloseScreen)(int, ScreenPtr); 161340e3fbdSmrg 162340e3fbdSmrg unsigned char *imageBuffer; 163340e3fbdSmrg int imageWidth; 164340e3fbdSmrg int imageHeight; 165bd35f0dbSahoka Bool hwCursor; 166776933bfSmrg 167776933bfSmrg Bool shadowFB; 168776933bfSmrg int rotate; 169776933bfSmrg unsigned char * ShadowPtr; 170776933bfSmrg int ShadowPitch; 171776933bfSmrg void (*PointerMoved)(int index, int x, int y); 172776933bfSmrg 173340e3fbdSmrg} S3Rec, *S3Ptr; 174340e3fbdSmrg 175340e3fbdSmrg#define S3PTR(p) ((S3Ptr)((p)->driverPrivate)) 176340e3fbdSmrg 177340e3fbdSmrg 178340e3fbdSmrg#define DRIVER_NAME "s3" 1794dab54a5Sahoka#define DRIVER_VERSION PACKAGE_VERSION 1804dab54a5Sahoka#define VERSION_MAJOR PACKAGE_VERSION_MAJOR 1814dab54a5Sahoka#define VERSION_MINOR PACKAGE_VERSION_MINOR 1824dab54a5Sahoka#define PATCHLEVEL PACKAGE_VERSION_PATCHLEVEL 183340e3fbdSmrg#define S3_VERSION ((VERSION_MAJOR << 24) | \ 184340e3fbdSmrg (VERSION_MINOR << 16) | PATCHLEVEL) 185340e3fbdSmrg 186340e3fbdSmrg 187340e3fbdSmrg 188340e3fbdSmrg 189340e3fbdSmrg/* 190340e3fbdSmrg * Prototypes 191340e3fbdSmrg */ 192340e3fbdSmrg 193340e3fbdSmrgBool S3AccelInit(ScreenPtr pScreen); 194340e3fbdSmrgBool S3AccelInitNewMMIO(ScreenPtr pScreen); 195340e3fbdSmrgBool S3AccelInitPIO(ScreenPtr pScreen); 196340e3fbdSmrgBool S3DGAInit(ScreenPtr pScreen); 197340e3fbdSmrgBool S3SwitchMode(int scrnIndex, DisplayModePtr mode, int flags); 198340e3fbdSmrgint S3GetRefClock(ScrnInfoPtr pScrn); 199340e3fbdSmrg 200340e3fbdSmrgvoid S3InitVideo(ScreenPtr pScreen); 201340e3fbdSmrgvoid S3InitStreams(ScrnInfoPtr pScrn, DisplayModePtr mode); 202340e3fbdSmrg 203340e3fbdSmrg/* IBMRGB */ 204340e3fbdSmrgextern RamDacSupportedInfoRec S3IBMRamdacs[]; 205340e3fbdSmrgBool S3ProbeIBMramdac(ScrnInfoPtr pScrn); 206340e3fbdSmrgvoid S3IBMRGB_PreInit(ScrnInfoPtr pScrn); 207340e3fbdSmrgvoid S3IBMRGB_Init(ScrnInfoPtr pScrn, DisplayModePtr mode); 208340e3fbdSmrgvoid S3IBMRGB_Save(ScrnInfoPtr pScrn); 209340e3fbdSmrgvoid S3IBMRGB_Restore(ScrnInfoPtr pScrn); 210340e3fbdSmrgBool S3IBMRGB_CursorInit(ScreenPtr pScreen); 211340e3fbdSmrg 212340e3fbdSmrg/* TRIO64 */ 213340e3fbdSmrgBool S3Trio64DACProbe(ScrnInfoPtr pScrn); 214340e3fbdSmrgvoid S3Trio64DAC_PreInit(ScrnInfoPtr pScrn); 215340e3fbdSmrgvoid S3Trio64DAC_Init(ScrnInfoPtr pScrn, DisplayModePtr mode); 216340e3fbdSmrgvoid S3Trio64DAC_Save(ScrnInfoPtr pScrn); 217340e3fbdSmrgvoid S3Trio64DAC_Restore(ScrnInfoPtr pScrn); 218340e3fbdSmrg 219340e3fbdSmrg/* Ti */ 220340e3fbdSmrgBool S3TiDACProbe(ScrnInfoPtr pScrn); 221340e3fbdSmrgvoid S3TiDAC_PreInit(ScrnInfoPtr pScrn); 222340e3fbdSmrgvoid S3TiDAC_Init(ScrnInfoPtr pScrn, DisplayModePtr mode); 223340e3fbdSmrgvoid S3TiDAC_Save(ScrnInfoPtr pScrn); 224340e3fbdSmrgvoid S3TiDAC_Restore(ScrnInfoPtr pScrn); 225340e3fbdSmrgvoid S3TiLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indicies, LOCO *colors, 226340e3fbdSmrg VisualPtr pVisual); 227340e3fbdSmrgBool S3Ti_CursorInit(ScreenPtr pScreen); 228340e3fbdSmrgvoid S3OutTiIndReg(ScrnInfoPtr pScrn, CARD32 reg, unsigned char mask, 229340e3fbdSmrg unsigned char data); 230340e3fbdSmrg 23196cdd0b9Skiyohara/* SDAC/GENDAC */ 23296cdd0b9SkiyoharaBool S3SDACProbe(ScrnInfoPtr pScrn); 23396cdd0b9Skiyoharavoid S3GENDAC_PreInit(ScrnInfoPtr pScrn); 23496cdd0b9Skiyoharavoid S3GENDAC_Init(ScrnInfoPtr pScrn, DisplayModePtr mode); 23596cdd0b9Skiyoharavoid S3SDAC_Init(ScrnInfoPtr pScrn, DisplayModePtr mode); 23696cdd0b9Skiyoharavoid S3GENDAC_Save(ScrnInfoPtr pScrn); 23796cdd0b9Skiyoharavoid S3GENDAC_Restore(ScrnInfoPtr pScrn); 23896cdd0b9Skiyohara 239340e3fbdSmrg/* s3 gen cursor */ 240340e3fbdSmrgBool S3_CursorInit(ScreenPtr pScreen); 241340e3fbdSmrg 242776933bfSmrg/* in s3_shadow.c */ 243776933bfSmrgvoid S3PointerMoved(int index, int x, int y); 244776933bfSmrgvoid S3RefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 245776933bfSmrgvoid S3RefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 246776933bfSmrgvoid S3RefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 247776933bfSmrgvoid S3RefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 248776933bfSmrgvoid S3RefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 249776933bfSmrg 250a9060c92SchristosBool S3GENDACProbe(ScrnInfoPtr pScrn); 251a9060c92Schristos 252776933bfSmrg 253340e3fbdSmrg#define TRIO64_RAMDAC 0x8811 254340e3fbdSmrg#define TI3025_RAMDAC 0x3025 255340e3fbdSmrg#define TI3020_RAMDAC 0x3020 25696cdd0b9Skiyohara#define GENDAC_RAMDAC 0x0708 25796cdd0b9Skiyohara#define SDAC_RAMDAC 0x0716 258340e3fbdSmrg 259340e3fbdSmrg#define BIOS_BSIZE 1024 260340e3fbdSmrg#define BIOS_BASE 0xc0000 261340e3fbdSmrg 262340e3fbdSmrg/* 263340e3fbdSmrg * Chip...Sets... 264340e3fbdSmrg */ 265340e3fbdSmrg 26696cdd0b9Skiyohara#define S3_864_SERIES() ((pS3->Chipset == PCI_CHIP_864_0) || \ 26796cdd0b9Skiyohara (pS3->Chipset == PCI_CHIP_864_1)) 268340e3fbdSmrg#define S3_964_SERIES() ((pS3->Chipset == PCI_CHIP_964_0) || \ 269340e3fbdSmrg (pS3->Chipset == PCI_CHIP_964_1)) 270bd35f0dbSahoka 271340e3fbdSmrg#define S3_TRIO_SERIES() ((pS3->Chipset == PCI_CHIP_TRIO) || \ 272340e3fbdSmrg (pS3->Chipset == PCI_CHIP_AURORA64VP) || \ 273340e3fbdSmrg (pS3->Chipset == PCI_CHIP_TRIO64UVP) || \ 274340e3fbdSmrg (pS3->Chipset == PCI_CHIP_TRIO64V2_DXGX)) 275340e3fbdSmrg#endif /* _S3_H */ 276