History log of /src/sys/arch/powerpc/include/instr.h |
Revision | | Date | Author | Comments |
1.12 |
| 30-Aug-2022 |
rin | Move FTYPE_* definitions from instr.h to fpu_emu.h.
They are not defined by architecture, and used only for FPU emulation.
|
1.11 |
| 30-May-2022 |
rin | Add routines to fix unaligned memory access for userland process.
Mainly intended for 403, which cannot handle unaligned memory access at all (not only ones across page boundaries like 601).
For more details, see comments in fix_unaligned.c.
|
1.10 |
| 29-May-2022 |
rin | Fix insn field definitions for MD and MDS formats.
No one uses these yet.
|
1.9 |
| 15-Jul-2020 |
rin | Factor out emulation code for m[ft]msr in user mode from oea, and adjust it for systems without FPU.
Now, it can be used from booke and ibm4xx in order to support fenv(3).
|
1.8 |
| 27-Feb-2017 |
chs | have fpsetmask() change the FE0/FE1 MSR bits to precise mode if any FP exceptions are enabled. fix the kernel emulation of mfmsr and mtmsr to use the correct opcodes for these instructions. ignore PSL_FE (the FP enable bit) in the MSR that a user program tries to set, since it will naturally be set for FP-using processes but we can't let the user process manage that bit.
|
1.7 |
| 01-Aug-2014 |
matt | branches: 1.7.4; 1.7.8; 1.7.12; Add OPC31_OR
|
1.6 |
| 12-Feb-2011 |
matt | branches: 1.6.14; 1.6.28; When an OEA kernel is configured for multiple MMU types, use the new powerpc fixup mechanism to bind the kernel to a particular MMU. This avoids an indirect call for every pmap call.
|
1.5 |
| 18-Jan-2011 |
matt | branches: 1.5.2; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
|
1.4 |
| 11-Dec-2005 |
christos | branches: 1.4.100; 1.4.104; 1.4.106; merge ktrace-lwp.
|
1.3 |
| 27-Oct-2003 |
simonb | Remove (the now non-compiling) support for 128bit FP emulation, which isn't needed for PowerPC anyway.
|
1.2 |
| 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
1.1 |
| 13-Jun-2001 |
simonb | branches: 1.1.2; 1.1.10; 1.1.26; Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems.
IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
|
1.1.26.3 |
| 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
1.1.26.2 |
| 18-Sep-2004 |
skrll | Sync with HEAD.
|
1.1.26.1 |
| 03-Aug-2004 |
skrll | Sync with HEAD
|
1.1.10.2 |
| 13-Jun-2001 |
simonb | Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems.
IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
|
1.1.10.1 |
| 13-Jun-2001 |
simonb | file instr.h was added on branch nathanw_sa on 2001-06-13 06:01:49 +0000
|
1.1.2.1 |
| 21-Jun-2001 |
nathanw | Catch up to -current.
|
1.4.106.1 |
| 06-Jun-2011 |
jruoho | Sync with HEAD.
|
1.4.104.4 |
| 14-Oct-2011 |
matt | Sync with current pulling P2020 and other newer processor support.
|
1.4.104.3 |
| 17-Jan-2011 |
matt | Add SPE (signal processing engine) support for mpc85xx/booke. Think of it as AltiVec-lite (really lite). Genercize AltiVec support so that it could the same interface could support SPE as well. Rework the FPU support along the same lines. Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).
|
1.4.104.2 |
| 07-Jan-2011 |
matt | Move OPC_MFMSR definitions from trap.c Add OPC_LWSYNC for booke.
|
1.4.104.1 |
| 07-Jan-2011 |
matt | Add fixup definitions.
|
1.4.100.1 |
| 05-Mar-2011 |
rmind | sync with head
|
1.5.2.1 |
| 17-Feb-2011 |
bouyer | Sync with HEAD
|
1.6.28.1 |
| 10-Aug-2014 |
tls | Rebase.
|
1.6.14.2 |
| 03-Dec-2017 |
jdolecek | update from HEAD
|
1.6.14.1 |
| 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
1.7.12.1 |
| 21-Apr-2017 |
bouyer | Sync with HEAD
|
1.7.8.1 |
| 20-Mar-2017 |
pgoyette | Sync with HEAD
|
1.7.4.1 |
| 28-Aug-2017 |
skrll | Sync with HEAD
|