/src/sys/arch/arm/sunxi/ |
sunxi_nmi.c | 148 sunxi_nmi_irq_set_type(struct sunxi_nmi_softc *sc, u_int irq_type) 154 val |= __SHIFTIN(irq_type, NMI_CTRL_IRQ_TYPE); 183 u_int irq_type, irq, pol; local in function:sunxi_nmi_fdt_establish 232 irq_type = NMI_CTRL_IRQ_HIGH_EDGE; 236 irq_type = NMI_CTRL_IRQ_LOW_EDGE; 240 irq_type = NMI_CTRL_IRQ_HIGH_LEVEL; 244 irq_type = NMI_CTRL_IRQ_LOW_LEVEL; 248 irq_type = NMI_CTRL_IRQ_LOW_LEVEL; 276 sunxi_nmi_irq_set_type(sc, irq_type);
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/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
amdgpu_ring.h | 83 unsigned irq_type; member in struct:amdgpu_fence_driver 98 unsigned irq_type); 271 unsigned irq_type);
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amdgpu_gfx_v6_0.c | 3128 unsigned irq_type; local in function:gfx_v6_0_sw_init 3142 irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP + ring->pipe; 3144 &adev->gfx.eop_irq, irq_type);
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amdgpu_dce_v10_0.c | 3238 unsigned int irq_type = amdgpu_display_crtc_idx_to_irq_type(adev, crtc); local in function:dce_v10_0_crtc_irq 3247 if (amdgpu_irq_enabled(adev, source, irq_type)) {
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amdgpu_dce_v11_0.c | 3364 unsigned int irq_type = amdgpu_display_crtc_idx_to_irq_type(adev, local in function:dce_v11_0_crtc_irq 3374 if (amdgpu_irq_enabled(adev, source, irq_type)) {
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amdgpu_dce_v6_0.c | 2959 unsigned int irq_type = amdgpu_display_crtc_idx_to_irq_type(adev, local in function:dce_v6_0_crtc_irq 2969 if (amdgpu_irq_enabled(adev, source, irq_type)) {
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amdgpu_dce_v8_0.c | 3049 unsigned int irq_type = amdgpu_display_crtc_idx_to_irq_type(adev, local in function:dce_v8_0_crtc_irq 3059 if (amdgpu_irq_enabled(adev, source, irq_type)) {
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amdgpu_gfx_v10_0.c | 1244 unsigned int irq_type; local in function:gfx_v10_0_gfx_ring_init 1261 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + ring->pipe; 1263 &adev->gfx.eop_irq, irq_type); 1273 unsigned irq_type; local in function:gfx_v10_0_compute_ring_init 1290 irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP 1296 &adev->gfx.eop_irq, irq_type);
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amdgpu_gfx_v7_0.c | 4409 unsigned irq_type; local in function:gfx_v7_0_compute_ring_init 4422 irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP 4428 &adev->gfx.eop_irq, irq_type);
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amdgpu_gfx_v8_0.c | 1892 unsigned irq_type; local in function:gfx_v8_0_compute_ring_init 1909 irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP 1915 &adev->gfx.eop_irq, irq_type);
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amdgpu_gfx_v9_0.c | 2136 unsigned irq_type; local in function:gfx_v9_0_compute_ring_init 2153 irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP 2159 &adev->gfx.eop_irq, irq_type);
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
irq_types.h | 160 enum irq_type enum
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/src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
amdgpu_dm.c | 5933 int irq_type = local in function:manage_dm_interrupts 5943 irq_type); 5949 irq_type);
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/src/sys/external/mit/xen-include-public/dist/xen/include/public/ |
domctl.h | 515 uint32_t irq_type; /* enum pt_irq_type */ member in struct:xen_domctl_bind_pt_irq
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