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/src/sys/lib/libgnuefi/
H A DMakefile.inc1.5 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.5 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.5 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.5 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.3 Tue Mar 22 08:25:23 GMT 2016 mrg branches: 1.3.2; 1.3.4;
remove a bunch of "@echo done" from the tail of rules. these messages
were vaguely useful back when we didn't run make -j, but now you end
up with a single line "done" every so often, with no idea what it is
for. very few other targets claim they're done so just remove these.
1.1 Mon Apr 28 19:09:29 GMT 2014 jakllsch branches: 1.1.2; 1.1.4; 1.1.6; 1.1.10; 1.1.12;
Makefile glue to build libgnuefi; similar to libsa or libkern.
/src/sys/arch/hppa/spmath/
H A DMakefile.inc1.10 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.10 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.10 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.10 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.8 Mon Jan 25 18:55:25 GMT 2016 christos use :Q to quote variables properly.
1.3 Sun Dec 11 00:17:40 GMT 2005 christos branches: 1.3.2; 1.3.4; 1.3.6;
merge ktrace-lwp.
1.1 Wed Jun 05 01:04:24 GMT 2002 fredette branches: 1.1.2; 1.1.4; 1.1.10;
Added files to support generic HP PA-RISC based machines. hp700-specific
files to follow.
/src/sys/crypto/aes/arch/x86/
H A Dfiles.aessse21.3 Sun Nov 23 22:48:27 GMT 2025 riastradh aes(9): Rewrite x86 SSE2 implementation.

This computes eight AES_k instances simultaneously, using the
bitsliced 32-bit aes_ct logic which computes two blocks at a time in
uint32_t arithmetic, vectorized four ways.

Previously, the SSE2 code was a very naive adaptation of aes_ct64,
which computes four blocks at a time in uint64_t arithmetic, without
any 2x vectorization -- I did it at the time because:

(a) it was easier to get working,
(b) it only affects really old hardware with neither AES-NI nor SSSE3
which are both much much faster.

But it was bugging me that this was a kind of dumb use of SSE2.

Substantially reduces stack usage (from ~1200 bytes to ~800 bytes)
and should approximately double throughput for CBC decryption and for
XTS encryption/decryption.

I also tried a 2x64 version but cursory performance measurements
didn't reveal much benefit over 4x32. (If anyone is interested in
doing more serious performance measurements, on ancient hardware for
which it might matter, I also have the 2x64 code around.)

Prompted by:

PR kern/59774: bearssl 32-bit AES is too slow, want 64-bit optimized
version in kernel
1.1 Mon Jun 29 23:47:54 GMT 2020 riastradh New SSE2-based bitsliced AES implementation.

This should work on essentially all x86 CPUs of the last two decades,
and may improve throughput over the portable C aes_ct implementation
from BearSSL by

(a) reducing the number of vector operations in sequence, and
(b) batching four rather than two blocks in parallel.

Derived from BearSSL'S aes_ct64 implementation adjusted so that where
aes_ct64 uses 64-bit q[0],...,q[7], aes_sse2 uses (q[0], q[4]), ...,
(q[3], q[7]), each tuple representing a pair of 64-bit quantities
stacked in a single 128-bit register. This translation was done very
naively, and mostly reduces the cost of ShiftRows and data movement
without doing anything to address the S-box or (Inv)MixColumns, which
spread all 64-bit quantities across separate registers and ignore the
upper halves.

Unfortunately, SSE2 -- which is all that is guaranteed on all amd64
CPUs -- doesn't have PSHUFB, which would help out a lot more. For
example, vpaes relies on that. Perhaps there are enough CPUs out
there with PSHUFB but not AES-NI to make it worthwhile to import or
adapt vpaes too.

Note: This includes local definitions of various Intel compiler
intrinsics for gcc and clang in terms of their __builtin_* &c.,
because the necessary header files are not available during the
kernel build. This is a kludge -- we should fix it properly; the
present approach is expedient but not ideal.
1.1 Mon Jun 29 23:47:54 GMT 2020 riastradh New SSE2-based bitsliced AES implementation.

This should work on essentially all x86 CPUs of the last two decades,
and may improve throughput over the portable C aes_ct implementation
from BearSSL by

(a) reducing the number of vector operations in sequence, and
(b) batching four rather than two blocks in parallel.

Derived from BearSSL'S aes_ct64 implementation adjusted so that where
aes_ct64 uses 64-bit q[0],...,q[7], aes_sse2 uses (q[0], q[4]), ...,
(q[3], q[7]), each tuple representing a pair of 64-bit quantities
stacked in a single 128-bit register. This translation was done very
naively, and mostly reduces the cost of ShiftRows and data movement
without doing anything to address the S-box or (Inv)MixColumns, which
spread all 64-bit quantities across separate registers and ignore the
upper halves.

Unfortunately, SSE2 -- which is all that is guaranteed on all amd64
CPUs -- doesn't have PSHUFB, which would help out a lot more. For
example, vpaes relies on that. Perhaps there are enough CPUs out
there with PSHUFB but not AES-NI to make it worthwhile to import or
adapt vpaes too.

Note: This includes local definitions of various Intel compiler
intrinsics for gcc and clang in terms of their __builtin_* &c.,
because the necessary header files are not available during the
kernel build. This is a kludge -- we should fix it properly; the
present approach is expedient but not ideal.
1.1 Mon Jun 29 23:47:54 GMT 2020 riastradh New SSE2-based bitsliced AES implementation.

This should work on essentially all x86 CPUs of the last two decades,
and may improve throughput over the portable C aes_ct implementation
from BearSSL by

(a) reducing the number of vector operations in sequence, and
(b) batching four rather than two blocks in parallel.

Derived from BearSSL'S aes_ct64 implementation adjusted so that where
aes_ct64 uses 64-bit q[0],...,q[7], aes_sse2 uses (q[0], q[4]), ...,
(q[3], q[7]), each tuple representing a pair of 64-bit quantities
stacked in a single 128-bit register. This translation was done very
naively, and mostly reduces the cost of ShiftRows and data movement
without doing anything to address the S-box or (Inv)MixColumns, which
spread all 64-bit quantities across separate registers and ignore the
upper halves.

Unfortunately, SSE2 -- which is all that is guaranteed on all amd64
CPUs -- doesn't have PSHUFB, which would help out a lot more. For
example, vpaes relies on that. Perhaps there are enough CPUs out
there with PSHUFB but not AES-NI to make it worthwhile to import or
adapt vpaes too.

Note: This includes local definitions of various Intel compiler
intrinsics for gcc and clang in terms of their __builtin_* &c.,
because the necessary header files are not available during the
kernel build. This is a kludge -- we should fix it properly; the
present approach is expedient but not ideal.
1.1 Mon Jun 29 23:47:54 GMT 2020 riastradh New SSE2-based bitsliced AES implementation.

This should work on essentially all x86 CPUs of the last two decades,
and may improve throughput over the portable C aes_ct implementation
from BearSSL by

(a) reducing the number of vector operations in sequence, and
(b) batching four rather than two blocks in parallel.

Derived from BearSSL'S aes_ct64 implementation adjusted so that where
aes_ct64 uses 64-bit q[0],...,q[7], aes_sse2 uses (q[0], q[4]), ...,
(q[3], q[7]), each tuple representing a pair of 64-bit quantities
stacked in a single 128-bit register. This translation was done very
naively, and mostly reduces the cost of ShiftRows and data movement
without doing anything to address the S-box or (Inv)MixColumns, which
spread all 64-bit quantities across separate registers and ignore the
upper halves.

Unfortunately, SSE2 -- which is all that is guaranteed on all amd64
CPUs -- doesn't have PSHUFB, which would help out a lot more. For
example, vpaes relies on that. Perhaps there are enough CPUs out
there with PSHUFB but not AES-NI to make it worthwhile to import or
adapt vpaes too.

Note: This includes local definitions of various Intel compiler
intrinsics for gcc and clang in terms of their __builtin_* &c.,
because the necessary header files are not available during the
kernel build. This is a kludge -- we should fix it properly; the
present approach is expedient but not ideal.
1.1 Mon Jun 29 23:47:54 GMT 2020 riastradh New SSE2-based bitsliced AES implementation.

This should work on essentially all x86 CPUs of the last two decades,
and may improve throughput over the portable C aes_ct implementation
from BearSSL by

(a) reducing the number of vector operations in sequence, and
(b) batching four rather than two blocks in parallel.

Derived from BearSSL'S aes_ct64 implementation adjusted so that where
aes_ct64 uses 64-bit q[0],...,q[7], aes_sse2 uses (q[0], q[4]), ...,
(q[3], q[7]), each tuple representing a pair of 64-bit quantities
stacked in a single 128-bit register. This translation was done very
naively, and mostly reduces the cost of ShiftRows and data movement
without doing anything to address the S-box or (Inv)MixColumns, which
spread all 64-bit quantities across separate registers and ignore the
upper halves.

Unfortunately, SSE2 -- which is all that is guaranteed on all amd64
CPUs -- doesn't have PSHUFB, which would help out a lot more. For
example, vpaes relies on that. Perhaps there are enough CPUs out
there with PSHUFB but not AES-NI to make it worthwhile to import or
adapt vpaes too.

Note: This includes local definitions of various Intel compiler
intrinsics for gcc and clang in terms of their __builtin_* &c.,
because the necessary header files are not available during the
kernel build. This is a kludge -- we should fix it properly; the
present approach is expedient but not ideal.
1.1 Mon Jun 29 23:47:54 GMT 2020 riastradh New SSE2-based bitsliced AES implementation.

This should work on essentially all x86 CPUs of the last two decades,
and may improve throughput over the portable C aes_ct implementation
from BearSSL by

(a) reducing the number of vector operations in sequence, and
(b) batching four rather than two blocks in parallel.

Derived from BearSSL'S aes_ct64 implementation adjusted so that where
aes_ct64 uses 64-bit q[0],...,q[7], aes_sse2 uses (q[0], q[4]), ...,
(q[3], q[7]), each tuple representing a pair of 64-bit quantities
stacked in a single 128-bit register. This translation was done very
naively, and mostly reduces the cost of ShiftRows and data movement
without doing anything to address the S-box or (Inv)MixColumns, which
spread all 64-bit quantities across separate registers and ignore the
upper halves.

Unfortunately, SSE2 -- which is all that is guaranteed on all amd64
CPUs -- doesn't have PSHUFB, which would help out a lot more. For
example, vpaes relies on that. Perhaps there are enough CPUs out
there with PSHUFB but not AES-NI to make it worthwhile to import or
adapt vpaes too.

Note: This includes local definitions of various Intel compiler
intrinsics for gcc and clang in terms of their __builtin_* &c.,
because the necessary header files are not available during the
kernel build. This is a kludge -- we should fix it properly; the
present approach is expedient but not ideal.
1.1 Mon Jun 29 23:47:54 GMT 2020 riastradh New SSE2-based bitsliced AES implementation.

This should work on essentially all x86 CPUs of the last two decades,
and may improve throughput over the portable C aes_ct implementation
from BearSSL by

(a) reducing the number of vector operations in sequence, and
(b) batching four rather than two blocks in parallel.

Derived from BearSSL'S aes_ct64 implementation adjusted so that where
aes_ct64 uses 64-bit q[0],...,q[7], aes_sse2 uses (q[0], q[4]), ...,
(q[3], q[7]), each tuple representing a pair of 64-bit quantities
stacked in a single 128-bit register. This translation was done very
naively, and mostly reduces the cost of ShiftRows and data movement
without doing anything to address the S-box or (Inv)MixColumns, which
spread all 64-bit quantities across separate registers and ignore the
upper halves.

Unfortunately, SSE2 -- which is all that is guaranteed on all amd64
CPUs -- doesn't have PSHUFB, which would help out a lot more. For
example, vpaes relies on that. Perhaps there are enough CPUs out
there with PSHUFB but not AES-NI to make it worthwhile to import or
adapt vpaes too.

Note: This includes local definitions of various Intel compiler
intrinsics for gcc and clang in terms of their __builtin_* &c.,
because the necessary header files are not available during the
kernel build. This is a kludge -- we should fix it properly; the
present approach is expedient but not ideal.
/src/sys/arch/ia64/stand/efi/libefi/
H A DMakefile.inc1.5 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.5 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.5 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.5 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.1 Fri Apr 07 14:21:32 GMT 2006 cherry branches: 1.1.2; 1.1.4; 1.1.6; 1.1.10; 1.1.14; 1.1.20; 1.1.78;
Initial import of arch/ia64 sources.
These sources are ported from FreeBSD/ia64 code.
See individual source files for credits.
In addition, code from NetBSD/alpha NetBSD/sparc64,
NetBSD/i386 and NetBSD/amd64 were used as templates,
along with my own additions.
/src/sys/crypto/aes/
H A Daes.h1.2 Mon Jun 29 23:47:54 GMT 2020 riastradh New SSE2-based bitsliced AES implementation.

This should work on essentially all x86 CPUs of the last two decades,
and may improve throughput over the portable C aes_ct implementation
from BearSSL by

(a) reducing the number of vector operations in sequence, and
(b) batching four rather than two blocks in parallel.

Derived from BearSSL'S aes_ct64 implementation adjusted so that where
aes_ct64 uses 64-bit q[0],...,q[7], aes_sse2 uses (q[0], q[4]), ...,
(q[3], q[7]), each tuple representing a pair of 64-bit quantities
stacked in a single 128-bit register. This translation was done very
naively, and mostly reduces the cost of ShiftRows and data movement
without doing anything to address the S-box or (Inv)MixColumns, which
spread all 64-bit quantities across separate registers and ignore the
upper halves.

Unfortunately, SSE2 -- which is all that is guaranteed on all amd64
CPUs -- doesn't have PSHUFB, which would help out a lot more. For
example, vpaes relies on that. Perhaps there are enough CPUs out
there with PSHUFB but not AES-NI to make it worthwhile to import or
adapt vpaes too.

Note: This includes local definitions of various Intel compiler
intrinsics for gcc and clang in terms of their __builtin_* &c.,
because the necessary header files are not available during the
kernel build. This is a kludge -- we should fix it properly; the
present approach is expedient but not ideal.
1.2 Mon Jun 29 23:47:54 GMT 2020 riastradh New SSE2-based bitsliced AES implementation.

This should work on essentially all x86 CPUs of the last two decades,
and may improve throughput over the portable C aes_ct implementation
from BearSSL by

(a) reducing the number of vector operations in sequence, and
(b) batching four rather than two blocks in parallel.

Derived from BearSSL'S aes_ct64 implementation adjusted so that where
aes_ct64 uses 64-bit q[0],...,q[7], aes_sse2 uses (q[0], q[4]), ...,
(q[3], q[7]), each tuple representing a pair of 64-bit quantities
stacked in a single 128-bit register. This translation was done very
naively, and mostly reduces the cost of ShiftRows and data movement
without doing anything to address the S-box or (Inv)MixColumns, which
spread all 64-bit quantities across separate registers and ignore the
upper halves.

Unfortunately, SSE2 -- which is all that is guaranteed on all amd64
CPUs -- doesn't have PSHUFB, which would help out a lot more. For
example, vpaes relies on that. Perhaps there are enough CPUs out
there with PSHUFB but not AES-NI to make it worthwhile to import or
adapt vpaes too.

Note: This includes local definitions of various Intel compiler
intrinsics for gcc and clang in terms of their __builtin_* &c.,
because the necessary header files are not available during the
kernel build. This is a kludge -- we should fix it properly; the
present approach is expedient but not ideal.
1.2 Mon Jun 29 23:47:54 GMT 2020 riastradh New SSE2-based bitsliced AES implementation.

This should work on essentially all x86 CPUs of the last two decades,
and may improve throughput over the portable C aes_ct implementation
from BearSSL by

(a) reducing the number of vector operations in sequence, and
(b) batching four rather than two blocks in parallel.

Derived from BearSSL'S aes_ct64 implementation adjusted so that where
aes_ct64 uses 64-bit q[0],...,q[7], aes_sse2 uses (q[0], q[4]), ...,
(q[3], q[7]), each tuple representing a pair of 64-bit quantities
stacked in a single 128-bit register. This translation was done very
naively, and mostly reduces the cost of ShiftRows and data movement
without doing anything to address the S-box or (Inv)MixColumns, which
spread all 64-bit quantities across separate registers and ignore the
upper halves.

Unfortunately, SSE2 -- which is all that is guaranteed on all amd64
CPUs -- doesn't have PSHUFB, which would help out a lot more. For
example, vpaes relies on that. Perhaps there are enough CPUs out
there with PSHUFB but not AES-NI to make it worthwhile to import or
adapt vpaes too.

Note: This includes local definitions of various Intel compiler
intrinsics for gcc and clang in terms of their __builtin_* &c.,
because the necessary header files are not available during the
kernel build. This is a kludge -- we should fix it properly; the
present approach is expedient but not ideal.
1.2 Mon Jun 29 23:47:54 GMT 2020 riastradh New SSE2-based bitsliced AES implementation.

This should work on essentially all x86 CPUs of the last two decades,
and may improve throughput over the portable C aes_ct implementation
from BearSSL by

(a) reducing the number of vector operations in sequence, and
(b) batching four rather than two blocks in parallel.

Derived from BearSSL'S aes_ct64 implementation adjusted so that where
aes_ct64 uses 64-bit q[0],...,q[7], aes_sse2 uses (q[0], q[4]), ...,
(q[3], q[7]), each tuple representing a pair of 64-bit quantities
stacked in a single 128-bit register. This translation was done very
naively, and mostly reduces the cost of ShiftRows and data movement
without doing anything to address the S-box or (Inv)MixColumns, which
spread all 64-bit quantities across separate registers and ignore the
upper halves.

Unfortunately, SSE2 -- which is all that is guaranteed on all amd64
CPUs -- doesn't have PSHUFB, which would help out a lot more. For
example, vpaes relies on that. Perhaps there are enough CPUs out
there with PSHUFB but not AES-NI to make it worthwhile to import or
adapt vpaes too.

Note: This includes local definitions of various Intel compiler
intrinsics for gcc and clang in terms of their __builtin_* &c.,
because the necessary header files are not available during the
kernel build. This is a kludge -- we should fix it properly; the
present approach is expedient but not ideal.
1.2 Mon Jun 29 23:47:54 GMT 2020 riastradh New SSE2-based bitsliced AES implementation.

This should work on essentially all x86 CPUs of the last two decades,
and may improve throughput over the portable C aes_ct implementation
from BearSSL by

(a) reducing the number of vector operations in sequence, and
(b) batching four rather than two blocks in parallel.

Derived from BearSSL'S aes_ct64 implementation adjusted so that where
aes_ct64 uses 64-bit q[0],...,q[7], aes_sse2 uses (q[0], q[4]), ...,
(q[3], q[7]), each tuple representing a pair of 64-bit quantities
stacked in a single 128-bit register. This translation was done very
naively, and mostly reduces the cost of ShiftRows and data movement
without doing anything to address the S-box or (Inv)MixColumns, which
spread all 64-bit quantities across separate registers and ignore the
upper halves.

Unfortunately, SSE2 -- which is all that is guaranteed on all amd64
CPUs -- doesn't have PSHUFB, which would help out a lot more. For
example, vpaes relies on that. Perhaps there are enough CPUs out
there with PSHUFB but not AES-NI to make it worthwhile to import or
adapt vpaes too.

Note: This includes local definitions of various Intel compiler
intrinsics for gcc and clang in terms of their __builtin_* &c.,
because the necessary header files are not available during the
kernel build. This is a kludge -- we should fix it properly; the
present approach is expedient but not ideal.
1.2 Mon Jun 29 23:47:54 GMT 2020 riastradh New SSE2-based bitsliced AES implementation.

This should work on essentially all x86 CPUs of the last two decades,
and may improve throughput over the portable C aes_ct implementation
from BearSSL by

(a) reducing the number of vector operations in sequence, and
(b) batching four rather than two blocks in parallel.

Derived from BearSSL'S aes_ct64 implementation adjusted so that where
aes_ct64 uses 64-bit q[0],...,q[7], aes_sse2 uses (q[0], q[4]), ...,
(q[3], q[7]), each tuple representing a pair of 64-bit quantities
stacked in a single 128-bit register. This translation was done very
naively, and mostly reduces the cost of ShiftRows and data movement
without doing anything to address the S-box or (Inv)MixColumns, which
spread all 64-bit quantities across separate registers and ignore the
upper halves.

Unfortunately, SSE2 -- which is all that is guaranteed on all amd64
CPUs -- doesn't have PSHUFB, which would help out a lot more. For
example, vpaes relies on that. Perhaps there are enough CPUs out
there with PSHUFB but not AES-NI to make it worthwhile to import or
adapt vpaes too.

Note: This includes local definitions of various Intel compiler
intrinsics for gcc and clang in terms of their __builtin_* &c.,
because the necessary header files are not available during the
kernel build. This is a kludge -- we should fix it properly; the
present approach is expedient but not ideal.
1.2 Mon Jun 29 23:47:54 GMT 2020 riastradh New SSE2-based bitsliced AES implementation.

This should work on essentially all x86 CPUs of the last two decades,
and may improve throughput over the portable C aes_ct implementation
from BearSSL by

(a) reducing the number of vector operations in sequence, and
(b) batching four rather than two blocks in parallel.

Derived from BearSSL'S aes_ct64 implementation adjusted so that where
aes_ct64 uses 64-bit q[0],...,q[7], aes_sse2 uses (q[0], q[4]), ...,
(q[3], q[7]), each tuple representing a pair of 64-bit quantities
stacked in a single 128-bit register. This translation was done very
naively, and mostly reduces the cost of ShiftRows and data movement
without doing anything to address the S-box or (Inv)MixColumns, which
spread all 64-bit quantities across separate registers and ignore the
upper halves.

Unfortunately, SSE2 -- which is all that is guaranteed on all amd64
CPUs -- doesn't have PSHUFB, which would help out a lot more. For
example, vpaes relies on that. Perhaps there are enough CPUs out
there with PSHUFB but not AES-NI to make it worthwhile to import or
adapt vpaes too.

Note: This includes local definitions of various Intel compiler
intrinsics for gcc and clang in terms of their __builtin_* &c.,
because the necessary header files are not available during the
kernel build. This is a kludge -- we should fix it properly; the
present approach is expedient but not ideal.
/src/sys/arch/sparc/fpu/
H A Dfpu_emu.h1.6 Thu Aug 07 16:29:37 GMT 2003 agc Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.
1.4 Thu Aug 03 18:32:07 GMT 2000 eeh branches: 1.4.4; 1.4.8;
Add fpu emulation instrumentation and fixup FCMP and FCMPE emulation for v9.
And rename the 128-bit `x' routines to `q' to match v9 terminology:
i - 32-bit int
x - 64-bit int
s - 32-bit fp
d - 64-bit fp
q - 128-bit fp
1.4 Thu Aug 03 18:32:07 GMT 2000 eeh branches: 1.4.4; 1.4.8;
Add fpu emulation instrumentation and fixup FCMP and FCMPE emulation for v9.
And rename the 128-bit `x' routines to `q' to match v9 terminology:
i - 32-bit int
x - 64-bit int
s - 32-bit fp
d - 64-bit fp
q - 128-bit fp
1.4 Thu Aug 03 18:32:07 GMT 2000 eeh branches: 1.4.4; 1.4.8;
Add fpu emulation instrumentation and fixup FCMP and FCMPE emulation for v9.
And rename the 128-bit `x' routines to `q' to match v9 terminology:
i - 32-bit int
x - 64-bit int
s - 32-bit fp
d - 64-bit fp
q - 128-bit fp
H A Dfpu_explode.c1.11 Thu Aug 07 16:29:37 GMT 2003 agc branches: 1.11.16; 1.11.24;
Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.
1.5 Thu Aug 03 18:32:08 GMT 2000 eeh branches: 1.5.4; 1.5.8;
Add fpu emulation instrumentation and fixup FCMP and FCMPE emulation for v9.
And rename the 128-bit `x' routines to `q' to match v9 terminology:
i - 32-bit int
x - 64-bit int
s - 32-bit fp
d - 64-bit fp
q - 128-bit fp
1.5 Thu Aug 03 18:32:08 GMT 2000 eeh branches: 1.5.4; 1.5.8;
Add fpu emulation instrumentation and fixup FCMP and FCMPE emulation for v9.
And rename the 128-bit `x' routines to `q' to match v9 terminology:
i - 32-bit int
x - 64-bit int
s - 32-bit fp
d - 64-bit fp
q - 128-bit fp
1.5 Thu Aug 03 18:32:08 GMT 2000 eeh branches: 1.5.4; 1.5.8;
Add fpu emulation instrumentation and fixup FCMP and FCMPE emulation for v9.
And rename the 128-bit `x' routines to `q' to match v9 terminology:
i - 32-bit int
x - 64-bit int
s - 32-bit fp
d - 64-bit fp
q - 128-bit fp
H A Dfpu_extern.h1.9 Mon Apr 28 20:23:36 GMT 2008 martin Remove clause 3 and 4 from TNF licenses

1.4 Thu Aug 03 18:32:08 GMT 2000 eeh branches: 1.4.4; 1.4.8;
Add fpu emulation instrumentation and fixup FCMP and FCMPE emulation for v9.
And rename the 128-bit `x' routines to `q' to match v9 terminology:
i - 32-bit int
x - 64-bit int
s - 32-bit fp
d - 64-bit fp
q - 128-bit fp

1.4 Thu Aug 03 18:32:08 GMT 2000 eeh branches: 1.4.4; 1.4.8;
Add fpu emulation instrumentation and fixup FCMP and FCMPE emulation for v9.
And rename the 128-bit `x' routines to `q' to match v9 terminology:
i - 32-bit int
x - 64-bit int
s - 32-bit fp
d - 64-bit fp
q - 128-bit fp

1.4 Thu Aug 03 18:32:08 GMT 2000 eeh branches: 1.4.4; 1.4.8;
Add fpu emulation instrumentation and fixup FCMP and FCMPE emulation for v9.
And rename the 128-bit `x' routines to `q' to match v9 terminology:
i - 32-bit int
x - 64-bit int
s - 32-bit fp
d - 64-bit fp
q - 128-bit fp

H A Dfpu_implode.c1.12 Thu Aug 07 16:29:37 GMT 2003 agc branches: 1.12.16; 1.12.24;
Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.
1.7 Thu Aug 03 18:32:08 GMT 2000 eeh branches: 1.7.4;
Add fpu emulation instrumentation and fixup FCMP and FCMPE emulation for v9.
And rename the 128-bit `x' routines to `q' to match v9 terminology:
i - 32-bit int
x - 64-bit int
s - 32-bit fp
d - 64-bit fp
q - 128-bit fp
1.7 Thu Aug 03 18:32:08 GMT 2000 eeh branches: 1.7.4;
Add fpu emulation instrumentation and fixup FCMP and FCMPE emulation for v9.
And rename the 128-bit `x' routines to `q' to match v9 terminology:
i - 32-bit int
x - 64-bit int
s - 32-bit fp
d - 64-bit fp
q - 128-bit fp
1.7 Thu Aug 03 18:32:08 GMT 2000 eeh branches: 1.7.4;
Add fpu emulation instrumentation and fixup FCMP and FCMPE emulation for v9.
And rename the 128-bit `x' routines to `q' to match v9 terminology:
i - 32-bit int
x - 64-bit int
s - 32-bit fp
d - 64-bit fp
q - 128-bit fp
/src/sys/dev/onewire/
H A DMakefile.onewiredevs1.2 Sun Oct 19 22:05:23 GMT 2008 apb Use ${TOOL_AWK} instead of ${AWK} or plain "awk" in make commands.
Pass AWK=${TOOL_AWK:Q} to shell scripts that use awk.

1.1 Fri Apr 07 18:55:22 GMT 2006 riz branches: 1.1.2; 1.1.4; 1.1.6; 1.1.10; 1.1.14; 1.1.20; 1.1.70; 1.1.74; 1.1.80;
Dallas Semiconductor 1-Wire bus support, from OpenBSD. Currently includes
gpioow(4), attaching a bit-banging driver via a GPIO pin. Also,
owtemp(4) which supports some of the 1-Wire temperature sensors, including
the DS18b20 and DS1920 - temperatures are returned via the envsys(4)
framework.

Original drivers by Alexander Yurchenko (grange@openbsd), with envsys(4)
support and a fix to the 1-wire search algorithm (for discovering
devices on the bus) by me.

As discussed on tech-kern earlier this week.

1.1 Fri Apr 07 18:55:22 GMT 2006 riz branches: 1.1.2; 1.1.4; 1.1.6; 1.1.10; 1.1.14; 1.1.20; 1.1.70; 1.1.74; 1.1.80;
Dallas Semiconductor 1-Wire bus support, from OpenBSD. Currently includes
gpioow(4), attaching a bit-banging driver via a GPIO pin. Also,
owtemp(4) which supports some of the 1-Wire temperature sensors, including
the DS18b20 and DS1920 - temperatures are returned via the envsys(4)
framework.

Original drivers by Alexander Yurchenko (grange@openbsd), with envsys(4)
support and a fix to the 1-wire search algorithm (for discovering
devices on the bus) by me.

As discussed on tech-kern earlier this week.

1.1 Fri Apr 07 18:55:22 GMT 2006 riz branches: 1.1.2; 1.1.4; 1.1.6; 1.1.10; 1.1.14; 1.1.20; 1.1.70; 1.1.74; 1.1.80;
Dallas Semiconductor 1-Wire bus support, from OpenBSD. Currently includes
gpioow(4), attaching a bit-banging driver via a GPIO pin. Also,
owtemp(4) which supports some of the 1-Wire temperature sensors, including
the DS18b20 and DS1920 - temperatures are returned via the envsys(4)
framework.

Original drivers by Alexander Yurchenko (grange@openbsd), with envsys(4)
support and a fix to the 1-wire search algorithm (for discovering
devices on the bus) by me.

As discussed on tech-kern earlier this week.

1.1 Fri Apr 07 18:55:22 GMT 2006 riz branches: 1.1.2; 1.1.4; 1.1.6; 1.1.10; 1.1.14; 1.1.20; 1.1.70; 1.1.74; 1.1.80;
Dallas Semiconductor 1-Wire bus support, from OpenBSD. Currently includes
gpioow(4), attaching a bit-banging driver via a GPIO pin. Also,
owtemp(4) which supports some of the 1-Wire temperature sensors, including
the DS18b20 and DS1920 - temperatures are returned via the envsys(4)
framework.

Original drivers by Alexander Yurchenko (grange@openbsd), with envsys(4)
support and a fix to the 1-wire search algorithm (for discovering
devices on the bus) by me.

As discussed on tech-kern earlier this week.

1.1 Fri Apr 07 18:55:22 GMT 2006 riz branches: 1.1.2; 1.1.4; 1.1.6; 1.1.10; 1.1.14; 1.1.20; 1.1.70; 1.1.74; 1.1.80;
Dallas Semiconductor 1-Wire bus support, from OpenBSD. Currently includes
gpioow(4), attaching a bit-banging driver via a GPIO pin. Also,
owtemp(4) which supports some of the 1-Wire temperature sensors, including
the DS18b20 and DS1920 - temperatures are returned via the envsys(4)
framework.

Original drivers by Alexander Yurchenko (grange@openbsd), with envsys(4)
support and a fix to the 1-wire search algorithm (for discovering
devices on the bus) by me.

As discussed on tech-kern earlier this week.

/src/sys/dev/pci/
H A Dnca_pci.c1.2 Mon Jan 30 19:41:22 GMT 2012 drochner Use pci_aprint_devinfo(9) instead of pci_devinfo+aprint_{normal,naive}
where it looks straightforward, and pci_aprint_devinfo_fancy in a few
others where drivers want to supply their own device names instead
of the pcidevs generated one. More complicated cases, where names
are composed at runtime, are left alone for now. It certainly makes
sense to simplify the drivers here rather than inventing a catch-all API.
This should serve as as example for new drivers, and also ensure
consistent output in the AB_QUIET ("boot -q") case. Also, it avoids
excessive stack usage where drivers attach child devices because the
buffer for the device name is not kept on the local stack anymore.

1.1 Thu Apr 01 04:04:11 GMT 2010 jakllsch branches: 1.1.2; 1.1.4; 1.1.6; 1.1.14; 1.1.18;
Add support for Domex 536 PCI SCSI controller to nca(4).
This truly remarkable chip is found on the Domex DMX-3191D SCSI adapter.

1.1 Thu Apr 01 04:04:11 GMT 2010 jakllsch branches: 1.1.2; 1.1.4; 1.1.6; 1.1.14; 1.1.18;
Add support for Domex 536 PCI SCSI controller to nca(4).
This truly remarkable chip is found on the Domex DMX-3191D SCSI adapter.

/src/sys/arch/zaurus/include/
H A Dtypes.h1.3 Fri Jan 12 13:06:11 GMT 2007 ober branches: 1.3.6; 1.3.14;
Update zaurus port to include TODR/TIMECOUNTER.
zaurus# ./timetest -A -t 600
Will test active counter and counters with positive quality from saost_count(q=100, f=3686400 Hz) clockinterrupt(q=0, f=100 Hz) dummy(q=-1000000, f=1000000 Hz)
Testing time for monotonicity of timecounter "saost_count" for 600 seconds...
claimed resolution 271 nsec (3690036.900369 Hz) or better, observed minimum non zero delta 2712 nsec
switching to timecounter "saost_count"...
Testing time for monotonicity of timecounter "saost_count" for 600 seconds...
claimed resolution 271 nsec (3690036.900369 Hz) or better, observed minimum non zero delta 2712 nsec
switching to timecounter "clockinterrupt"...
Testing time for monotonicity of timecounter "clockinterrupt" for 600 seconds...
claimed resolution 10000000 nsec (100.000000 Hz) or better, observed minimum non zero delta 9999999 nsec
TEST SUCCESSFUL

ok peter@

1.3 Fri Jan 12 13:06:11 GMT 2007 ober branches: 1.3.6; 1.3.14;
Update zaurus port to include TODR/TIMECOUNTER.
zaurus# ./timetest -A -t 600
Will test active counter and counters with positive quality from saost_count(q=100, f=3686400 Hz) clockinterrupt(q=0, f=100 Hz) dummy(q=-1000000, f=1000000 Hz)
Testing time for monotonicity of timecounter "saost_count" for 600 seconds...
claimed resolution 271 nsec (3690036.900369 Hz) or better, observed minimum non zero delta 2712 nsec
switching to timecounter "saost_count"...
Testing time for monotonicity of timecounter "saost_count" for 600 seconds...
claimed resolution 271 nsec (3690036.900369 Hz) or better, observed minimum non zero delta 2712 nsec
switching to timecounter "clockinterrupt"...
Testing time for monotonicity of timecounter "clockinterrupt" for 600 seconds...
claimed resolution 10000000 nsec (100.000000 Hz) or better, observed minimum non zero delta 9999999 nsec
TEST SUCCESSFUL

ok peter@

1.3 Fri Jan 12 13:06:11 GMT 2007 ober branches: 1.3.6; 1.3.14;
Update zaurus port to include TODR/TIMECOUNTER.
zaurus# ./timetest -A -t 600
Will test active counter and counters with positive quality from saost_count(q=100, f=3686400 Hz) clockinterrupt(q=0, f=100 Hz) dummy(q=-1000000, f=1000000 Hz)
Testing time for monotonicity of timecounter "saost_count" for 600 seconds...
claimed resolution 271 nsec (3690036.900369 Hz) or better, observed minimum non zero delta 2712 nsec
switching to timecounter "saost_count"...
Testing time for monotonicity of timecounter "saost_count" for 600 seconds...
claimed resolution 271 nsec (3690036.900369 Hz) or better, observed minimum non zero delta 2712 nsec
switching to timecounter "clockinterrupt"...
Testing time for monotonicity of timecounter "clockinterrupt" for 600 seconds...
claimed resolution 10000000 nsec (100.000000 Hz) or better, observed minimum non zero delta 9999999 nsec
TEST SUCCESSFUL

ok peter@

1.1 Sat Dec 16 05:48:39 GMT 2006 ober branches: 1.1.2; 1.1.4;
Zaurus Port from OpenBSD by Nonaka Kimihiro
OK gimpy

/src/sys/dev/acpi/
H A DMakefile.acpidevs1.5 Sun Oct 19 22:05:22 GMT 2008 apb Use ${TOOL_AWK} instead of ${AWK} or plain "awk" in make commands.
Pass AWK=${TOOL_AWK:Q} to shell scripts that use awk.

1.1 Sun Jan 05 22:33:53 GMT 2003 christos branches: 1.1.2; 1.1.4;
Infrastucture for ACPIVERBOSE

/src/sys/arch/sgimips/gio/
H A DMakefile.giodevs1.5 Sun Oct 19 22:05:21 GMT 2008 apb branches: 1.5.28; 1.5.38; 1.5.44;
Use ${TOOL_AWK} instead of ${AWK} or plain "awk" in make commands.
Pass AWK=${TOOL_AWK:Q} to shell scripts that use awk.

1.1 Wed Jun 14 16:50:58 GMT 2000 soren branches: 1.1.4; 1.1.6; 1.1.30;
Simple GIO glue.

/src/etc/rc.d/
H A Dfccache.in1.2 Wed Jun 15 13:42:46 GMT 2011 hans branches: 1.2.2;
remove -q argument, it is useless with Xorg and fails with XFree

1.1 Fri Feb 18 00:42:20 GMT 2011 jmcneill branches: 1.1.2; 1.1.4;
Add rc.d script to make sure the system fontconfig cache is up to date.

H A Dmakemandb1.4 Wed Aug 29 20:34:19 GMT 2012 wiz Use new makemandb -Q flag to be really quiet.

1.1 Tue Feb 07 19:13:30 GMT 2012 joerg branches: 1.1.2; 1.1.4;
Import the new apropos/whatis.

This code has been developed by Abhinav Upadhyay as part of Google's Summer
of Code 2011. It uses libmandoc to parse man pages and builds a Full
Text Index in a SQLite database. The combination of indexing the full
manual page, filtering out stop words and ranking individual matches
based on the section gives a much improved user experience.

The old makewhatis and friends are kept under MKMAKEMANDB=no for now.

/src/usr.bin/fmt/
H A Dbuffer.h1.5 Fri Oct 13 00:11:56 GMT 2017 christos Wse wide functions to avoid file corruption. Q+D because it does not
use wcwidth().

1.4 Mon Apr 28 20:24:12 GMT 2008 martin Remove clause 3 and 4 from TNF licenses

/src/usr.bin/kdump/
H A DMakefile.siginfo-c1.6 Sun Oct 19 22:05:23 GMT 2008 apb branches: 1.6.4;
Use ${TOOL_AWK} instead of ${AWK} or plain "awk" in make commands.
Pass AWK=${TOOL_AWK:Q} to shell scripts that use awk.

1.6 Sun Oct 19 22:05:23 GMT 2008 apb branches: 1.6.4;
Use ${TOOL_AWK} instead of ${AWK} or plain "awk" in make commands.
Pass AWK=${TOOL_AWK:Q} to shell scripts that use awk.

H A Dmksiginfos1.5 Sun Oct 19 22:10:05 GMT 2008 apb branches: 1.5.4;
In shell scripts invoked during a build, and in crunchgen, use ${AWK}
instead of plain "awk". The Makefiles that invoke these scripts
or programs will pass AWK=${HOST_AWK:Q}.

1.5 Sun Oct 19 22:10:05 GMT 2008 apb branches: 1.5.4;
In shell scripts invoked during a build, and in crunchgen, use ${AWK}
instead of plain "awk". The Makefiles that invoke these scripts
or programs will pass AWK=${HOST_AWK:Q}.

/src/sys/lib/libz/
H A DMakefile.inc1.17 Sun May 27 01:14:51 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.17 Sun May 27 01:14:51 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.17 Sun May 27 01:14:51 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.17 Sun May 27 01:14:51 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.9 Tue Dec 05 17:01:19 GMT 2000 sommerfeld branches: 1.9.2; 1.9.4;
Have recursive make invocations depend on the .MAKE pseudo-target so
make knows to handle them specially.
1.2 Thu Jan 23 22:29:09 GMT 1997 cgd branches: 1.2.4;
clean up substantially. Transform clean, depend, cleandir targets from ::
to :, so they can be used e.g. with <bsd.prog.mk>. Standardize variable
names used to configure kernel libraries.

Variables used by these Makefile.inc's are:

S must be set to the top of the 'sys' tree.
${LIB}DST may be set to the location of the directory where library
objects are to be built. Defaults to ${.OBJDIR}/lib/${lib}.
${LIB}_AS may be set to 'obj' to build a object from the library's
object files. (Otherwise, a library will be built.)
Defaults to 'library'.
${LIB}MISCMAKEFLAGS
Miscellaneous flags to be passed to the library's Makefile when
building. See library's Makefile for more details about
supported flags and their default values.

(where LIB is KERN, SA, or Z, and lib is kern, sa, or z, depending on which
library's Makefile.inc is being discussed.)
/src/sys/arch/m68k/fpsp/
H A DMakefile.inc1.21 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.21 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.21 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.21 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8
1.12 Tue Oct 02 06:34:52 GMT 2001 chs branches: 1.12.4; 1.12.36; 1.12.50; 1.12.52; 1.12.54;
support building fpsp with MAKEOBJDIRPREFIX.
1.5 Wed May 07 07:15:44 GMT 1997 mycroft branches: 1.5.4;
Add .MAKE to the .OBJDIR hacks, so they work with `make -n'.
/src/distrib/utils/embedded/files/
H A Dec2_init1.4 Tue Jul 20 19:31:23 GMT 2021 rhialto Extract just the random bits to feed to /dev/urandom.

This makes no difference in the randomness of the pool, but it improves
on the estimation (if any) of how many random bits were obtained.
Also make the ftp -q time out a bit longer since I got some time outs.

1.3 Thu Jul 15 19:03:17 GMT 2021 rhialto Add some OpenStack support.

I found that in the cloud I tried, by the time this script runs, there
is no default route in effect yet. That takes some 5 to 10 seconds
longer. So I added a retry loop, and to make that easier, changed the
order of queries. To make sure it doesn't wait ~forever for a
non-existent service I added the -q 1 option to ftp invocations.

I also added OpenStack-specific metadata which contains a different
random_seed of 512 bytes every time it is requested. See
https://github.com/openstack/nova/blob/master/nova/api/metadata/base.py#L355
It may not be trusted data but only in the strictest sense of the word.
The data can only be observed by people with access to the cloud's
overlay network for the particular VM.

1.1 Fri Nov 30 20:53:02 GMT 2018 jmcneill branches: 1.1.2; 1.1.4;
Add support for configuring Amazon.com EC2 SSH keys and hostnames. While
here, only set wscons=YES if a wsdisplay0 device is present.

/src/sys/arch/i386/stand/lib/
H A DMakefile.inc1.17 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8

1.17 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8

1.17 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8

1.17 Sun May 27 01:14:50 GMT 2018 christos - Introduce :q modifier for make variables and make it double escape $'s so
that passing variables to recursive makes with :q works as expected.
- Revert :Q to work as before.
- Adjust makefiles that use recursive make to use :q

Discussed on tech-toolchain@
XXX: pullup 8

1.9 Fri Sep 08 19:57:05 GMT 2000 tron branches: 1.9.4; 1.9.6;
Final fix to make this work without object directories again.

/src/sys/dev/usb/
H A Dauvitek.c1.13 Sun Mar 13 00:49:36 GMT 2022 riastradh auvitek(4): Fix i2c detach if attach failed.

While here, use config_detach_children.

Reported-by: syzbot+bf05898af6a53cb3b262@syzkaller.appspotmail.com
1.10 Sat Apr 23 10:15:31 GMT 2016 skrll Merge nick-nhusb

- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
1.10 Sat Apr 23 10:15:31 GMT 2016 skrll Merge nick-nhusb

- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
1.10 Sat Apr 23 10:15:31 GMT 2016 skrll Merge nick-nhusb

- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
1.9 Sat Aug 09 13:33:43 GMT 2014 jmcneill branches: 1.9.2; 1.9.4; 1.9.8;
remove unused mutex and cv
1.3 Tue Dec 28 04:02:33 GMT 2010 jmcneill branches: 1.3.6;
Hauppauge HVR-850 analog should be identical to HVR-950Q, so support it too
1.1 Mon Dec 27 15:42:11 GMT 2010 jmcneill add driver for the Auvitek AU0828 USB video controllers's analog video
capture functions:

auvitek0 at uhub6 port 2: AU0828
video0 at auvitek0: WinTV HVR-950Q
uaudio0 at auvitek0 port 2 configuration 1 interface 1
uaudio0: vendor 0x2040 product 0x7200, rev 2.00/0.05, addr 2
uaudio0: audio rev 1.00
audio1 at uaudio0: full duplex, playback, capture, independent
H A Dauvitekvar.h1.10 Sun Mar 13 00:49:36 GMT 2022 riastradh auvitek(4): Fix i2c detach if attach failed.

While here, use config_detach_children.

Reported-by: syzbot+bf05898af6a53cb3b262@syzkaller.appspotmail.com
1.9 Sat Apr 23 10:15:31 GMT 2016 skrll Merge nick-nhusb

- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
1.9 Sat Apr 23 10:15:31 GMT 2016 skrll Merge nick-nhusb

- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
1.9 Sat Apr 23 10:15:31 GMT 2016 skrll Merge nick-nhusb

- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
1.8 Sat Aug 09 13:33:43 GMT 2014 jmcneill branches: 1.8.2; 1.8.4; 1.8.8;
remove unused mutex and cv
1.2 Tue Dec 28 04:02:33 GMT 2010 jmcneill branches: 1.2.6;
Hauppauge HVR-850 analog should be identical to HVR-950Q, so support it too
1.1 Mon Dec 27 15:42:11 GMT 2010 jmcneill add driver for the Auvitek AU0828 USB video controllers's analog video
capture functions:

auvitek0 at uhub6 port 2: AU0828
video0 at auvitek0: WinTV HVR-950Q
uaudio0 at auvitek0 port 2 configuration 1 interface 1
uaudio0: vendor 0x2040 product 0x7200, rev 2.00/0.05, addr 2
uaudio0: audio rev 1.00
audio1 at uaudio0: full duplex, playback, capture, independent

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