| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_state_shaders.c | 2930 unsigned esgs_ring_size = max_gs_waves * 2 * wave_size * local in function:si_update_gs_ring_buffers
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_state_shaders.c | 3589 unsigned esgs_ring_size = local in function:si_update_gs_ring_buffers
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| H A D | si_shader.h | 735 unsigned esgs_ring_size; /* in bytes */ member in struct:gfx9_gs_info
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| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| H A D | radv_shader.h | 221 uint32_t esgs_ring_size; member in struct:gfx10_ngg_info
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| H A D | radv_pipeline.c | 2239 unsigned esgs_ring_size = local in function:radv_pipeline_init_gs_ring_state
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| H A D | radv_device.c | 3371 fill_geom_tess_rings(struct radv_queue * queue,uint32_t * map,bool add_sample_positions,uint32_t esgs_ring_size,struct radeon_winsys_bo * esgs_ring_bo,uint32_t gsvs_ring_size,struct radeon_winsys_bo * gsvs_ring_bo,uint32_t tess_factor_ring_size,uint32_t tess_offchip_ring_offset,uint32_t tess_offchip_ring_size,struct radeon_winsys_bo * tess_rings_bo) argument
3581 radv_emit_gs_ring_sizes(struct radv_queue * queue,struct radeon_cmdbuf * cs,struct radeon_winsys_bo * esgs_ring_bo,uint32_t esgs_ring_size,struct radeon_winsys_bo * gsvs_ring_bo,uint32_t gsvs_ring_size) argument
3743 radv_get_preamble_cs(struct radv_queue * queue,uint32_t scratch_size_per_wave,uint32_t scratch_waves,uint32_t compute_scratch_size_per_wave,uint32_t compute_scratch_waves,uint32_t esgs_ring_size,uint32_t gsvs_ring_size,bool needs_tess_rings,bool needs_gds,bool needs_gds_oa,bool needs_sample_positions,struct radeon_cmdbuf ** initial_full_flush_preamble_cs,struct radeon_cmdbuf ** initial_preamble_cs,struct radeon_cmdbuf ** continue_preamble_cs) argument
4399 uint32_t esgs_ring_size = 0, gsvs_ring_size = 0; local in function:radv_get_preambles
[all...] |
| H A D | radv_private.h | 673 uint32_t esgs_ring_size; member in struct:radv_queue
1799 unsigned esgs_ring_size; member in struct:radv_pipeline::__anon4674665a290a::__anon4674665a2a08
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| H A D | radv_pipeline.c | 1578 unsigned esgs_ring_size = max_gs_waves * 2 * wave_size * local in function:calculate_gs_ring_sizes
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| H A D | radv_device.c | 2086 fill_geom_tess_rings(struct radv_queue * queue,uint32_t * map,bool add_sample_positions,uint32_t esgs_ring_size,struct radeon_winsys_bo * esgs_ring_bo,uint32_t gsvs_ring_size,struct radeon_winsys_bo * gsvs_ring_bo,uint32_t tess_factor_ring_size,uint32_t tess_offchip_ring_offset,uint32_t tess_offchip_ring_size,struct radeon_winsys_bo * tess_rings_bo) argument
2301 radv_emit_gs_ring_sizes(struct radv_queue * queue,struct radeon_cmdbuf * cs,struct radeon_winsys_bo * esgs_ring_bo,uint32_t esgs_ring_size,struct radeon_winsys_bo * gsvs_ring_bo,uint32_t gsvs_ring_size) argument
2448 radv_get_preamble_cs(struct radv_queue * queue,uint32_t scratch_size,uint32_t compute_scratch_size,uint32_t esgs_ring_size,uint32_t gsvs_ring_size,bool needs_tess_rings,bool needs_sample_positions,struct radeon_cmdbuf ** initial_full_flush_preamble_cs,struct radeon_cmdbuf ** initial_preamble_cs,struct radeon_cmdbuf ** continue_preamble_cs) argument
2920 uint32_t esgs_ring_size = 0, gsvs_ring_size = 0; local in function:radv_QueueSubmit
[all...] |
| H A D | radv_private.h | 648 uint32_t esgs_ring_size; member in struct:radv_queue
1394 unsigned esgs_ring_size; member in struct:radv_pipeline::__anone2cea0a71a0a::__anone2cea0a71b08
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