| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/ir3/ |
| ir3_cache.h | 42 struct ir3_shader_state *vs, *hs, *ds, *gs, *fs; // 5 pointers member in struct:ir3_cache_key
62 struct ir3_shader_variant *vs, struct ir3_shader_variant *hs,
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a6xx/ |
| fd6_program.h | 43 struct ir3_shader_variant *hs; member in struct:fd6_program_state
|
| fd6_emit.h | 110 struct ir3_shader_variant *hs; member in struct:fd6_emit
|
| fd6_emit.c | 820 if (emit->hs) {
821 debug_assert(ir3_shader_nibo(emit->hs) == 0);
1007 const struct ir3_shader_variant *hs = emit->hs; local
1102 if (hs) {
1104 ring, emit, PIPE_SHADER_TESS_CTRL, hs);
|
| fd6_program.c | 290 OUT_RING(ring, COND(state->hs,
292 A6XX_HLSQ_HS_CNTL_CONSTLEN(state->hs->constlen)));
310 OUT_RING(ring, COND(state->hs,
312 A6XX_SP_HS_CONFIG_NIBO(ir3_shader_nibo(state->hs)) |
313 A6XX_SP_HS_CONFIG_NTEX(state->hs->num_samp) |
314 A6XX_SP_HS_CONFIG_NSAMP(state->hs->num_samp)));
376 const struct ir3_shader_variant *hs = state->hs; variable in typeref:struct:ir3_shader_variant
398 if (hs)
399 vs_primitive_regid = ir3_find_sysval_regid(hs, SYSTEM_VALUE_PRIMITIVE_ID)
[all...] |
| /xsrc/external/mit/xf86-video-mga/dist/src/ |
| mga_dac3026.c | 485 int hd, hs, he, ht, vd, vs, ve, vt, wd; local
564 hs = (mode->CrtcHSyncStart >> 3) - 1;
589 pReg->ExtVga[5] = (hs + he - ht) >> 1;
600 ((hs & 0x100) >> 6) |
621 pVga->CRTC[4] = hs;
|
| mga_dacG.c | 1133 int hd, hs, he, ht, vd, vs, ve, vt, wd; local
1364 hs = (mode->CrtcHSyncStart >> 3) - 1;
1389 pReg->ExtVga[5] = (hs + he - ht) >> 1;
1397 ((hs & 0x100) >> 6) |
1420 pVga->CRTC[4] = hs;
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/ |
| freedreno_context.h | 64 void *vs, *hs, *ds, *gs, *fs; member in struct:fd_program_stateobj
|
| /xsrc/external/mit/xedit/dist/lisp/ |
| write.c | 1669 static const char *hs[] = { local
1718 h = hs[(value % 100) / 10];
|
| /xsrc/external/mit/MesaLib.old/dist/src/freedreno/vulkan/ |
| tu_pipeline.c | 388 tu6_emit_hs_config(struct tu_cs *cs, const struct ir3_shader_variant *hs)
391 if (hs->instrlen)
399 tu_cs_emit(cs, hs->instrlen);
402 tu_cs_emit(cs, A6XX_HLSQ_HS_CNTL_CONSTLEN(align(hs->constlen, 4)));
900 const struct ir3_shader_variant *hs = local
923 tu6_emit_hs_config(cs, hs);
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| si_state.h | 159 struct si_pm4_state *hs; member in struct:si_state::__anon4064
|
| /xsrc/external/mit/xterm/dist/ |
| graphics.c | 1030 int hs; local
1041 hs = ((h + 59) / 60) % 6;
1052 x = (hs & 1) ? c : 0.0;
1055 switch (hs) {
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| si_state.h | 187 struct si_shader *hs; member in struct:si_state::si_state_named
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/vulkan/ |
| tu_pipeline.c | 673 const struct ir3_shader_variant *hs,
682 const uint32_t tess_coord_x_regid = hs ?
688 const uint32_t hs_rel_patch_regid = hs ?
689 ir3_find_sysval_regid(hs, SYSTEM_VALUE_REL_PATCH_ID_IR3) :
691 const uint32_t ds_rel_patch_regid = hs ?
694 const uint32_t hs_invocation_regid = hs ?
695 ir3_find_sysval_regid(hs, SYSTEM_VALUE_TCS_HEADER_IR3) :
700 const uint32_t vs_primitiveid_regid = hs ?
701 ir3_find_sysval_regid(hs, SYSTEM_VALUE_PRIMITIVE_ID) :
893 const struct ir3_shader_variant *hs,
1642 const struct ir3_shader_variant *hs = builder->variants[MESA_SHADER_TESS_CTRL]; local
2715 const struct ir3_shader_variant *hs = builder->variants[MESA_SHADER_TESS_CTRL]; local
[all...] |
