| /src/sys/arch/arm/nxp/ |
| imx6_gpc.c | 133 const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0; local
136 return intr_establish_xname(irq, ipl, level | mpsafe, func, arg,
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| imx_gpio.c | 246 const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0; local
251 level | mpsafe, func, arg, xname);
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| imx7_gpc.c | 171 imx7gpc_mask(struct imx7gpc_softc *sc, u_int irq, bool mpsafe)
177 for (u_int cpu = 0; cpu < (mpsafe ? ncpu : 1); cpu++) {
187 imx7gpc_unmask(struct imx7gpc_softc *sc, u_int irq, bool mpsafe)
193 for (u_int cpu = 0; cpu < (mpsafe ? ncpu : 1); cpu++) {
220 const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0; local
229 ih = intr_establish_xname(irq, ipl, level | mpsafe, func, arg, xname);
231 imx7gpc_unmask(sc, irq - 32, mpsafe == IST_MPSAFE);
242 const bool mpsafe = is->is_mpsafe; local
245 imx7gpc_mask(sc, irq - 32, mpsafe);
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| /src/sys/arch/x86/pci/ |
| pci_intr_machdep.c | 317 bool mpsafe; local
344 mpsafe = ((ih & MPSAFE_MASK) != 0);
347 mpsafe, xname);
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| pci_msi_machdep.c | 230 bool mpsafe; local
236 mpsafe = ((ih & MPSAFE_MASK) != 0);
239 mpsafe, xname);
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| /src/sys/dev/virtio/arch/x86/ |
| virtio_mmio_cmdline.c | 309 bool mpsafe; local
321 mpsafe = (0 != (vsc->sc_flags & VIRTIO_F_INTR_MPSAFE));
324 virtio_mmio_intr, msc, mpsafe, device_xname(vsc->sc_dev));
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| /src/sys/arch/arm/cortex/ |
| gic_v2m.c | 337 const int mpsafe = (ih & ARM_PCI_INTR_MPSAFE) ? IST_MPSAFE : 0; local
340 IST_EDGE | mpsafe, func, arg, xname);
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| /src/sys/arch/arm/fdt/ |
| gic_fdt.c | 262 const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0; local
272 firq->intr_mpsafe = mpsafe;
277 level | mpsafe, func, NULL, xname);
280 level | mpsafe, gic_fdt_intr, firq, xname);
302 if (firq->intr_mpsafe != mpsafe) {
304 "mpsafe/non-mpsafe\n");
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| gicv3_fdt.c | 362 const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0; local
372 firq->intr_mpsafe = mpsafe;
377 level | mpsafe, func, NULL, xname);
380 level | mpsafe, gicv3_fdt_intr, firq, xname);
402 if (firq->intr_mpsafe != mpsafe) {
404 "mpsafe/non-mpsafe\n");
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| /src/sys/arch/arm/imx/ |
| imx23_icoll.c | 300 const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0; local
302 return intr_establish_xname(irq, ipl, IST_LEVEL | mpsafe, func, arg,
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| /src/sys/arch/arm/samsung/ |
| exynos_combiner.c | 183 int irq, bool mpsafe, int (*func)(void *), void *arg)
191 n->irq_mpsafe = mpsafe;
247 const bool mpsafe = (flags & FDT_INTR_MPSAFE) != 0; local
276 entryp = exynos_combiner_new_irq(groupp, intr, mpsafe, func, arg);
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| /src/sys/arch/arm/sunxi/ |
| sunxi_intc.c | 148 const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0; local
150 return intr_establish_xname(irq, ipl, IST_LEVEL | mpsafe, func, arg,
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| /src/sys/arch/arm/ti/ |
| ti_omapintc.c | 195 const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0; local
196 return intr_establish_xname(irq, ipl, IST_LEVEL | mpsafe, func, arg,
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| /src/sys/arch/riscv/fdt/ |
| intc_fdt.c | 173 "cannot share irq between mpsafe/non-mpsafe\n");
213 const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0; local
215 return intc_intr_establish(sc, source, ipl, mpsafe, func, arg, xname);
282 bool mpsafe = local
291 if (!mpsafe) {
302 if (!mpsafe) {
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| /src/sys/arch/sparc/sparc/ |
| intr.c | 671 bool mpsafe; local
677 mpsafe = (classipl != IPL_VM) || maybe_mpsafe;
714 if (!mpsafe) {
772 bool mpsafe = (level != IPL_VM); local
803 if (!mpsafe) {
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| /src/sys/arch/xen/x86/ |
| xen_intr.c | 178 bool mpsafe = (known_mpsafe || level != IPL_VM); local
214 intrstr, xname, mpsafe);
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| /src/sys/rump/librump/rumpkern/ |
| intr.c | 150 bool mpsafe; local
165 mpsafe = si->si_flags & SI_MPSAFE;
178 if (!mpsafe)
181 if (!mpsafe)
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| /src/sys/arch/arm/acpi/ |
| acpi_pci_machdep.c | 550 const int mpsafe = (ih & ARM_PCI_INTR_MPSAFE) ? IST_MPSAFE : 0; local
575 return intr_establish_xname(pi->pi_irqbase + slot, ipl, IST_LEVEL | mpsafe,
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| /src/sys/kern/ |
| kern_timeout.c | 653 * The callout must be stopped, and must be MPSAFE.
827 int mpsafe, count, ticks, delta; local
858 mpsafe = (c->c_flags & CALLOUT_MPSAFE);
867 if (__predict_false(!mpsafe)) {
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| /src/sys/arch/arm/apple/ |
| apple_intc.c | 238 const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0; local
241 return intr_establish_xname(intno, ipl, IST_LEVEL | mpsafe,
254 void *ihn = intr_establish_xname(irq, ipl, IST_LEVEL | mpsafe,
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| apple_pcie.c | 687 const int mpsafe = (ih & ARM_PCI_INTR_MPSAFE) ? FDT_INTR_MPSAFE : 0; local
691 ipl, IST_LEVEL | (mpsafe ? IST_MPSAFE : 0), func, arg, xname);
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| /src/sys/arch/arm/broadcom/ |
| bcm2835_gpio.c | 428 const bool mpsafe = local
430 if (!mpsafe)
433 if (!mpsafe)
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| /src/sys/arch/arm/nvidia/ |
| tegra_pcie.c | 296 const int mpsafe = pcie_ih->ih_mpsafe; local
299 if (!mpsafe)
302 if (!mpsafe)
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| /src/sys/arch/arm/pic/ |
| pic.c | 359 const bool mpsafe = is->is_mpsafe; local
361 const bool mpsafe = true; local
363 if (!mpsafe) {
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| /src/sys/arch/arm/rockchip/ |
| rk_gpio.c | 333 uint32_t polarity, bool mpsafe, int (*func)(void *), void *arg)
348 eint->eint_mpsafe = mpsafe;
413 bool mpsafe = (flags & GPIO_INTR_MPSAFE) != 0; local
442 return rk_intr_enable(sc, pin, level, polarity, mpsafe, func, arg);
502 bool mpsafe = (irqmode & GPIO_INTR_MPSAFE) != 0; local
529 return rk_intr_enable(sc, pin, level, polarity, mpsafe, func, arg);
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