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    Searched defs:sc_wdcdev (Results 1 - 25 of 31) sorted by relevancy

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  /src/sys/arch/arm/gemini/
obio_wdc.c 57 struct wdc_softc sc_wdcdev; member in struct:wdc_obio_softc
109 sc->sc_wdcdev.sc_atac.atac_dev = self;
110 sc->sc_wdcdev.regs = wdr = &sc->wdc_regs;
133 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
135 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
137 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist;
138 sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
139 sc->sc_wdcdev.wdc_maxdrives = 2;
141 sc->ata_channel.ch_atac = &sc->sc_wdcdev.sc_atac;
151 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_NOIRQ
    [all...]
  /src/sys/arch/evbarm/iq31244/
wdc_obio.c 53 struct wdc_softc sc_wdcdev; member in struct:wdc_obio_softc
80 sc->sc_wdcdev.sc_atac.atac_dev = self;
81 sc->sc_wdcdev.regs = wdr = &sc->wdc_regs;
104 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
106 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
108 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist;
109 sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
110 sc->sc_wdcdev.wdc_maxdrives = 2;
112 sc->ata_channel.ch_atac = &sc->sc_wdcdev.sc_atac;
128 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_NOIRQ
    [all...]
  /src/sys/arch/evbarm/tsarm/
wdc_ts.c 50 struct wdc_softc sc_wdcdev; member in struct:wdc_ts_softc
77 sc->sc_wdcdev.sc_atac.atac_dev = self;
78 sc->sc_wdcdev.regs = wdr = &sc->wdc_regs;
101 sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA;
102 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
104 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
106 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist;
107 sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
108 sc->sc_wdcdev.wdc_maxdrives = 2;
110 sc->ata_channel.ch_atac = &sc->sc_wdcdev.sc_atac
    [all...]
  /src/sys/arch/amiga/dev/
efavar.h 49 struct wdc_softc sc_wdcdev; member in struct:efa_softc
wdc_amiga.c 55 struct wdc_softc sc_wdcdev; member in struct:wdc_amiga_softc
90 sc->sc_wdcdev.sc_atac.atac_dev = self;
91 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
129 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16;
130 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
132 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
133 sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
134 sc->sc_wdcdev.wdc_maxdrives = 2;
136 sc->sc_channel.ch_atac = &sc->sc_wdcdev.sc_atac;
wdc_buddha.c 53 struct wdc_softc sc_wdcdev; member in struct:wdc_buddha_softc
94 sc->sc_wdcdev.sc_atac.atac_dev = self;
112 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16;
113 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
114 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
115 sc->sc_wdcdev.sc_atac.atac_nchannels = nchannels;
116 sc->sc_wdcdev.wdc_maxdrives = 2;
118 wdc_allocate_regs(&sc->sc_wdcdev);
129 cp->ch_atac = &sc->sc_wdcdev.sc_atac;
188 nchannels = sc->sc_wdcdev.sc_atac.atac_nchannels
    [all...]
wdc_acafh.c 75 struct wdc_softc sc_wdcdev; member in struct:wdc_acafh_softc
120 sc->sc_wdcdev.sc_atac.atac_dev = self;
121 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16;
122 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
123 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
124 sc->sc_wdcdev.sc_atac.atac_nchannels = WDC_ACAFH_SLOTS;
125 sc->sc_wdcdev.wdc_maxdrives = 2;
126 sc->sc_wdcdev.cap = WDC_CAPABILITY_NO_AUXCTL;
128 wdc_allocate_regs(&sc->sc_wdcdev);
148 self = sc->sc_wdcdev.sc_atac.atac_dev
    [all...]
wdc_xsurf.c 75 struct wdc_softc sc_wdcdev; member in struct:wdc_xsurf_softc
128 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
129 sc->sc_wdcdev.sc_atac.atac_nchannels = WDC_XSURF_CHANNELS;
130 sc->sc_wdcdev.sc_atac.atac_dev = self;
131 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanarray;
132 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16;
133 sc->sc_wdcdev.wdc_maxdrives = 2;
135 sc->sc_wdcdev.cap = WDC_CAPABILITY_NO_AUXCTL;
138 wdc_allocate_regs(&sc->sc_wdcdev);
160 self = sc->sc_wdcdev.sc_atac.atac_dev
    [all...]
  /src/sys/arch/evbppc/mpc85xx/
wdc_obio.c 53 struct wdc_softc sc_wdcdev; member in struct:wdc_obio_softc
136 sc->sc_wdcdev.sc_atac.atac_dev = self;
137 sc->sc_wdcdev.regs = wdr;
143 //sc->sc_wdcdev.cap |= WDC_CAPABILITY_NO_EXTRA_RESETS;
144 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
146 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
148 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist;
149 sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
150 sc->sc_wdcdev.wdc_maxdrives = 2;
152 sc->ata_channel.ch_atac = &sc->sc_wdcdev.sc_atac
    [all...]
  /src/sys/arch/mmeye/dev/
wdc_mainbus.c 57 struct wdc_softc sc_wdcdev; member in struct:wdc_mainbus_softc
129 sc->sc_wdcdev.sc_atac.atac_dev = self;
130 sc->sc_wdcdev.regs = wdr = &sc->wdc_regs;
152 sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA;
153 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
155 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32;
157 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_ATA_NOSTREAM;
159 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_ATAPI_NOSTREAM;
161 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
163 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist
    [all...]
  /src/sys/dev/isapnp/
wdc_isapnp.c 54 struct wdc_softc sc_wdcdev; member in struct:wdc_isapnp_softc
110 sc->sc_wdcdev.sc_atac.atac_dev = self;
111 sc->sc_wdcdev.regs = wdr = &sc->wdc_regs;
146 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA;
147 sc->sc_wdcdev.dma_start = &wdc_isapnp_dma_start;
148 sc->sc_wdcdev.dma_finish = &wdc_isapnp_dma_finish;
152 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32;
153 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
155 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist;
156 sc->sc_wdcdev.sc_atac.atac_nchannels = 1
    [all...]
  /src/sys/dev/ofisa/
wdc_ofisa.c 60 struct wdc_softc sc_wdcdev; member in struct:wdc_ofisa_softc
110 sc->sc_wdcdev.sc_atac.atac_dev = self;
111 sc->sc_wdcdev.regs = wdr = &sc->wdc_regs;
158 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
160 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
161 sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
162 sc->sc_wdcdev.wdc_maxdrives = 2;
164 sc->sc_channel.ch_atac = &sc->sc_wdcdev.sc_atac;
  /src/sys/arch/acorn32/mainbus/
wdc_pioc.c 59 struct wdc_softc sc_wdcdev; member in struct:wdc_pioc_softc
147 sc->sc_wdcdev.sc_atac.atac_dev = self;
148 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
173 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
174 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
176 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
177 sc->sc_channel.ch_atac = &sc->sc_wdcdev.sc_atac;
178 sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
179 sc->sc_wdcdev.wdc_maxdrives = 2;
  /src/sys/arch/landisk/dev/
wdc_obio.c 49 struct wdc_softc sc_wdcdev; member in struct:wdc_obio_softc
132 sc->sc_wdcdev.sc_atac.atac_dev = self;
133 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
159 sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA;
160 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
161 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
163 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
164 sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
165 sc->sc_wdcdev.wdc_maxdrives = 2;
167 sc->sc_channel.ch_atac = &sc->sc_wdcdev.sc_atac
    [all...]
  /src/sys/arch/prep/pnpbus/
wdc_pnpbus.c 54 struct wdc_softc sc_wdcdev; member in struct:wdc_pnpbus_softc
104 sc->sc_wdcdev.sc_atac.atac_dev = self;
105 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
129 sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA;
130 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
131 if (device_cfdata(sc->sc_wdcdev.sc_atac.atac_dev)->cf_flags &
133 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32;
135 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
137 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
138 sc->sc_wdcdev.sc_atac.atac_nchannels = 1
    [all...]
  /src/sys/arch/mac68k/obio/
wdc_obio.c 68 struct wdc_softc sc_wdcdev; member in struct:wdc_obio_softc
142 sc->sc_wdcdev.sc_atac.atac_dev = self;
143 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
205 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_NOIRQ;
206 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
207 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
209 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
210 sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
211 sc->sc_wdcdev.wdc_maxdrives = 2;
213 chp->ch_atac = &sc->sc_wdcdev.sc_atac
    [all...]
  /src/sys/dev/isa/
wdc_isa.c 59 struct wdc_softc sc_wdcdev; member in struct:wdc_isa_softc
167 sc->sc_wdcdev.sc_atac.atac_dev = self;
168 sc->sc_wdcdev.regs = wdr = &sc->wdc_regs;
197 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA;
198 sc->sc_wdcdev.dma_arg = sc;
199 sc->sc_wdcdev.dma_init = wdc_isa_dma_init;
200 sc->sc_wdcdev.dma_start = wdc_isa_dma_start;
201 sc->sc_wdcdev.dma_finish = wdc_isa_dma_finish;
205 sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA;
206 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16
    [all...]
  /src/sys/arch/atari/dev/
wdc_mb.c 71 struct wdc_softc sc_wdcdev; member in struct:wdc_mb_softc
152 sc->sc_wdcdev.sc_atac.atac_dev = self;
153 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
190 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 |
192 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
193 sc->sc_wdcdev.sc_atac.atac_claim_hw = &claim_hw;
194 sc->sc_wdcdev.sc_atac.atac_free_hw = &free_hw;
196 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
197 sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
198 sc->sc_wdcdev.wdc_maxdrives = 2
    [all...]
  /src/sys/arch/acorn32/eb7500atx/
rside.c 112 struct wdc_softc sc_wdcdev; /* common wdc definitions */ member in struct:rside_softc
181 sc->sc_wdcdev.sc_atac.atac_dev = self;
182 sc->sc_wdcdev.regs = sc->sc_wdc_regs;
187 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
188 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
189 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanarray;
190 sc->sc_wdcdev.sc_atac.atac_nchannels = 2;
191 sc->sc_wdcdev.wdc_maxdrives = 2;
199 cp->ch_atac = &sc->sc_wdcdev.sc_atac;
  /src/sys/arch/dreamcast/dev/g1/
wdc_g1.c 54 struct wdc_softc sc_wdcdev; member in struct:wdc_g1_softc
116 sc->sc_wdcdev.sc_atac.atac_dev = self;
117 sc->sc_wdcdev.regs = wdr = &sc->wdc_regs;
138 sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA;
139 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
140 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
142 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist;
143 sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
144 sc->sc_wdcdev.wdc_maxdrives = 2;
145 sc->sc_wdcdev.reset = wdc_g1_do_reset
    [all...]
  /src/sys/arch/playstation2/dev/
wdc_spd.c 69 struct wdc_softc sc_wdcdev; member in struct:wdc_spd_softc
189 struct wdc_softc *wdc = &sc->sc_wdcdev;
194 sc->sc_wdcdev.sc_atac.atac_dev = self;
195 sc->sc_wdcdev.regs = &sc->sc_wdc_regs;
204 ch->ch_atac = &sc->sc_wdcdev.sc_atac;
  /src/sys/arch/mips/adm5120/dev/
wdc_extio.c 98 struct wdc_softc sc_wdcdev; member in struct:wdc_extio_softc
282 sc->sc_wdcdev.sc_atac.atac_dev = self;
284 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
285 chp->ch_atac = &sc->sc_wdcdev.sc_atac;
290 cf = device_cfdata(sc->sc_wdcdev.sc_atac.atac_dev);
293 sc->sc_wdcdev.sc_atac.atac_cap |= cf->cf_flags &
295 sc->sc_wdcdev.cap |= cf->cf_flags &
298 sc->sc_wdcdev.datain_pio = wdc_extio_datain;
299 sc->sc_wdcdev.dataout_pio = wdc_extio_dataout;
300 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0
    [all...]
  /src/sys/arch/acorn32/podulebus/
rapide.c 111 struct wdc_softc sc_wdcdev; /* common wdc definitions */ member in struct:rapide_softc
205 sc->sc_wdcdev.sc_atac.atac_dev = self;
210 sc->sc_wdcdev.regs = sc->sc_wdc_regs;
247 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32;
248 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
249 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanarray;
250 sc->sc_wdcdev.sc_atac.atac_nchannels = 2;
251 sc->sc_wdcdev.wdc_maxdrives = 2;
259 cp->ch_atac = &sc->sc_wdcdev.sc_atac;
simide.c 80 struct wdc_softc sc_wdcdev; /* common wdc definitions */ member in struct:simide_softc
169 sc->sc_wdcdev.sc_atac.atac_dev = self;
174 sc->sc_wdcdev.regs = sc->sc_wdc_regs;
246 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
247 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
248 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanarray;
249 sc->sc_wdcdev.sc_atac.atac_nchannels = 2;
250 sc->sc_wdcdev.wdc_maxdrives = 2;
258 cp->ch_atac = &sc->sc_wdcdev.sc_atac;
  /src/sys/dev/ic/
ninjaata32var.h 32 #define NJATA32NAME(sc) (device_xname(sc->sc_wdcdev.sc_atac.atac_dev))
55 struct wdc_softc sc_wdcdev; /* common wdc definitions */ member in struct:njata32_softc

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