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    Searched defs:vmid (Results 1 - 25 of 47) sorted by relevancy

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  /src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/
cik_event_interrupt.c 41 unsigned int vmid; local in function:cik_event_interrupt_isr
46 * VMID and PASID are not written into ih_ring_entry
57 vmid = f2g->read_vmid_from_vmfault_reg(dev->kgd);
58 ret = f2g->get_atc_vmid_pasid_mapping_info(dev->kgd, vmid, &pasid);
61 tmp_ihre->ring_id |= vmid << 8;
65 vmid >= dev->vm_info.first_vmid_kfd &&
66 vmid <= dev->vm_info.last_vmid_kfd;
70 vmid = (ihre->ring_id & 0x0000ff00) >> 8;
71 if (vmid < dev->vm_info.first_vmid_kfd ||
72 vmid > dev->vm_info.last_vmid_kfd
97 unsigned int vmid = (ihre->ring_id & 0x0000ff00) >> 8; local in function:cik_event_interrupt_wq
    [all...]
kfd_int_process_v9.c 38 uint16_t source_id, client_id, pasid, vmid; local in function:event_interrupt_isr_v9
42 vmid = SOC15_VMID_FROM_IH_ENTRY(ih_ring_entry);
43 if (vmid < dev->vm_info.first_vmid_kfd ||
44 vmid > dev->vm_info.last_vmid_kfd)
62 pasid = dev->dqm->vmid_pasid[vmid];
69 pr_debug("client id 0x%x, source id %d, vmid %d, pasid 0x%x. raw data:\n",
70 client_id, source_id, vmid, pasid);
94 uint16_t source_id, client_id, pasid, vmid; local in function:event_interrupt_wq_v9
100 vmid = SOC15_VMID_FROM_IH_ENTRY(ih_ring_entry);
117 info.vmid = vmid
    [all...]
kfd_dbgdev.c 239 unsigned int index, unsigned int vmid)
263 cntl->bitfields.vmid = (uint32_t) vmid;
283 /* taking the vmid for that process on the safe way using pdd */
308 &cntl, i, pdd->qpd.vmid);
312 pr_debug("\t\t%20s %08x\n", "vmid is :", pdd->qpd.vmid);
323 pr_debug("\t\t%20s %08x\n", "Control Vmid is :",
324 cntl.bitfields.vmid);
353 /* we do not control the vmid in DIQ mode, just a place holder *
354 unsigned int vmid = 0; local in function:dbgdev_address_watch_diq
768 unsigned int vmid; local in function:dbgdev_wave_reset_wavefronts
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
dcn20_hubbub.h 85 struct dcn20_vmid vmid[16]; member in struct:dcn20_hubbub
117 int vmid);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/modules/vmid/
vmid.c 1 /* $NetBSD: vmid.c,v 1.2 2021/12/18 23:45:08 riastradh Exp $ */
29 __KERNEL_RCSID(0, "$NetBSD: vmid.c,v 1.2 2021/12/18 23:45:08 riastradh Exp $");
46 static void add_ptb_to_table(struct core_vmid *core_vmid, unsigned int vmid, uint64_t ptb)
48 core_vmid->ptb_assigned_to_vmid[vmid] = ptb;
52 static void clear_entry_from_vmid_table(struct core_vmid *core_vmid, unsigned int vmid)
54 core_vmid->ptb_assigned_to_vmid[vmid] = 0;
70 // Return value of -1 indicates vmid table unitialized or ptb dne in the table
83 // Expected to be called only when there's an available vmid
99 unsigned int vmid = 0; local in function:mod_vmid_get_for_ptb
101 // Physical address gets vmid
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_job.h 40 #define AMDGPU_JOB_GET_VMID(job) ((job) ? (job)->vmid : 0)
56 unsigned vmid; member in struct:amdgpu_job
amdgpu_jpeg_v1_0.c 298 unsigned vmid = AMDGPU_JOB_GET_VMID(job); local in function:jpeg_v1_0_decode_ring_emit_ib
302 amdgpu_ring_write(ring, (vmid | (vmid << 4)));
306 amdgpu_ring_write(ring, (vmid | (vmid << 4)));
376 unsigned vmid, uint64_t pd_addr)
381 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
384 data0 = hub->ctx0_ptb_addr_lo32 + vmid * 2;
amdgpu_irq.h 52 unsigned vmid; member in struct:amdgpu_iv_entry
amdgpu_vce_v4_0.c 173 /* 2, update vmid of descriptor */
961 unsigned vmid = AMDGPU_JOB_GET_VMID(job); local in function:vce_v4_0_ring_emit_ib
964 amdgpu_ring_write(ring, vmid);
997 unsigned int vmid, uint64_t pd_addr)
1001 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
1004 vce_v4_0_emit_reg_wait(ring, hub->ctx0_ptb_addr_lo32 + vmid * 2,
amdgpu_gmc_v10_0.c 166 "[%s] page fault (src_id:%u ring:%u vmid:%u pasid:%u, "
169 entry->src_id, entry->ring_id, entry->vmid,
210 static uint32_t gmc_v10_0_get_invalidate_req(unsigned int vmid,
215 /* invalidate using legacy mode on vmid*/
217 PER_VMID_INVALIDATE_REQ, 1 << vmid);
247 uint8_t vmid, uint16_t *p_pasid)
252 + vmid);
260 * VMID 0 is the physical GPU addresses as used by the kernel.
265 static void gmc_v10_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,
270 u32 inv_req = gmc_v10_0_get_invalidate_req(vmid, flush_type)
417 int vmid, i; local in function:gmc_v10_0_flush_gpu_tlb_pasid
    [all...]
amdgpu_jpeg_v2_0.c 556 unsigned vmid = AMDGPU_JOB_GET_VMID(job); local in function:jpeg_v2_0_dec_ring_emit_ib
560 amdgpu_ring_write(ring, (vmid | (vmid << 4)));
564 amdgpu_ring_write(ring, (vmid | (vmid << 4)));
630 unsigned vmid, uint64_t pd_addr)
635 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
638 data0 = hub->ctx0_ptb_addr_lo32 + vmid * 2;
amdgpu_si_dma.c 73 unsigned vmid = AMDGPU_JOB_GET_VMID(job); local in function:si_dma_ring_emit_ib
79 amdgpu_ring_write(ring, DMA_IB_PACKET(DMA_PACKET_INDIRECT_BUFFER, vmid, 0));
450 unsigned vmid, uint64_t pd_addr)
452 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
458 amdgpu_ring_write(ring, 1 << vmid); /* mask */
amdgpu_vce_v3_0.c 844 unsigned vmid = AMDGPU_JOB_GET_VMID(job); local in function:vce_v3_0_ring_emit_ib
847 amdgpu_ring_write(ring, vmid);
854 unsigned int vmid, uint64_t pd_addr)
857 amdgpu_ring_write(ring, vmid);
861 amdgpu_ring_write(ring, vmid);
amdgpu_amdkfd_gfx_v7.c 82 uint32_t vmid:4; member in struct:TCP_WATCH_CNTL_BITS::__anondd4ee9010408
123 uint32_t queue, uint32_t vmid)
126 uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue);
156 static void kgd_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t vmid,
164 lock_srbm(kgd, 0, 0, 0, vmid);
175 unsigned int vmid)
188 WREG32(mmATC_VMID0_PASID_MAPPING + vmid, pasid_mapping);
190 while (!(RREG32(mmATC_VMID_PASID_MAPPING_UPDATE_STATUS) & (1U << vmid)))
192 WREG32(mmATC_VMID_PASID_MAPPING_UPDATE_STATUS, 1U << vmid);
    [all...]
amdgpu_cik_sdma.c 232 unsigned vmid = AMDGPU_JOB_GET_VMID(job); local in function:cik_sdma_ring_emit_ib
233 u32 extra_bits = vmid & 0xf;
864 unsigned vmid, uint64_t pd_addr)
869 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
amdgpu_debugfs.c 115 unsigned instance_bank, sh_bank, se_bank, me, pipe, queue, vmid; local in function:amdgpu_debugfs_process_reg_op
118 instance_bank = sh_bank = se_bank = me = pipe = queue = vmid = 0;
144 vmid = (*pos & GENMASK_ULL(58, 54)) >> 54;
169 amdgpu_gfx_select_me_pipe_q(adev, me, pipe, queue, vmid);
amdgpu_gmc_v6_0.c 374 static void gmc_v6_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
377 WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid);
381 unsigned vmid, uint64_t pd_addr)
386 if (vmid < 8)
387 reg = mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + vmid;
389 reg = mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + (vmid - 8);
393 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid);
637 u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); local in function:gmc_v6_0_vm_decode_fault
646 dev_err(adev->dev, "VM fault (0x%02x, vmid %d) at page %u, %s from '%s' (0x%08x) (%d)\n"
    [all...]
amdgpu_gmc_v7_0.c 443 int vmid; local in function:gmc_v7_0_flush_gpu_tlb_pasid
449 for (vmid = 1; vmid < 16; vmid++) {
451 tmp = RREG32(mmATC_VMID0_PASID_MAPPING + vmid);
454 WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid);
465 * VMID 0 is the physical GPU addresses as used by the kernel.
474 * @vmid: vm instance to flush
478 static void gmc_v7_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
482 WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid);
785 u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); local in function:gmc_v7_0_vm_decode_fault
1291 u32 addr, status, mc_client, vmid; local in function:gmc_v7_0_process_interrupt
    [all...]
amdgpu_gmc_v8_0.c 644 int vmid; local in function:gmc_v8_0_flush_gpu_tlb_pasid
650 for (vmid = 1; vmid < 16; vmid++) {
652 tmp = RREG32(mmATC_VMID0_PASID_MAPPING + vmid);
655 WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid);
667 * VMID 0 is the physical GPU addresses as used by the kernel.
676 * @vmid: vm instance to flush
680 static void gmc_v8_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
684 WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid);
1023 u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); local in function:gmc_v8_0_vm_decode_fault
1457 u32 addr, status, mc_client, vmid; local in function:gmc_v8_0_process_interrupt
    [all...]
amdgpu_gmc_v9_0.c 358 "[%s] %s page fault (src_id:%u ring:%u vmid:%u "
361 entry->src_id, entry->ring_id, entry->vmid,
414 static uint32_t gmc_v9_0_get_invalidate_req(unsigned int vmid,
420 PER_VMID_INVALIDATE_REQ, 1 << vmid);
452 uint8_t vmid, uint16_t *p_pasid)
457 + vmid);
465 * VMID 0 is the physical GPU addresses as used by the kernel.
474 * @vmid: vm instance to flush
479 static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
490 inv_req = gmc_v9_0_get_invalidate_req(vmid, flush_type)
573 int vmid, i; local in function:gmc_v9_0_flush_gpu_tlb_pasid
    [all...]
amdgpu_sdma_v2_4.c 261 unsigned vmid = AMDGPU_JOB_GET_VMID(job); local in function:sdma_v2_4_ring_emit_ib
267 SDMA_PKT_INDIRECT_HEADER_VMID(vmid & 0xf));
805 unsigned vmid, uint64_t pd_addr)
807 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
amdgpu_uvd_v6_0.c 1001 unsigned vmid = AMDGPU_JOB_GET_VMID(job); local in function:uvd_v6_0_ring_emit_ib
1004 amdgpu_ring_write(ring, vmid);
1027 unsigned vmid = AMDGPU_JOB_GET_VMID(job); local in function:uvd_v6_0_enc_ring_emit_ib
1030 amdgpu_ring_write(ring, vmid);
1048 unsigned vmid, uint64_t pd_addr)
1050 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
1057 amdgpu_ring_write(ring, 1 << vmid); /* mask */
1108 unsigned int vmid, uint64_t pd_addr)
1111 amdgpu_ring_write(ring, vmid);
1115 amdgpu_ring_write(ring, vmid);
    [all...]
amdgpu_uvd_v7_0.c 730 /* 2, update vmid of descriptor */
1303 unsigned vmid = AMDGPU_JOB_GET_VMID(job); local in function:uvd_v7_0_ring_emit_ib
1307 amdgpu_ring_write(ring, vmid);
1333 unsigned vmid = AMDGPU_JOB_GET_VMID(job); local in function:uvd_v7_0_enc_ring_emit_ib
1336 amdgpu_ring_write(ring, vmid);
1378 unsigned vmid, uint64_t pd_addr)
1383 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
1386 data0 = hub->ctx0_ptb_addr_lo32 + vmid * 2;
1421 unsigned int vmid, uint64_t pd_addr)
1425 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr)
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
hubp.h 84 uint8_t vmid; member in struct:surface_flip_registers
  /src/sys/dev/rasops/
rasops.c 1319 int c, i, hmid, vmid, wi, he; local in function:rasops_make_box_chars_alpha
1326 vmid = (he + 1) >> 1;
1335 for (i = 0; i <= vmid; i++) {
1342 ddata = data + wi * vmid + hmid;
1343 for (i = vmid; i < he; i++) {
1350 ddata = data + wi * vmid + hmid;
1358 ddata = data + wi * vmid;

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