| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| rv740d.h | 116 #define CLKS(x) ((x) << 0)
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| rv6xxd.h | 161 # define CLKS(x) ((x) << 3)
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| radeon_rv740_dpm.c | 266 mpll_ss2 |= CLKS(clk_s);
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| rv770d.h | 273 #define CLKS(x) ((x) << 4)
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| radeon_rv6xx_dpm.c | 323 CLKS(clk_s), ~CLKS_MASK);
347 WREG32_P(CG_MPLL_SPREAD_SPECTRUM, CLKS(clk_s), ~CLKS_MASK);
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| nid.h | 693 #define CLKS(x) ((x) << 0)
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| cikd.h | 759 #define CLKS(x) ((x) << 0)
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| sid.h | 636 #define CLKS(x) ((x) << 0)
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| evergreend.h | 231 #define CLKS(x) ((x) << 0)
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| radeon_cypress_dpm.c | 575 mpll_ss2 |= CLKS(clk_s);
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| radeon_rv770_dpm.c | 552 cg_spll_spread_spectrum |= CLKS(clk_s);
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| radeon_ni_dpm.c | 2256 mpll_ss2 |= CLKS(clk_s);
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| radeon_ci_dpm.c | 2848 u32 clks = reference_clock * 5 / ss.rate; local in function:ci_calculate_mclk_params
2855 mpll_ss2 |= CLKS(clks);
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| radeon_si_dpm.c | 4932 u32 clks = reference_clock * 5 / ss.rate; local in function:si_populate_mclk_value
4939 mpll_ss2 |= CLKS(clks);
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| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| amdgpu_iceland_smumgr.c | 853 /* clks = reference_clock * 10 / (REFDIV + 1) / speed_spectrum_rate / 2 */
854 uint32_t clkS = reference_clock * 5 / (reference_divider * ss_info.speed_spectrum_rate);
857 uint32_t clkV = 4 * ss_info.speed_spectrum_percentage * fbdiv / (clkS * 10000);
860 PHM_SET_FIELD(cg_spll_spread_spectrum, CG_SPLL_SPREAD_SPECTRUM, CLKS, clkS);
1112 CLKS = NS - 1 = ISS_STEP_NUM[11:0]
1135 /* CLKS = reference_clock / (2 * speed_spectrum_rate * reference_divider) * 10 */
1137 uint32_t clks = reference_clock * 5 / ss_info.speed_spectrum_rate; local in function:iceland_calculate_mclk_params
1146 mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks);
[all...] |
| amdgpu_ci_smumgr.c | 356 CG_SPLL_SPREAD_SPECTRUM, CLKS, clk_s);
1090 uint32_t clks = reference_clock * 5 / ss_info.speed_spectrum_rate; local in function:ci_calculate_mclk_params
1096 mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks);
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| amdgpu_tonga_smumgr.c | 596 /* clks = reference_clock * 10 / (REFDIV + 1) / speed_spectrum_rate / 2 */
597 uint32_t clkS = reference_clock * 5 / (reference_divider * ss_info.speed_spectrum_rate);
600 uint32_t clkV = 4 * ss_info.speed_spectrum_percentage * fbdiv / (clkS * 10000);
603 PHM_SET_FIELD(cg_spll_spread_spectrum, CG_SPLL_SPREAD_SPECTRUM, CLKS, clkS);
864 CLKS = NS - 1 = ISS_STEP_NUM[11:0]
887 /* CLKS = reference_clock / (2 * speed_spectrum_rate * reference_divider) * 10 */
889 uint32_t clks = reference_clock * 5 / ss_info.speed_spectrum_rate; local in function:tonga_calculate_mclk_params
898 mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks);
[all...] |
| amdgpu_fiji_smumgr.c | 916 * clks = reference_clock * 10 / (REFDIV + 1) / speed_spectrum_rate / 2
925 CG_SPLL_SPREAD_SPECTRUM, CLKS, clk_s);
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| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| sid.h | 638 #define CLKS(x) ((x) << 0)
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| amdgpu_si_dpm.c | 5396 u32 clks = reference_clock * 5 / ss.rate; local in function:si_populate_mclk_value
5403 mpll_ss2 |= CLKS(clks);
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