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    Searched refs:CLK_TOP_AUD_1_SEL (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
mt6765-clk.h 150 #define CLK_TOP_AUD_1_SEL 113
mt8173-clk.h 121 #define CLK_TOP_AUD_1_SEL 109
mt2712-clk.h 158 #define CLK_TOP_AUD_1_SEL 125
mt8192-clk.h 61 #define CLK_TOP_AUD_1_SEL 47
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
mt8173.dtsi 882 assigned-clocks = <&topckgen CLK_TOP_AUD_1_SEL>,

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