Searched refs:CLK_TOP_MSDC30_1_SEL (Results 1 - 15 of 15) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dmt8135-clk.h83 #define CLK_TOP_MSDC30_1_SEL 70 macro
H A Dmt7629-clk.h98 #define CLK_TOP_MSDC30_1_SEL 86 macro
H A Dmt6765-clk.h147 #define CLK_TOP_MSDC30_1_SEL 110 macro
H A Dmt7622-clk.h83 #define CLK_TOP_MSDC30_1_SEL 69 macro
H A Dmt8173-clk.h109 #define CLK_TOP_MSDC30_1_SEL 97 macro
H A Dmediatek,mt6795-clk.h107 #define CLK_TOP_MSDC30_1_SEL 94 macro
H A Dmt2701-clk.h104 #define CLK_TOP_MSDC30_1_SEL 91 macro
H A Dmt2712-clk.h146 #define CLK_TOP_MSDC30_1_SEL 113 macro
H A Dmt8192-clk.h39 #define CLK_TOP_MSDC30_1_SEL 25 macro
H A Dmediatek,mt8365-clk.h87 #define CLK_TOP_MSDC30_1_SEL 75 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt7622-bananapi-bpi-r64.dts258 assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
H A Dmt7622-rfb1.dts240 assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
H A Dmt8365.dtsi674 clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>,
H A Dmt8192.dtsi1412 clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>,
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/mediatek/
H A Dmt7623.dtsi732 <&topckgen CLK_TOP_MSDC30_1_SEL>;

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