Searched refs:CLK_TOP_VDEC_SEL (Results 1 - 9 of 9) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dmt8135-clk.h95 #define CLK_TOP_VDEC_SEL 82 macro
H A Dmt8173-clk.h99 #define CLK_TOP_VDEC_SEL 87 macro
H A Dmediatek,mt6795-clk.h97 #define CLK_TOP_VDEC_SEL 84 macro
H A Dmt2701-clk.h95 #define CLK_TOP_VDEC_SEL 82 macro
H A Dmt2712-clk.h136 #define CLK_TOP_VDEC_SEL 103 macro
H A Dmt8192-clk.h66 #define CLK_TOP_VDEC_SEL 52 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt8192.dtsi637 clocks = <&topckgen CLK_TOP_VDEC_SEL>,
1719 clocks = <&topckgen CLK_TOP_VDEC_SEL>,
1725 assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>;
1745 clocks = <&topckgen CLK_TOP_VDEC_SEL>,
1751 assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>;
H A Dmt8173.dtsi1408 <&topckgen CLK_TOP_VDEC_SEL>,
1423 <&topckgen CLK_TOP_VDEC_SEL>,
H A Dmt2712e.dtsi290 <&topckgen CLK_TOP_VDEC_SEL>;

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