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    Searched refs:CcPwrDynRm (Results 1 - 14 of 14) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
smu71_discrete.h 64 uint32_t CcPwrDynRm;
94 uint32_t CcPwrDynRm;
102 uint32_t CcPwrDynRm;
smu7_discrete.h 120 uint32_t CcPwrDynRm;
152 uint32_t CcPwrDynRm;
160 uint32_t CcPwrDynRm;
smu72_discrete.h 62 uint32_t CcPwrDynRm;
90 uint32_t CcPwrDynRm;
97 uint32_t CcPwrDynRm;
smu73_discrete.h 60 uint32_t CcPwrDynRm;
88 uint32_t CcPwrDynRm;
95 uint32_t CcPwrDynRm;
smu74_discrete.h 92 uint32_t CcPwrDynRm;
115 uint32_t CcPwrDynRm;
124 uint32_t CcPwrDynRm;
smu75_discrete.h 92 uint32_t CcPwrDynRm;
120 uint32_t CcPwrDynRm;
129 uint32_t CcPwrDynRm;
  /src/sys/external/bsd/drm2/dist/drm/radeon/
smu7_discrete.h 120 uint32_t CcPwrDynRm;
152 uint32_t CcPwrDynRm;
160 uint32_t CcPwrDynRm;
radeon_ci_dpm.c 3040 table->ACPILevel.CcPwrDynRm = 0;
3052 table->ACPILevel.CcPwrDynRm = cpu_to_be32(table->ACPILevel.CcPwrDynRm);
3134 state->CcPwrDynRm = 0;
3158 state->CcPwrDynRm = cpu_to_be32(state->CcPwrDynRm);
3252 graphic_level->CcPwrDynRm = 0;
3276 graphic_level->CcPwrDynRm = cpu_to_be32(graphic_level->CcPwrDynRm);
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_fiji_smumgr.c 810 state->CcPwrDynRm = 0;
820 CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm);
972 level->CcPwrDynRm = 0;
1000 CONVERT_FROM_HOST_TO_SMC_UL(level->CcPwrDynRm);
1363 table->ACPILevel.CcPwrDynRm = 0;
1375 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm);
amdgpu_iceland_smumgr.c 726 state->CcPwrDynRm = 0;
756 CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm);
925 graphic_level->CcPwrDynRm = 0;
957 CONVERT_FROM_HOST_TO_SMC_UL(graphic_level->CcPwrDynRm);
1479 table->ACPILevel.CcPwrDynRm = 0;
1493 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm);
amdgpu_vegam_smumgr.c 550 state->CcPwrDynRm = 0;
559 CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm);
835 level->CcPwrDynRm = 0;
850 CONVERT_FROM_HOST_TO_SMC_UL(level->CcPwrDynRm);
1144 table->ACPILevel.CcPwrDynRm = 0;
1149 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm);
amdgpu_ci_smumgr.c 439 level->CcPwrDynRm = 0;
468 CONVERT_FROM_HOST_TO_SMC_UL(level->CcPwrDynRm);
957 state->CcPwrDynRm = 0;
987 CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm);
1431 table->ACPILevel.CcPwrDynRm = 0;
1444 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm);
amdgpu_polaris10_smumgr.c 746 state->CcPwrDynRm = 0;
758 CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm);
941 level->CcPwrDynRm = 0;
966 CONVERT_FROM_HOST_TO_SMC_UL(level->CcPwrDynRm);
1233 table->ACPILevel.CcPwrDynRm = 0;
1238 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm);
amdgpu_tonga_smumgr.c 490 state->CcPwrDynRm = 0;
499 CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm);
652 graphic_level->CcPwrDynRm = 0;
684 CONVERT_FROM_HOST_TO_SMC_UL(graphic_level->CcPwrDynRm);
1228 table->ACPILevel.CcPwrDynRm = 0;
1242 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm);

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