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Searched
refs:CcPwrDynRm1
(Results
1 - 14
of
14
) sorted by relevancy
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
smu71_discrete.h
65
uint32_t
CcPwrDynRm1
;
95
uint32_t
CcPwrDynRm1
;
103
uint32_t
CcPwrDynRm1
;
smu7_discrete.h
121
uint32_t
CcPwrDynRm1
;
153
uint32_t
CcPwrDynRm1
;
161
uint32_t
CcPwrDynRm1
;
smu72_discrete.h
63
uint32_t
CcPwrDynRm1
;
91
uint32_t
CcPwrDynRm1
;
98
uint32_t
CcPwrDynRm1
;
smu73_discrete.h
61
uint32_t
CcPwrDynRm1
;
89
uint32_t
CcPwrDynRm1
;
96
uint32_t
CcPwrDynRm1
;
smu74_discrete.h
93
uint32_t
CcPwrDynRm1
;
116
uint32_t
CcPwrDynRm1
;
125
uint32_t
CcPwrDynRm1
;
smu75_discrete.h
93
uint32_t
CcPwrDynRm1
;
121
uint32_t
CcPwrDynRm1
;
130
uint32_t
CcPwrDynRm1
;
/src/sys/external/bsd/drm2/dist/drm/radeon/
smu7_discrete.h
121
uint32_t
CcPwrDynRm1
;
153
uint32_t
CcPwrDynRm1
;
161
uint32_t
CcPwrDynRm1
;
radeon_ci_dpm.c
3041
table->ACPILevel.
CcPwrDynRm1
= 0;
3053
table->ACPILevel.
CcPwrDynRm1
= cpu_to_be32(table->ACPILevel.
CcPwrDynRm1
);
3135
state->
CcPwrDynRm1
= 0;
3159
state->
CcPwrDynRm1
= cpu_to_be32(state->
CcPwrDynRm1
);
3253
graphic_level->
CcPwrDynRm1
= 0;
3277
graphic_level->
CcPwrDynRm1
= cpu_to_be32(graphic_level->
CcPwrDynRm1
);
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_fiji_smumgr.c
811
state->
CcPwrDynRm1
= 0;
821
CONVERT_FROM_HOST_TO_SMC_UL(state->
CcPwrDynRm1
);
973
level->
CcPwrDynRm1
= 0;
1001
CONVERT_FROM_HOST_TO_SMC_UL(level->
CcPwrDynRm1
);
1364
table->ACPILevel.
CcPwrDynRm1
= 0;
1376
CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.
CcPwrDynRm1
);
amdgpu_iceland_smumgr.c
727
state->
CcPwrDynRm1
= 0;
757
CONVERT_FROM_HOST_TO_SMC_UL(state->
CcPwrDynRm1
);
926
graphic_level->
CcPwrDynRm1
= 0;
958
CONVERT_FROM_HOST_TO_SMC_UL(graphic_level->
CcPwrDynRm1
);
1480
table->ACPILevel.
CcPwrDynRm1
= 0;
1494
CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.
CcPwrDynRm1
);
amdgpu_vegam_smumgr.c
551
state->
CcPwrDynRm1
= 0;
560
CONVERT_FROM_HOST_TO_SMC_UL(state->
CcPwrDynRm1
);
836
level->
CcPwrDynRm1
= 0;
851
CONVERT_FROM_HOST_TO_SMC_UL(level->
CcPwrDynRm1
);
1145
table->ACPILevel.
CcPwrDynRm1
= 0;
1150
CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.
CcPwrDynRm1
);
amdgpu_ci_smumgr.c
440
level->
CcPwrDynRm1
= 0;
469
CONVERT_FROM_HOST_TO_SMC_UL(level->
CcPwrDynRm1
);
958
state->
CcPwrDynRm1
= 0;
988
CONVERT_FROM_HOST_TO_SMC_UL(state->
CcPwrDynRm1
);
1432
table->ACPILevel.
CcPwrDynRm1
= 0;
1445
CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.
CcPwrDynRm1
);
amdgpu_polaris10_smumgr.c
747
state->
CcPwrDynRm1
= 0;
759
CONVERT_FROM_HOST_TO_SMC_UL(state->
CcPwrDynRm1
);
942
level->
CcPwrDynRm1
= 0;
967
CONVERT_FROM_HOST_TO_SMC_UL(level->
CcPwrDynRm1
);
1234
table->ACPILevel.
CcPwrDynRm1
= 0;
1239
CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.
CcPwrDynRm1
);
amdgpu_tonga_smumgr.c
491
state->
CcPwrDynRm1
= 0;
500
CONVERT_FROM_HOST_TO_SMC_UL(state->
CcPwrDynRm1
);
653
graphic_level->
CcPwrDynRm1
= 0;
685
CONVERT_FROM_HOST_TO_SMC_UL(graphic_level->
CcPwrDynRm1
);
1229
table->ACPILevel.
CcPwrDynRm1
= 0;
1243
CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.
CcPwrDynRm1
);
Completed in 89 milliseconds
Indexes created Wed Oct 15 16:09:53 GMT 2025