| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| rv740d.h | 68 #define MCLK_PWRMGT_CNTL 0x648
|
| rv6xxd.h | 49 #define MCLK_PWRMGT_CNTL 0x624
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| radeon_rv740_dpm.c | 200 u32 mclk_pwrmgt_cntl = pi->clk_regs.rv770.mclk_pwrmgt_cntl; local in function:rv740_populate_mclk_value
273 mclk_pwrmgt_cntl &= ~DLL_SPEED_MASK;
274 mclk_pwrmgt_cntl |= DLL_SPEED(dll_speed);
281 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
312 pi->clk_regs.rv770.mclk_pwrmgt_cntl =
313 RREG32(MCLK_PWRMGT_CNTL);
330 u32 mclk_pwrmgt_cntl = pi->clk_regs.rv770.mclk_pwrmgt_cntl; local in function:rv740_populate_smc_acpi_state
355 mclk_pwrmgt_cntl |= (MRDCKA0_RESET
[all...] |
| radeon_rv770_dpm.c | 188 WREG32_P(MCLK_PWRMGT_CNTL, 0, ~MPLL_PWRMGT_OFF);
206 WREG32_P(MCLK_PWRMGT_CNTL, MPLL_PWRMGT_OFF, ~MPLL_PWRMGT_OFF);
404 u32 mclk_pwrmgt_cntl = local in function:rv770_populate_mclk_value
405 pi->clk_regs.rv770.mclk_pwrmgt_cntl;
482 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
938 u32 mclk_pwrmgt_cntl; local in function:rv770_populate_smc_acpi_state
970 mclk_pwrmgt_cntl = (MRDCKA0_RESET |
991 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
1044 cpu_to_be32(pi->clk_regs.rv770.mclk_pwrmgt_cntl);
1543 pi->clk_regs.rv770.mclk_pwrmgt_cntl
[all...] |
| radeon_r600_dpm.c | 319 WREG32_P(MCLK_PWRMGT_CNTL, 0, ~MPLL_PWRMGT_OFF);
321 WREG32_P(MCLK_PWRMGT_CNTL, MPLL_PWRMGT_OFF, ~MPLL_PWRMGT_OFF);
|
| rv770d.h | 173 #define MCLK_PWRMGT_CNTL 0x648
|
| radeon_cypress_dpm.c | 263 WREG32_P(MCLK_PWRMGT_CNTL, 0, ~MPLL_PWRMGT_OFF);
265 WREG32_P(MCLK_PWRMGT_CNTL, MPLL_PWRMGT_OFF, ~MPLL_PWRMGT_OFF);
494 u32 mclk_pwrmgt_cntl = local in function:cypress_populate_mclk_value
495 pi->clk_regs.rv770.mclk_pwrmgt_cntl;
582 mclk_pwrmgt_cntl &= ~DLL_SPEED_MASK;
583 mclk_pwrmgt_cntl |= DLL_SPEED(dll_speed);
585 mclk_pwrmgt_cntl |= (MRDCKA0_PDNB |
594 mclk_pwrmgt_cntl &= ~(MRDCKA0_PDNB |
608 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
1258 cpu_to_be32(pi->clk_regs.rv770.mclk_pwrmgt_cntl);
1355 u32 mclk_pwrmgt_cntl = local in function:cypress_populate_smc_acpi_state
[all...] |
| radeon_rv6xx_dpm.c | 996 WREG32_P(MCLK_PWRMGT_CNTL, USE_DISPLAY_GAP, ~USE_DISPLAY_GAP);
998 WREG32_P(MCLK_PWRMGT_CNTL, 0, ~USE_DISPLAY_GAP);
|
| nid.h | 615 #define MCLK_PWRMGT_CNTL 0x648
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| cikd.h | 723 #define MCLK_PWRMGT_CNTL 0x2ba0
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| sid.h | 598 #define MCLK_PWRMGT_CNTL 0x2ba0
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| evergreend.h | 153 #define MCLK_PWRMGT_CNTL 0x648
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| r600d.h | 1327 #define MCLK_PWRMGT_CNTL 0x624
|
| radeon_ni_dpm.c | 1199 ni_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL);
1705 cpu_to_be32(ni_pi->clock_registers.mclk_pwrmgt_cntl);
1810 u32 mclk_pwrmgt_cntl = ni_pi->clock_registers.mclk_pwrmgt_cntl; local in function:ni_populate_smc_acpi_state
1879 mclk_pwrmgt_cntl |= (MRDCKA0_RESET |
1888 mclk_pwrmgt_cntl &= ~(MRDCKA0_PDNB |
1913 table->ACPIState.levels[0].mclk.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
2177 u32 mclk_pwrmgt_cntl = ni_pi->clock_registers.mclk_pwrmgt_cntl; local in function:ni_populate_mclk_value
[all...] |
| radeon_ci_dpm.c | 1893 pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL);
2802 u32 mclk_pwrmgt_cntl = pi->clock_registers.mclk_pwrmgt_cntl; local in function:ci_calculate_mclk_params
2859 mclk_pwrmgt_cntl &= ~DLL_SPEED_MASK;
2860 mclk_pwrmgt_cntl |= DLL_SPEED(mpll_param.dll_speed);
2863 mclk_pwrmgt_cntl |= MRDCK0_PDNB | MRDCK1_PDNB;
2865 mclk_pwrmgt_cntl &= ~(MRDCK0_PDNB | MRDCK1_PDNB);
2873 mclk->MclkPwrmgtCntl = mclk_pwrmgt_cntl;
3004 u32 mclk_pwrmgt_cntl = pi->clock_registers.mclk_pwrmgt_cntl local in function:ci_populate_smc_acpi_level
[all...] |
| radeon_si_dpm.c | 3583 si_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL);
4383 cpu_to_be32(si_pi->clock_registers.mclk_pwrmgt_cntl);
4503 u32 mclk_pwrmgt_cntl = si_pi->clock_registers.mclk_pwrmgt_cntl; local in function:si_populate_smc_acpi_state
4574 mclk_pwrmgt_cntl |= MRDCK0_RESET | MRDCK1_RESET;
4575 mclk_pwrmgt_cntl &= ~(MRDCK0_PDNB | MRDCK1_PDNB);
4585 cpu_to_be32(mclk_pwrmgt_cntl);
4886 u32 mclk_pwrmgt_cntl = si_pi->clock_registers.mclk_pwrmgt_cntl; local in function:si_populate_mclk_value
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| amdgpu_iceland_smumgr.c | 1060 uint32_t mclk_pwrmgt_cntl = data->clock_registers.vMCLK_PWRMGT_CNTL; local in function:iceland_calculate_mclk_params
1150 /* MCLK_PWRMGT_CNTL setup */
1151 mclk_pwrmgt_cntl = PHM_SET_FIELD(mclk_pwrmgt_cntl,
1152 MCLK_PWRMGT_CNTL, DLL_SPEED, mpll_param.dll_speed);
1153 mclk_pwrmgt_cntl = PHM_SET_FIELD(mclk_pwrmgt_cntl,
1154 MCLK_PWRMGT_CNTL, MRDCK0_PDNB, dllStateOn);
1155 mclk_pwrmgt_cntl = PHM_SET_FIELD(mclk_pwrmgt_cntl,
1439 uint32_t mclk_pwrmgt_cntl = data->clock_registers.vMCLK_PWRMGT_CNTL; local in function:iceland_populate_smc_acpi_level
[all...] |
| amdgpu_ci_smumgr.c | 1036 uint32_t mclk_pwrmgt_cntl = data->clock_registers.vMCLK_PWRMGT_CNTL; local in function:ci_calculate_mclk_params
1100 mclk_pwrmgt_cntl = PHM_SET_FIELD(mclk_pwrmgt_cntl,
1101 MCLK_PWRMGT_CNTL, DLL_SPEED, mpll_param.dll_speed);
1102 mclk_pwrmgt_cntl = PHM_SET_FIELD(mclk_pwrmgt_cntl,
1103 MCLK_PWRMGT_CNTL, MRDCK0_PDNB, dllStateOn);
1104 mclk_pwrmgt_cntl = PHM_SET_FIELD(mclk_pwrmgt_cntl,
1105 MCLK_PWRMGT_CNTL, MRDCK1_PDNB, dllStateOn)
1391 uint32_t mclk_pwrmgt_cntl = data->clock_registers.vMCLK_PWRMGT_CNTL; local in function:ci_populate_smc_acpi_level
[all...] |
| amdgpu_tonga_smumgr.c | 803 uint32_t mclk_pwrmgt_cntl = data->clock_registers.vMCLK_PWRMGT_CNTL; local in function:tonga_calculate_mclk_params
902 /* MCLK_PWRMGT_CNTL setup */
903 mclk_pwrmgt_cntl = PHM_SET_FIELD(mclk_pwrmgt_cntl,
904 MCLK_PWRMGT_CNTL, DLL_SPEED, mpll_param.dll_speed);
905 mclk_pwrmgt_cntl = PHM_SET_FIELD(mclk_pwrmgt_cntl,
906 MCLK_PWRMGT_CNTL, MRDCK0_PDNB, dllStateOn);
907 mclk_pwrmgt_cntl = PHM_SET_FIELD(mclk_pwrmgt_cntl,
1191 uint32_t mclk_pwrmgt_cntl = data->clock_registers.vMCLK_PWRMGT_CNTL; local in function:tonga_populate_smc_acpi_level
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| sid.h | 600 #define MCLK_PWRMGT_CNTL 0xAE8
|
| amdgpu_si_dpm.c | 4044 si_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL);
4849 cpu_to_be32(si_pi->clock_registers.mclk_pwrmgt_cntl);
4967 u32 mclk_pwrmgt_cntl = si_pi->clock_registers.mclk_pwrmgt_cntl; local in function:si_populate_smc_acpi_state
5039 mclk_pwrmgt_cntl |= MRDCK0_RESET | MRDCK1_RESET;
5040 mclk_pwrmgt_cntl &= ~(MRDCK0_PDNB | MRDCK1_PDNB);
5050 cpu_to_be32(mclk_pwrmgt_cntl);
5350 u32 mclk_pwrmgt_cntl = si_pi->clock_registers.mclk_pwrmgt_cntl; local in function:si_populate_mclk_value
[all...] |
