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  /src/external/mit/isl/dist/test_inputs/codegen/omega/
hpf-0.c 1 if (P2 >= 0 && P2 <= 3 && P1 == P2)
2 for (int c0 = 0; c0 <= min(2, -P2 + 4); c0 += 1)
3 for (int c2 = (-P2 - c0 + 6) % 3; c2 <= 3; c2 += 3)
p.delft-0.c 1 if (P2 >= 0 && P2 <= 3 && P1 == P2)
2 for (int c0 = 0; c0 <= min(2, -P2 + 4); c0 += 1)
3 for (int c2 = (-P2 - c0 + 6) % 3; c2 <= 3; c2 += 3)
p.delft2-0.c 1 if (P1 >= 0 && P1 <= 3 && P2 >= 0 && P2 <= 3)
5 if (4 * P2 >= 2 * c3 + 9 * floord(4 * P2 - 2 * c3 - 1, 9) + 6) {
7 s0(P1 - 1, P2, c2, c3, ((-4 * P1 + 2 * c2 + 9) % 9) + 1, -4 * P2 + 2 * c3 - 9 * floord(-4 * P2 + 2 * c3, 9));
9 s0(3, P2, c2, c3, (-c2 / 4) + 3, -4 * P2 + 2 * c3 - 9 * floord(-4 * P2 + 2 * c3, 9))
    [all...]
  /src/external/gpl3/gdb/dist/sim/testsuite/bfin/
issue126.s 9 P2 = R0;
13 P2 = ( P2 + P0 ) << 1;
c_progctrl_call_pcpr.s 14 P2 = 0x0006;
17 CALL ( PC + P2 );
24 P2 = 0x000e;
29 P2 = 0x0016;
34 P2 = 0x001e;
39 P2 = 0x0026;
44 P2 = 0x0004;
c_progctrl_jump_pcpr.s 13 P2 = 0x0004;
16 JUMP ( PC + P2 );
23 P2 = 0x000c;
28 P2 = 0x0014;
33 P2 = 0x001c;
38 P2 = 0x0024;
43 P2 = 0x0002;
div0.s 9 P2 = 16;
11 LSETUP ( s0 , s0 ) LC0 = P2;
21 LSETUP ( s1 , s1 ) LC0 = P2;
31 LSETUP ( s2 , s2 ) LC0 = P2;
c_regmv_pr_pr.s 10 imm32 p2, 0x20041005;
16 imm32 p2, 0x20041005;
21 P2 = P1;
26 CHECKREG p2, 0x20021003;
32 imm32 p2, 0x20041005;
36 P1 = P2;
37 P2 = P2;
38 P4 = P2;
39 P5 = P2;
    [all...]
c_comp3op_pr_plus_pr_sh1.s 9 imm32 p2, 0x56781abc;
16 P2 = P1 + ( P2 << 1 );
23 CHECKREG p2, 0x49F18F45;
31 imm32 p2, 0x56789a2c;
37 P1 = P2 + ( P1 << 1 );
38 P2 = P2 + ( P2 << 1 );
39 P3 = P2 + ( P3 << 1 )
    [all...]
c_comp3op_pr_plus_pr_sh2.s 9 imm32 p2, 0x56781abc;
16 P2 = P1 + ( P2 << 2 );
23 CHECKREG p2, 0x0A38009B;
31 imm32 p2, 0x56789a2c;
37 P1 = P2 + ( P1 << 2 );
38 P2 = P2 + ( P2 << 2 );
39 P3 = P2 + ( P3 << 2 )
    [all...]
c_ptr2op_pr_shadd_1_2.s 14 imm32 p2, 0xbe041305;
21 P2 = ( P2 + P1 ) << 2;
28 CHECKREG p2, 0x0A528C74;
36 imm32 p2, 0x26041005;
42 P1 = ( P1 + P2 ) << 1;
43 P2 = ( P2 + P2 ) << 2;
44 P3 = ( P3 + P2 ) << 1
    [all...]
  /src/external/gpl3/gdb.old/dist/sim/testsuite/bfin/
issue126.s 9 P2 = R0;
13 P2 = ( P2 + P0 ) << 1;
c_progctrl_call_pcpr.s 14 P2 = 0x0006;
17 CALL ( PC + P2 );
24 P2 = 0x000e;
29 P2 = 0x0016;
34 P2 = 0x001e;
39 P2 = 0x0026;
44 P2 = 0x0004;
c_progctrl_jump_pcpr.s 13 P2 = 0x0004;
16 JUMP ( PC + P2 );
23 P2 = 0x000c;
28 P2 = 0x0014;
33 P2 = 0x001c;
38 P2 = 0x0024;
43 P2 = 0x0002;
div0.s 9 P2 = 16;
11 LSETUP ( s0 , s0 ) LC0 = P2;
21 LSETUP ( s1 , s1 ) LC0 = P2;
31 LSETUP ( s2 , s2 ) LC0 = P2;
c_regmv_pr_pr.s 10 imm32 p2, 0x20041005;
16 imm32 p2, 0x20041005;
21 P2 = P1;
26 CHECKREG p2, 0x20021003;
32 imm32 p2, 0x20041005;
36 P1 = P2;
37 P2 = P2;
38 P4 = P2;
39 P5 = P2;
    [all...]
c_comp3op_pr_plus_pr_sh1.s 9 imm32 p2, 0x56781abc;
16 P2 = P1 + ( P2 << 1 );
23 CHECKREG p2, 0x49F18F45;
31 imm32 p2, 0x56789a2c;
37 P1 = P2 + ( P1 << 1 );
38 P2 = P2 + ( P2 << 1 );
39 P3 = P2 + ( P3 << 1 )
    [all...]
c_comp3op_pr_plus_pr_sh2.s 9 imm32 p2, 0x56781abc;
16 P2 = P1 + ( P2 << 2 );
23 CHECKREG p2, 0x0A38009B;
31 imm32 p2, 0x56789a2c;
37 P1 = P2 + ( P1 << 2 );
38 P2 = P2 + ( P2 << 2 );
39 P3 = P2 + ( P3 << 2 )
    [all...]
c_ptr2op_pr_shadd_1_2.s 14 imm32 p2, 0xbe041305;
21 P2 = ( P2 + P1 ) << 2;
28 CHECKREG p2, 0x0A528C74;
36 imm32 p2, 0x26041005;
42 P1 = ( P1 + P2 ) << 1;
43 P2 = ( P2 + P2 ) << 2;
44 P3 = ( P3 + P2 ) << 1
    [all...]
  /src/external/gpl3/binutils/dist/opcodes/
ia64-opc-a.c 150 {"cmp.lt", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
151 {"cmp.le", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
152 {"cmp.gt", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
153 {"cmp.ge", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
154 {"cmp.lt.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
155 {"cmp.le.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
156 {"cmp.gt.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
157 {"cmp.ge.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
158 {"cmp.eq.and", A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
159 {"cmp.ne.andcm", A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL}
    [all...]
  /src/external/gpl3/binutils.old/dist/opcodes/
ia64-opc-a.c 150 {"cmp.lt", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
151 {"cmp.le", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
152 {"cmp.gt", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
153 {"cmp.ge", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
154 {"cmp.lt.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
155 {"cmp.le.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
156 {"cmp.gt.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
157 {"cmp.ge.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
158 {"cmp.eq.and", A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
159 {"cmp.ne.andcm", A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL}
    [all...]
  /src/external/gpl3/gdb.old/dist/opcodes/
ia64-opc-a.c 150 {"cmp.lt", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
151 {"cmp.le", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
152 {"cmp.gt", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
153 {"cmp.ge", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
154 {"cmp.lt.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
155 {"cmp.le.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
156 {"cmp.gt.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
157 {"cmp.ge.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
158 {"cmp.eq.and", A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
159 {"cmp.ne.andcm", A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL}
    [all...]
  /src/external/gpl3/gdb/dist/opcodes/
ia64-opc-a.c 150 {"cmp.lt", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
151 {"cmp.le", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
152 {"cmp.gt", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
153 {"cmp.ge", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
154 {"cmp.lt.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
155 {"cmp.le.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
156 {"cmp.gt.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
157 {"cmp.ge.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
158 {"cmp.eq.and", A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
159 {"cmp.ne.andcm", A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL}
    [all...]
  /src/external/gpl3/gcc/dist/gcc/config/frv/
frv-asm.h 22 P2(INSN): Emit INSN.P on the FR500 and above, otherwise emit plain INSN. */
30 #define P2(A) P(A)
32 #define P2(A) A
36 #define P2(A) A
  /src/external/gpl3/gcc.old/dist/gcc/config/frv/
frv-asm.h 22 P2(INSN): Emit INSN.P on the FR500 and above, otherwise emit plain INSN. */
30 #define P2(A) P(A)
32 #define P2(A) A
36 #define P2(A) A

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