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    Searched refs:PACKET3_SET_BASE (Results 1 - 18 of 18) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
nvd.h 58 #define PACKET3_SET_BASE 0x11
si_enums.h 176 #define PACKET3_SET_BASE 0x11
soc15d.h 83 #define PACKET3_SET_BASE 0x11
vid.h 117 #define PACKET3_SET_BASE 0x11
cikd.h 235 #define PACKET3_SET_BASE 0x11
sid.h 1668 #define PACKET3_SET_BASE 0x11
amdgpu_gfx_v6_0.c 2049 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
amdgpu_gfx_v10_0.c 2712 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
amdgpu_gfx_v7_0.c 2552 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
amdgpu_gfx_v8_0.c 4223 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
amdgpu_gfx_v9_0.c 3160 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
  /src/sys/external/bsd/drm2/dist/drm/radeon/
nid.h 1165 #define PACKET3_SET_BASE 0x11
cikd.h 1701 #define PACKET3_SET_BASE 0x11
sid.h 1605 #define PACKET3_SET_BASE 0x11
radeon_si.c 3588 radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
4469 case PACKET3_SET_BASE:
4547 case PACKET3_SET_BASE:
4665 case PACKET3_SET_BASE:
radeon_evergreen_cs.c 2026 case PACKET3_SET_BASE:
3388 case PACKET3_SET_BASE:
evergreend.h 1551 #define PACKET3_SET_BASE 0x11
radeon_cik.c 4017 radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

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