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    Searched refs:TdcWaterfallCtl (Results 1 - 18 of 18) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
fiji_smumgr.h 38 uint8_t TdcWaterfallCtl;
polaris10_smumgr.h 42 uint8_t TdcWaterfallCtl;
vegam_smumgr.h 51 uint8_t TdcWaterfallCtl;
amdgpu_fiji_smumgr.c 87 /* TDC_MAWt, TdcWaterfallCtl, DTEAmbientTempBase */
618 offsetof(SMU73_Discrete_PmFuses, TdcWaterfallCtl),
624 smu_data->power_tune_table.TdcWaterfallCtl = defaults->TdcWaterfallCtl;
723 "Attempt to populate TdcWaterfallCtl, "
amdgpu_vegam_smumgr.c 71 * TdcWaterfallCtl, DTEAmbientTempBase, DisplayCac, BAPM_TEMP_GRADIENT */
1772 offsetof(SMU75_Discrete_PmFuses, TdcWaterfallCtl),
1778 smu_data->power_tune_table.TdcWaterfallCtl = defaults->TdcWaterfallCtl;
1873 "Attempt to populate TdcWaterfallCtl, "
amdgpu_iceland_smumgr.c 81 * TDC_MAWt, TdcWaterfallCtl, DTEAmbientTempBase, DisplayCac, BAPM_TEMP_GRADIENT
93 * TdcWaterfallCtl, DTEAmbientTempBase, DisplayCac,
106 * TdcWaterfallCtl, DTEAmbientTempBase, DisplayCac,
348 offsetof(SMU71_Discrete_PmFuses, TdcWaterfallCtl),
354 smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl;
479 "Attempt to populate TdcWaterfallCtl, "
amdgpu_polaris10_smumgr.c 67 * TdcWaterfallCtl, DTEAmbientTempBase, DisplayCac, BAPM_TEMP_GRADIENT */
516 offsetof(SMU74_Discrete_PmFuses, TdcWaterfallCtl),
522 smu_data->power_tune_table.TdcWaterfallCtl = defaults->TdcWaterfallCtl;
617 "Attempt to populate TdcWaterfallCtl, "
amdgpu_ci_smumgr.c 553 offsetof(SMU7_Discrete_PmFuses, TdcWaterfallCtl),
559 smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl;
amdgpu_tonga_smumgr.c 71 * TdcWaterfallCtl, DTEAmbientTempBase, DisplayCac, BAPM_TEMP_GRADIENT
1923 offsetof(SMU72_Discrete_PmFuses, TdcWaterfallCtl),
1930 smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl;
2028 "Attempt to populate TdcWaterfallCtl Failed !",
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
vega10_powertune.h 67 uint8_t TdcWaterfallCtl;
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
smu71_discrete.h 531 uint8_t TdcWaterfallCtl;
smu7_discrete.h 484 uint8_t TdcWaterfallCtl;
smu72_discrete.h 598 uint8_t TdcWaterfallCtl;
smu73_discrete.h 615 uint8_t TdcWaterfallCtl;
smu74_discrete.h 586 uint8_t TdcWaterfallCtl;
smu75_discrete.h 612 uint8_t TdcWaterfallCtl;
  /src/sys/external/bsd/drm2/dist/drm/radeon/
smu7_discrete.h 483 uint8_t TdcWaterfallCtl;
radeon_ci_dpm.c 360 offsetof(SMU7_Discrete_PmFuses, TdcWaterfallCtl),
361 (u32 *)&pi->smc_powertune_table.TdcWaterfallCtl,
366 pi->smc_powertune_table.TdcWaterfallCtl = pt_defaults->tdc_waterfall_ctl;

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