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    Searched refs:UpHyst (Results 1 - 15 of 15) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
smu71_discrete.h 70 uint8_t UpHyst;
131 uint8_t UpHyst;
429 uint8_t UpHyst;
smu72_discrete.h 68 uint8_t UpHyst;
123 uint8_t UpHyst;
431 uint8_t UpHyst;
smu73_discrete.h 66 uint8_t UpHyst;
117 uint8_t UpHyst;
425 uint8_t UpHyst;
smu74_discrete.h 98 uint8_t UpHyst;
146 uint8_t UpHyst;
425 uint8_t UpHyst;
smu75_discrete.h 99 uint8_t UpHyst;
151 uint8_t UpHyst;
432 uint8_t UpHyst;
smu71.h 160 uint8_t UpHyst;
smu72.h 244 uint8_t UpHyst;
smu73.h 242 uint8_t UpHyst;
smu74.h 271 uint8_t UpHyst;
smu75.h 205 uint8_t UpHyst;
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_fiji_smumgr.c 93 /* Voltage, Frequency, DpmLevel, DivId, Level, FuncCntl3, FuncCntl4, Spectrum, Spectrum2, DynRm, DynRm1 Did, Watermark, ForActivity, ForThrottle, UpHyst, DownHyst, DownHyst, Throttle */
976 level->UpHyst = data->current_profile_setting.sclk_up_hyst;
1194 mem_level->UpHyst = data->current_profile_setting.mclk_up_hyst;
1412 table->MemoryACPILevel.UpHyst = 0;
2591 if (levels[i].UpHyst != setting->sclk_up_hyst ||
2593 levels[i].UpHyst = setting->sclk_up_hyst;
2596 + offsetof(SMU73_Discrete_GraphicsLevel, UpHyst);
2601 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t));
2626 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst ||
2628 mclk_levels[i].UpHyst = setting->mclk_up_hyst
    [all...]
amdgpu_polaris10_smumgr.c 87 /* Voltage, DpmLevel, DivId, Level, FuncCntl3, FuncCntl4, DynRm, DynRm1 Did, Padding,ForActivity, ForThrottle, UpHyst, DownHyst, DownHyst, Throttle */
945 level->UpHyst = data->current_profile_setting.sclk_up_hyst;
959 level->UpHyst = (uint8_t)data->up_hyst;
1104 mem_level->UpHyst = data->current_profile_setting.mclk_up_hyst;
1279 table->MemoryACPILevel.UpHyst = 0;
2507 if (levels[i].UpHyst != setting->sclk_up_hyst ||
2509 levels[i].UpHyst = setting->sclk_up_hyst;
2512 + offsetof(SMU74_Discrete_GraphicsLevel, UpHyst);
2517 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t));
2542 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst |
    [all...]
amdgpu_tonga_smumgr.c 658 graphic_level->UpHyst = data->current_profile_setting.sclk_up_hyst;
1006 memory_level->UpHyst = data->current_profile_setting.mclk_up_hyst;
1296 table->MemoryACPILevel.UpHyst = 0;
3190 if (levels[i].UpHyst != setting->sclk_up_hyst ||
3192 levels[i].UpHyst = setting->sclk_up_hyst;
3195 + offsetof(SMU72_Discrete_GraphicsLevel, UpHyst);
3200 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t));
3225 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst ||
3227 mclk_levels[i].UpHyst = setting->mclk_up_hyst;
3230 + offsetof(SMU72_Discrete_MemoryLevel, UpHyst);
    [all...]
amdgpu_iceland_smumgr.c 931 graphic_level->UpHyst = data->current_profile_setting.sclk_up_hyst;
1272 memory_level->UpHyst = data->current_profile_setting.mclk_up_hyst;
1554 table->MemoryACPILevel.UpHyst = 0;
amdgpu_vegam_smumgr.c 898 levels[i].UpHyst = (uint8_t)
1062 levels[i].UpHyst = (uint8_t)
1184 table->MemoryACPILevel.UpHyst = 0;

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